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Experiment 1 TTL Logic Gates: Objectives

This document provides instructions for an experiment using TTL logic gates. The experiment involves using a 7400 IC containing 4 NAND gates to perform logic functions. Students are asked to connect the gates in different configurations, apply input signals, and record the output states. They will observe the input/output behavior of a single NAND gate, confirm the NAND truth table, and use multiple gates together. The document contains objectives, instructions, diagrams of gate configurations, and questions to answer regarding the 7400 IC.

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160 views

Experiment 1 TTL Logic Gates: Objectives

This document provides instructions for an experiment using TTL logic gates. The experiment involves using a 7400 IC containing 4 NAND gates to perform logic functions. Students are asked to connect the gates in different configurations, apply input signals, and record the output states. They will observe the input/output behavior of a single NAND gate, confirm the NAND truth table, and use multiple gates together. The document contains objectives, instructions, diagrams of gate configurations, and questions to answer regarding the 7400 IC.

Uploaded by

Gxfhjj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EENG115/INFE115 ========================= Introduction to Logic Design

Experiment 1

TTL Logic Gates

# Student No Name Surname Sign


1
2

Objectives:
To demonstrate the operation and characteristics of a TTL logic gate (7400) and to show
how it can be used to perform any of the three basic logic functions.

7400
NAND GATE

1
EENG115/INFE115 ========================= Introduction to Logic Design

A. NAND GATES
An introductory note: Logic operations are performed in logical gates, which receive inputs and
generate outputs accordingly. In this lab, we will use logical gates encapsulated inside integrated
circuits (ICs). An IC contains a certain number of logical gates that can be used when we
connect the IC power lines. Moreover, the logical status is displayed on LEDs which emit light
according to that value. Herein, Green represents logic 0 and Red represents logic 1.

A1. Connect one of the four gates in the 7400 IC as shown in Fig. 1.2 and record your data in
Table 2A. The inputs will come from the data switches SW0 and and you will monitor the
output states with LED display L1. (Binary 1 = Red, Binary 0 = Green)

Table 2A
OUTPUT
SW 1 3 SW1 SW0
(L1)
0

SW 0 0
1 2 L 1 0 1
Fig 1.2 1 0
1 1

A2. Connect one of the four gates in the 7400 IC as shown in Fig. 1.1 and record your data in
table 1A. The input will come from data switch SW0. You will monitor the input and output
states with L0 and L1 LED displays.

1 3 Table 1A
S W 0
INPUT OUTPUT
2 L 1 (SW0)=( L0) (L1)
0 (Green)
1 (Red)
L 0
Fig. 1.1

2
EENG115/INFE115 ========================= Introduction to Logic Design

A3. Wire the circuit shown in Fig. 1.3. With SW0 and SW1, apply the states shown in table 3A.
Record the output state for each set of input states by observing the LED display L1.

SW 1 3 4 6
0

SW 1 2 5 L 1
Fig 1.3

Table 3A
OUTPUT
SW1 SW0
(L1)
0 0
0 1
1 0
1 1

Questions:

1. How many NAND gates are there in TTL IC 7400? ______________________

2. Pin 14 of TTL IC 7400 is connected to _____________________________Volts.

3. Pin 7 of TTL IC 7400 is connected to __________________________________

EENG 115/INFE 115 Digital Logic Design, Lab Report.

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