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Edit Lab 1 - Logic Gates and Combinational Logic

This document describes Lab 1 of a Digital Systems course which focuses on logic gates and combinational logic. The objectives are to become familiar with the Digital Logic Systems kit, learn how to use lab equipment, and understand the operation of logic gates. The lab introduces students to common logic gates like AND, OR, NAND and provides instructions to test the functionality of these gates using the DLS kit and record the results in a truth table. Students are expected to complete pre-lab questions to demonstrate their understanding of logic gate symbols, functions and truth tables before attending the lab session.

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0% found this document useful (0 votes)
198 views

Edit Lab 1 - Logic Gates and Combinational Logic

This document describes Lab 1 of a Digital Systems course which focuses on logic gates and combinational logic. The objectives are to become familiar with the Digital Logic Systems kit, learn how to use lab equipment, and understand the operation of logic gates. The lab introduces students to common logic gates like AND, OR, NAND and provides instructions to test the functionality of these gates using the DLS kit and record the results in a truth table. Students are expected to complete pre-lab questions to demonstrate their understanding of logic gate symbols, functions and truth tables before attending the lab session.

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Hoang Dung Son
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION

FACULTY FOR HIGH QUALITY TRAINING


INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

DIGITAL SYSTEM IN PRACTICE

Lab 1

LOGIC GATES AND


COMBINATIONAL LOGIC

HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION


FACULTY FOR HIGH QUALITY TRAINING

Instructor: NGUYEN THANH NGHIA

Date: ....................................................................
Student’s Name: ..................................................
ID: .......................................................................
HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

PART 1
INTRODUCTION

I. OBJECTIVES
- Lab policies and some regulations.
- To be familiar with Digital Logic Systems kit.
- Learn how to use some equipments in the electronic lab.

II. INTRODUCTION
In this lab you’ll use a Digital Logic Systems (DLS) kit to implement some simple digital
circuits. DLS kit provides you with a general wiring fabric in which to make connections
among circuit components. Learning how to use this kit effectively takes time and, more vital,
practice. Introduction to Digital Logic Systems kit shows you the basic layout of the KIT
which you’ll be using in DIGITAL SYSTEM IN PRACTICE.

Figure 1.1. Digital Logic Systems (DLS) kit.

III. LABORATORY POLICIES


a. Each lab session lasts 300 minutes and starts promptly. A brief introduction with demo
may be given by the instructor at the beginning of the lab. Everybody has to finish on
time, so please time yourself carefully. Doing the pre-lab can save you a lot of time.
Preparing the lab is very important; as it will save you time and allow you to work more
efficiently. The pre-lab includes reading the lab assignment in advance, answering the
questions or doing the calculations, and if necessary reviewing the material in the
textbook. All pre-lab preparation must be recorded and dated in the lab notebook prior
doing the lab. The lab instructor will check your pre-lab write-up and sign your pre-lab
sheet.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 2


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

b. Student partnerships, each lab is done in groups of two. The team approach encourages
interaction and helps with the debugging and data collection. However, lab report has to
be handed in individually.
c. Collaboration, Students are working in groups of two in the laboratory. This encourages
team work and makes the conduction of the experiments more efficient. You can
collaborate on the pre-lab and on interpretation of the measured data. However, each
student is responsible for writing the pre-lab and recording the data in his or her pre-lab
sheet. Copying of data from other groups or altered information will result in a zero grade
for the course. The lab report is a joined effort and each student should contribute equally
to writing the report.
d. Instruments and supplies, the major instruments you will need are permanently installed
in the stations. Small parts (resistors, capacitors, transistors, ICs) will be available in the
box in the lab area. Capacitors, transistors and integrated circuits (ICs) can be reused and
should be left on the table in the same manner as they were obtained.
e. Leave your workplace at least as clean and tidy as you found it. Put everything back in
its proper place. If the workplace is not tidy after you finish it will cause to lose some
marks.
f. Precautions Electronic test equipment can be damaged if incorrectly used. The function
generator will be damaged if a large DC or AC voltage is applied to the outputs. The
oscilloscope also has input limitations. Do not exceed 300V on any oscilloscope input.
Power supplies can also be damaged if an external voltage in excess of the supply output
voltage is fed back into the supply. The most common ways multi-meters are damaged are
by trying to measure voltage when the meter is set to measure current or resistance or by
exceeding the maximum voltage when in the voltage measurement mode. Think twice
before connecting a meter. In particular, check the position of the function switch and
ensure the test leads are connected to the proper inputs on the meter. If you make a
mistake you could blow the meter’s internal fuse or damage the converter chip.
No foods or drinks are allowed inside the lab for any reason.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 3


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

PART 2

LOGIC GATES
AND COMBINATIONAL LOGIC

I. OBJECTIVES
Upon completion of this lab, you will able to:
- Understand the operation of logic gates.
- Build a combination circuit that implement a Boolean expression.

II. REQUIRED EQUIPMENT


- 2 INPUT-AND GATE: IC 74LS02.
- INVERTER GATE: IC74LS06.
- 2 INPUT-NAND GATE: IC 74LS00.
- 2 INPUT-XOR GATE: IC 74LS86.
- 2 INPUT-OR GATE: IC 74LS32.
- 2 INPUT-NOR GATE: IC 74LS02.

III. INTRODUCTION
1. Logic gates: IC 74LS02, IC 74LS32, IC 74LS00, IC 74LS08, IC 74LS86, IC 74LS04.
2. Alternate logic gates
a. Use NAND gate for other logic gates
b. Use NOR gate for other logic gates
c. Verify De-Morgan’s theorems
3. Design combinatorial logic circuits using logic gates
a. Using IC 7400 for designing circuit which is satisfied the below truth table
b. Implement the comparator two one-bit binary from logic gates.
c. Design the circuit that detect BCD number.
d. Design the full adder two one-bit binary by IC74LS86, IC 74LS02 and IC 74LS08.

IV. STUDENT TASK


The student must complete the questions in this section and read the book before
going to the class.
1. Drawing the symbol – Writing the Boolean function – Writing truth-table of NAND gate?

2. Drawing the symbol – Writing the Boolean function – Writing truth-table of AND gate?

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 4


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

3. Drawing the symbol – Writing the Boolean function – Writing truth-table of NOT gate?

4. Drawing the symbol – Writing the Boolean function – Writing truth-table of OR gate?

5. Drawing the symbol – Writing the Boolean function – Writing truth-table of NOR gate?

6. Drawing the symbol – Writing the Boolean function – Writing truth-table of EX-OR gate?

7. Drawing the symbol – Writing the Boolean function – Writing truth-table of EX-NOR gate?

V. LABORATORY
1. LOGIC GATES
a. NAND GATE - 74LS00
- Two inputs of NAND gate wire up to switch.
- Output wire up to led-display
- Toggle switch to change input logic level.
- Look up the datasheet for the full pin diagram, status table, IC functions and parameters,
here is the schematic summary, logic diagram and IC status table as shown in Figure 2-1.

Figure 1.2. Pin configuration. logic diagram and function table of the 74LS00

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 5


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

Write down the answer of the questions following:


How many logic gate in the 74LS00? VCC pin? GND pin?

Figure 1.3. The schematic of NAND gate on DLS kit


The figure 1.3 is the schematic diagram of the NAND and AND gate on DLS kit. The IC1 is
NAND 74LS00 and IC2 is AND 74LS08

Figure 1.4. The schematic for NAND 74LS00 checking


Get the results and write down the checking truth table of NAND gate.
Table 1.1. The checking truth table of 74LS00
NAND gate A NAND gate B NAND gate C NAND gate
Inputs Output Inputs Output Inputs D
Output Inputs Output
A B Y A B Y A B Y A B Y
0 0 1 0 0 0 0 0 0
0 1 1 0 1 0 1 0 1
1 0 1 1 0 1 0 1 0
1 1 0 1 1 1 1 1 1
Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.2: Determine the status of 74LS00

Logic gate No. A B C D


Good/Damage (“√/×”)

b. AND GATE - 74LS08


Students follow instructions step by step:
- Two inputs of AND gate wire up to switch.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 6


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

- Connect Output pin of NOR gate to a led-display.


- Toggle switch to change input logic level.

Figure 1.6. Pin configuration. logic diagram and function table of the 74LS08

Write down the answer of the questions following:


How many logic gate in the 74LS08? VCC pin? GND pin?
To checking the status of AND 74LS08, the schematic is connected as the figure 1.7

Figure 1.7. The schematic for NAND 74LS08 checking

- Get the results and write down the checking truth table of AND gate.

Table 1.3. The checking truth table of 74LS08


AND gate A AND gate B AND gate C AND gate D
Inputs Output Inputs Output Inputs Output Inputs Output
A B Y A B Y A B Y A B Y
0 0 0 0 0 0 0 0 0
0 1 0 0 1 0 1 0 1
1 0 0 1 0 1 0 1 0
1 1 1 1 1 1 1 1 1

Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.4: Determine the status of 74LS08

Logic gate No. A B C D


Good/Damage (“√/×”)

- Led is on when output Y is logic LOW or logic HIGH?_____________


- Led is off when output Y is logic LOW or logic HIGH?_____________

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 7


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

c. OR GATE 74LS32
- Two inputs of OR gate wire up to switch.
- Connect output’s pin to led-display.
- Toggle switch to change input logic level.

Figure 1.8. Pin configuration. logic diagram and function table of the 74LS32

Write down the answer of the questions following:


How many logic gate in the 74LS32? VCC pin? GND pin?

Figure 1.9. The schematic of OR gate on DLS kit


The figure 1.9 is the schematic diagram of the OR gate on DLS kit. The 8 OR gate must check
because it has 2 IC on the kit. The logic gate is labeled from A to H.

Figure 1.10. The schematic for OR 74LS32 checking

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 8


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

- Get the results and write down the checking truth table of OR gate.

Table 1.5. The checking truth table of 74LS32


OR gate A OR gate B OR gate C OR gate D
Inputs Output Inputs Output Inputs Output Inputs Output
A B Y A B Y A B Y A B Y
0 0 0 0 0 0 0 0 0
0 1 1 0 1 0 1 0 1
1 0 1 1 0 1 0 1 0
1 1 1 1 1 1 1 1 1

Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.6: Determine the status of 74LS32

Logic gate No. A B C D


Good/Damage (“√/×”)

d. EX-OR GATE 7486


- Two inputs of EX-OR gate wire up to switch.
- Output wire up to led-display.
- Toggle switch to change input logic level.

Figure 1.11. Pin configuration. logic diagram and function table of the 7486

Write down the answer of the questions following:


How many logic gate in the 7486? VCC pin? GND pin?

Figure 1.12. The schematic of EX-OR gate on DLS kit

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 9


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

Figure 1.13. The schematic for EX-OR 7486 checking

- Get the results and write down the checking truth table of OR gate.

Table 1.7. The checking truth table of 7486


EX-OR gate A EX-OR gate B EX-OR gate C EX-OR gate D
Inputs Output Inputs Output Inputs Output Inputs Output
A B Y A B Y A B Y A B Y
0 0 0 0 0 0 0 0 0
0 1 1 0 1 0 1 0 1
1 0 1 1 0 1 0 1 0
1 1 0 1 1 1 1 1 1

Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.8. Determine the status of 7486

Logic gate No. A B C D


Good/Damage (“√/×”)

e. NOT-GATE 74HC14
- Two inputs of NOT gate wire up to switch.
- Output wire up to led-display
- Toggle switch to change input logic level.

Figure 1.14. The pin configuration of the 74HC14


Write down the answer of the questions following:
How many logic gate in the 74HC14? VCC pin? GND pin?

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 10


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

Figure 1.15. The schematic of NOT gate on DLS kit

Figure 1.16. The schematic for NOT 74HC14 checking

- Get the results and write down the checking truth table of NOT gate.

Table 1.9. The checking truth table of 74HC14

NOT gate
A B C D E F
A Y A Y A Y A Y A Y A Y
0 1 0 0 0 0 0
1 0 1 1 1 1 1

Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.10. Determine the status of 74HC14

Logic gate No. A B C D E F


Good/Damage (“√/×”)

f. NAND GATE WITH THREE INPUT - 74LS10


- Two inputs of NAND gate with three input wire up to switch.
- Output wire up to led-display
- Toggle switch to change input logic level.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 11


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

Figure 1.17. The pin configuration of the 74LS10


Write down the answer of the questions following:
How many logic gate in the 74HC14? VCC pin? GND pin?

Figure 1.18. The schematic of NAND gate with three input on DLS kit

Figure 1.19. The schematic for NAND 74LS10 checking

- Get the results and write down the checking truth table of NAND gate.

Table 1.11. The checking truth table of 74LS10


Cổng nand A Cổng nand B Cổng nand C
Inputs Output Inputs Output Inputs Output
A B C Y A B C Y A B C Y
0 0 0 1 0 0 0 0 0 0
0 0 1 1 0 0 1 0 0 1
0 1 0 1 0 1 0 0 1 0
0 1 1 1 0 1 1 0 1 1
1 0 0 1 1 0 0 1 0 0
1 0 1 1 1 0 1 1 0 1
1 1 0 1 1 1 0 1 1 0
1 1 1 0 1 1 1 1 1 1

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 12


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

Tick “×” if the logic gate is damage, tick “√” if the logic gate is good.
Table 1.12. Determine the status of 74LS10

Logic gate No. D E F


Good/Damage (“√/×”)

2. CHANGING GATE METHODS


a. Using NAND to make other logic gates
- Construct the circuit for each figure 1
- Output wire up to led-display
- Toggle switch to change input logic level.
- Get the results and write down the truth table of figure 1a.
- Do the same steps for figure 1b, 1c, 1d.

74LS00
NOT Figure 1.20a

74LS00 74LS00
AND Figure 1.20b

74LS00
74LS00
74LS00
OR
Figure 1.20c

74LS00
74LS00 74LS00
74LS00 Figure 1.20d NOR

Figure 1.20

- Which do these circuits in figure 1.20a, 1.20b, 1.20c, 1.20d correspond with logic gates?

b. Using NOR to make other logic


- Construct the circuit for figure 2a
- The output wires up to led-display
- Toggle switch to change input logic level.
- Get the results and write down the truth table of figure 1.21a.
- Do the same steps for figure 1.21b, 1.21c, 1.21d.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 13


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

74LS02
NOT Figure 1.21a

74LS02 74LS02
OR Figure 1.21b

74LS02
74LS02
74LS02
AND
Figure 1.21c

74LS02
74LS02 74LS02
NAND
74LS02 Figure 1.21d

Figure 1.21

- Which do these circuits in figure 1.21a, 1.21b, 1.21c, 1.21d correspond with logic gates?
c. Construct the circuit for the expression f (C , B, A)  CBA (0,1,2,3,4) in two cases:
 Case 1: Just only using NAND gates (74LS00).
 Case 2: Just only using NOR gates (74LS02).
- Simplify f expression.

- Based on part 2a, sketch the circuit diagram for the case 1 and the part 2b for the
case 2.
 Case 1:

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 14


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

 Case 2:

- Build the circuit. The inputs C, B, A are driven by three switches. The output wires
up to led-display.
- Change the state of three inputs and observe the output to finish the truth table.
- Make comment on the results.

3. DESIGN THE COMBINATORIAL LOGIC CIRCUIT USING LOGIC


GATES
a. Using IC 7400 for designing circuit which is satisfied the below truth table

Input Output
A B C Y
Low Low Low High
Low Low High High
Low High Low Low
Low High High Low
High Low Low Low
High Low High High
High High Low Low
High High High High

- Simplify the expression of the output Y = f(A,B,C).

- Just only using NAND gates with 2 inputs, implement the circuit that satisfies the
truth table above.
Hint:
- Build the circuit. The inputs C, B, A are driven by three switches.
- Output f wire up to led-display.
Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 15
HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

- Change the state of three inputs and observe the output values and compare these
with the truth table.

b. Implement the comparator two one-bit binary from logic gates


The truth table of the comparator is given as below:

Input Output
A B A=B A<B A>B
0 0 1 0 0
0 1 0 1 0
1 0 0 0 1
1 1 1 0 0

Questions:
- Implement the one-bit comparator (2 inputs, 3 outputs) which are shown above
with condition: just only using NAND and NOR logic gates.
- Design the circuit.

- Build the circuit.


- Three outputs of the comparator wire up to led-display
- Two inputs are driven by switches.

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 16


HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

- Make comment on the results.


c. Design the circuit that can detect BCD number:
- The circuit that detects BCD number includes 4 inputs (A, B, C, D) and 1 output
Y. The output Y is HIGH when the BCD numbers in the inputs.
- Show the way to design:

- Build the circuit.


- The output wires up to led-display.
- The inputs A, B, C, D wire up to switches and concurrently connect to BCD TO 7
SEGMENT DISPLAY block.

- Check the practical circuit by changing logic state of the inputs


Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 17
HCMC UNIVERSITY OF TECHNOLOGY AND EDUCATION
FACULTY FOR HIGH QUALITY TRAINING
INDUSTRIAL ELECTRONICS - BIOMEDICAL ENGINEERING DEPARTMENT

d. Design the full adder two one-bit binary by IC74LS86, IC 74LS02 and IC 74LS08.
- Three inputs are Cin, A, B. Two outputs are S and Cout.
- Build the truth table

- Draw the logic diagram

- Check the practical circuit by changing logic state of the inputs

Lab 1 - LOGIC GATES AND COMBINATIONAL LOGIC.doc Page | 18

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