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Alba Discrete ATI M92-LP gDDR2 Schematics
uFCPGA Mobile Penryn
C
Intel Cantiga-PM + ICH9M C
2009-03-23
REV : SA
B B
DY : Nopop Component
GM : Pop when Cantiga is GM
PM : Pop when Cantiga is PM
G/P : BOM control if Cantiga is PM
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 1 of 60
5 4 3 2 1
5 4 3 2 1
ALBA Discrete Block Diagram CPU DC/DC
ISL6266A 34,35
INPUTS OUTPUTS
+PWR_SRC +VCC_CORE
Clock Generator
Project code : 91.4BK01.001
D SLG8SP513VTR 7 Intel Mobile CPU SYSTEM DC/DC D
PCB LAYER Part Number : 48.4BK13.0SA TPS51117 36
Penryn
L1: Top PCB P/N : 09207 INPUTS OUTPUTS
L2: GND Socket P
L3: Signal
8,9
Revision : SA +PWR_SRC +1.05V_VCCP
L4: Signal VRAM(gDDR2)
SYSTEM DC/DC
33
L5: VCC FSB TPS51125
32Mbx16x4 (512MB)457,58
L6: Signal 800/1066MHz
INPUTS OUTPUTS
L7: GND +15V_ALW
+3.3V_RTC_LDO
L8: Bottom +PWR_SRC +5V_ALW
Intel +3.3V_ALW
Cantiga-GM DDRII Slot 0
CRT RGB CRT
DDRII 800 Channel A
800 16 LDO
42 Power SW L6935TR 37
AGTL+ CPU I/F
ATI M92-LP PCIe x 16
DDR Memory I/F DDR II 800 Channel B
TPS2231RGP 50
INPUTS OUTPUTS
LVDS(Dual Channel)
DDRII Slot 1
C LCD C
41 53,54,55,56 External Graphics 800 17
+1.8V_SUS +1.5V_RUN
10,11,12,13,14,15
PCIE x 1 & USB 2.0 x 1 New Card
(On Express Card board) 50 SYSTEM DC/DC
TPS51117 38
DMIx4 CONTROL-LINK PCIE x 1 10/100 LOM RJ45 INPUTS OUTPUTS
RTL8103EL 25 CONN 42
+PWR_SRC +1.8V_SUS
Left Side: SYSTEM DC/DC
USB 2.0 x 2 39
Intel PCIE USB x 2 46 TPS51117
CardReader
INPUTS OUTPUTS
(7 in 1)SD/MMC USB2.0 ICH9-M
Realtek Mini-Card +PWR_SRC +VCC_GFX_CORE
MS/MS Pro/xD PCIE x 1
43
RTS5159 802.11a/b/g/n
USB 2.0/1.1 ports (12)
(On Express Card board) 50 PCI Express ports (6) CHARGER
32
B High Definition Audio USB 2.0 USB 2.0 x 1 CAMERA MAX8731A B
(Option) 47
SATA ports (4) INPUTS OUTPUTS
LPC I/F
+DC_IN +PWR_SRC
ACPI 1.1 USB 2.0 x 1 Bluetooth +PBATT
45
Digital Mic Array PCI/PCI BRIDGE
47
(Option) Azalia AZALIA
LPC Bus LDO
18,19,20,21 38
USB 2.0 x 1
Right Side: TPS51100
Internal Mic 44 CODEC USB x 1 51
INPUTS OUTPUTS
MIC IN OP AMP +1.8V_SUS +V_DDR_MCH_REF
+0.9V_DDR_VTT
KBC
SATA
SATA
HP OUT
IDT SPI WINBOND LDO
92HD81 22 WPCE773L 26 L6935TR 37
(On Express Card board)
INPUTS OUTPUTS
+1.8V_SUS +1.1V_RUN
A A
<Core Design>
2CH SPEAKER Thermal
Flash ROM Touch Int.
44 HDD ODD
2MB PAD KB
& Fan Wistron Corporation
44 44 45 45 28,44 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
47 EMC2102 Taipei Hsien 221, Taiwan, R.O.C.
Title
Block Diagram
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 2 of 60
5 4 3 2 1
5 4 3 2 1
D D
+PWR_SRC TPS51117 38
Adapter
ISL6266A TPS51117 TPS51117 +1.8V_SUS
SI4835BDY 34,35 36 39
32 Charger
MAX8731A
+VCC_CORE +1.05V_VCCP +VCC_GFX_CORE
Battery +PBATT 32
TPS51100 38
L6935TR 37
L6935TR 37
TPS51125 33
C C
+1.1V_RUN +1.5V_RUN
+5V_ALW2 3D3V_AUX_S5 +5V_ALW +3.3V_ALW +V_DDR_MCH_REF +0.9V_DDR_VTT
TPS2231RGP
+15V_ALW +3.3V_RTC_LDO TPS2062AD AO4468 TPS2062AD AO3403 TPS2231RGP AO4468 50
46 30 51 25 50 30
+1.5V_CARD
+5V_USB1 +5V_RUN +5V_USB2 +3.3V_LAN +3.3V_CARDAUX +3.3V_RUN
RTL8103EL TPS2034DR TPS2231RGP SI2301
25 41 50 30
B B
+DVDD12 +LCDVDD +3.3V_CARD +3.3V_DELAY
Power Shape
Regulator LDO Switch
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Power Block Diagram
Document Number Rev
www.vinafix.vn
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 3 of 59
5 4 3 2 1
A B C D E
ICH9M SMBus Block Diagram KBC SMBus Block Diagram
+5V_RUN
‧
SRN10KJ-5-GP
1 1
TouchPad Conn.
+3.3V_ALW +3.3V_RUN
PSDAT1
PSCLK1
TPDATA
TPCLK
‧‧ TPDATA
TPCLK
TPDATA
TPCLK
‧ ‧
45
+3.3V_RTC_LDO
+3.3V_RUN
ICH9M
SRN2K2J-1-GP
‧ SRN2K2J-1-GP
DIMM 1
‧
‧‧ ‧‧
SMBCLK SMB_CLK ICH_SMBCLK
SCL SRN4K7J-8-GP
SMBDATA SMB_DATA ICH_SMBDATA
SDA
16
Battery Conn.
‧‧ ‧‧ SRN100J-3-GP
20 SMBus Address:A0 SCL1 BAT_SCL PBAT_SMBCLK1 CLK_SMB
SMBus address:16
2N7002SPT
SDA1 BAT_SDA PBAT_SMBDAT1 DAT_SMB 31
DIMM 2
‧‧
ICH_SMBCLK
ICH_SMBDATA
SCL
SDA
17
KBC MAX8731
2
SMBus Address:A4 WPC773L SCL
SDA
SMBus address:12 2
32
Express Clock
Card
‧‧
SMB_CLK
SMB_CLK
ICH_SMBCLK
Generator +3.3V_RUN
SCLK
‧
SMB_DATA SMB_DATA
50 ICH_SMBDATA
SDATA
09
+3.3V_RTC_LDO
+3.3V_RUN
SMBus address:D2
‧ ‧ SRN4K7J-8-GP
Thermal
‧‧
Minicard THERM_SCL SCL SMBus address:7A
SRN4K7J-8-GP
THERM_SDA SDA 28
WLAN
‧
SMB_CLK
SMB_CLK
‧
SMB_DATA GPIO73/SCL2 KBC_SCL1
SMB_DATA 2N7002DW-1-GP
43
GPIO74/SDA2 KBC_SDA1
26
+3.3V_RUN
‧
3 3
SRN2K2J-1-GP
‧‧
DDC1CLK LDDC_CLK
DDC1DATA LDDC_DATA LCD Conn.
41
+3.3V_DELAY +5V_CRT_RUN
‧ ‧
VGA +3.3V_DELAY
SRN2K2J-1-GP
‧ SRN2K2J-1-GP
‧‧ ‧‧
DDC2CLK M92CRT_DDCCLK DDC_CLK_CON
DDC2DATA
M92CRT_DDCDATA DDC_DATA_CON CRT CONN
4 42 4
2N7002DW-1-GP
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SMBUS Block Diagram
www.vinafix.vn
54
Size Document Number Rev
C SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 4 of 59
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram
1 1
0R3-0-U-GP
SPKR_PORT_D_L+
SPKR_PORT_D_L-
AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_L1_R
AUD_SPK_L2_R
SPEAKER
SPKR_PORT_D_R- AUD_SPK_R2 AUD_SPK_R2_R
SPKR_PORT_D_R+ AUD_SPK_R1 AUD_SPK_R1_R
0R3-0-U-V-GP 44
HP1_PORT_B_L
HP1_PORT_B_R
AUD_HP1_JACK_L
AUD_HP1_JACK_R
HP
DP1 H_THERMDA THRMDA
OUT
SC470P50V3JN-2GP CPU
2
DN1 H_THERMDC THRMDC Codec 50 2
Thermal 92HD81
EMC2102 HP0_PORT_A_L
HP0_PORT_A_R
AUD_EXT_MIC_L
AUD_EXT_MIC_R
MIC
DP2 VGA_THERMDA DPLUS
VREFOUT_A_OR_F AUD_VREFOUT_B
IN
SC470P50V3JN-2GP GPU
DN2 VGA_THERMDC DMINUS 50
54
33R2J-2-GP
3 DMIC_CLK/GPIO1 AUD_DMIC_CLK AUD_DMIC_CLK_G_R Digital 3
DMIC0/GPIO2
AUD_DMIC_IN0
MIC
33R2J-2-GP AUD_DMIC_IN0_R
Array 47
DP3 CPU_THERMDA
MMBT3904-3-GP
SC470P50V3JN-2GP SC1U10V3KX-3GP
DN3 CPU_THERMDC AUD_INT_MIC_L INT_MIC_L_R
HW T8 sensor PORT_C_L
AUD_INT_MIC_R
Internal
28 PORT_C_R
MIC
VREFOUT_C AUD_VREFOUT_C
22 4K7R2J-2-GP 44
4 4
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Thermal/Audio Block Diagram
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 5 of 59
A B C D E
A B C D E
ICH9M Functional Strap Definitions ICH9 Integrated pull-up Cantiga chipset and ICH9M I/O controller
and pull-down Resistors Hub strapping configuration
ICH9 EDS 642879 Rev.1.5 ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 Rev.0.5
Signal Usage/When Sampled Comment SIGNAL Resistor Type/Value Pin Name Strap Description Configuration
HDA_SDOUT XOR Chain Entrance/ Allows entrance to XOR Chain testing when TP3 CL_CLK[1:0] PULL-UP 20K CFG[2:0] FSB Frequency Select 000 = FSB1067
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge 011 = FSB667
Rising Edge of PWROK. of PWROK, sets bit1 of RPC.PC (Cofig Registers: CL_DATA[1:0] PULL-UP 20K 010 = FSB800
others = Reserved
offset 224h). This signal has weak internal CL_RST0# PULL-UP 20K
4 pull-down. CFG[4:3] Reserved 4
DPRSLPVR/GPIO16 PULL-DOWN 20K CFG8
CFG[15:14]
HDA_SYNC PCIE config1 bit0, This signal has a weak internal pull-down. ENERGY_DETECT PULL-UP 20K CFG[18:17]
Rising Edge of PWROK. Sets bit0 of PRC.PC (Config Registers: Offset
224h). HDA_BIT_CLK PULL-DOWN 20K CFG5 DMI x2 Select 0 = DMI x2
1 = DMI x4 (Default)
HDA_DOCK_EN#/GPIO33 PULL-UP 20K
GNT2#/ PCIE config2 bit2, This signal has a weak internal pull-up. CFG6 iTPM Host Interface 0 = The iTPM Host Interface is enabled (Note 2)
GPIO53 Rising Edge of PWROK. Sets bit2 of PRC.PC2 (Config Registers: Offset HDA_RST# PULL-DOWN 20K 1 = The iTPM Host Interface is disabled (default)
224h). CFG7 Intel Management 0 = Transport Layer Security (TLS) cipher
HDA_SDIN[3:0] PULL-DOWN 20K
engine crypto strap suite with no confidentiality
GPIO20 Reserved. This signal should not be pulled high. HDA_SDOUT PULL-DOWN 20K 1 = TLS cipher suite with confidentiality(Default)
GNT1#/ ESI Strap (Server Only) ESI compatible mode is for server platforms only. HDA_SYNC PULL-DOWN 20K CFG9 PCIE Graphics Lane 0 = Reserved Lanes, 15->0, 14->1 ect..
GPIO51 Rising Edge of PWROK. This signal should not be pulled low for desktop 1 = Normal operation (Default): Lane Numbered in
and mobile. GLAN_DOCK# The pull-up or pull-down Order
active when configured
for native GLAN_DOCK# CFG10 PCIE Loopback enable 0 = Enable (Note 3)
GNT3#/ Top-Block Swap Sampled low: Top-Block Swap mode (inverts A16 for 1 = Disable (Default)
GPIO55 override. Rising Edge all cycles targeting FWH BIOS space). functionality and determined
of PWROK. Note: Software will not be able to clear the by LAN controller. CFG[13:12] XOR/ALL 00 = Reserve
10 = XOR mode Enabled
Top-Swap bit until the system is rebooted 01 = ALLZ mode Enable (Note 3)
without GNT3# being pulled down. GNT[3:0]#/GPIO[55,53,51] PULL-UP 20K 11 = Disabled (Default)
GPIO20 PULL-DOWN 20K CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled
GNT0#: Boot BIOS Destination Controllable via Boot BIOS Destination bit 1 = Dynamic ODT Enabled (Default)
SPI_CS1#/ Selection 0:1. (Config Registers: Offset 3410h:bit 11:10). GPIO49 PULL-UP 20K
3 GPIO58 Rising Edge of PWROK. GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC CFG19 DMI Lane Reversal 0 = Normal operation (Default): Lane Numbered in 3
LDA[3:0]#/FHW[3:0]# PULL-UP 20K Order
1 = Reverse Lanes
SPI_MOSI Integrated TPM Enable, Sample low: the Integrated TPM will be disable. LAN_RXD[2:0] PULL-UP 20K DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled DMI x2 mode [MCH->ICH]: (3->0, 2->1)
low and the TPM Disable bit is clear, the LDRQ[0] PULL-UP 20K
CFG20 Digital Display Port 0 = Only Digital Display Port or PCIE is
Integrated TPM will be enable. LDRQ[1]/GPIO23 PULL-UP 20K (SDVO/DP/iHDMI) operational (Default)
GPIO49 DMI Termination The signal is required to be low for desktop Concurrent with PCIe 1 = Digital display Port and PCIe are operating
simulataneously via the PEG port
PME# PULL-UP 20K
Voltage. Rising Edge applications and required to be high for mobile
of CLPWROK. applications. PWRBTN# PULL-UP 20K SDVO SDVO Present 0 = No SDVO Card Present (Default)
_CTRLDATA 1 = SDVO Card Present
SATALED# PULL-UP 15K
SATALED# PCI Express Lane Signal has weak internal pull-up. Sets bit 27 L_DDC_DATA Local Flat Panel 0 = LFP Disabled (Default)
Reversal. Rising Edge of MPC.LR (Device 28: Function 0:Offset D8). SPI_CS1#/GPIO58/CLGPIO6 PULL-UP 20K (LFP) Present 1 = LFP Card Present; PCIE disabled
of PWROK.
SPI_MOSI PULL-DOWN 20K
NOTE:
No Reboot. If sampled high, the system is strapped to the SPI_MISO PULL-UP 20K
SPKR Rising Edge of PWROK. "No Reboot" mode (ICH9 will disable the TCO Timer 1. All strap signals are sampled with respect to the leading edge of the (G)MCH
system reboot feature). The status is readable SPKR PULL-DOWN 20K Power OK (PWROK) signal.
via the NO REBOOT bit. 2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
TACH_[3:0] PULL-UP 20K the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
XOR Chain Entrance. This signal should not be pull low unless using TP[3] PULL-UP 20K Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.
TP3 Rising Edge of PWROK. XOR Chain testing.
USB[11:0][P,N] PULL-DOWN 15K
GPIO33/ Flash Descriptor Sampled low: the Flash Descriptor Security will be
HDA_DOCK Security Override overridden. If high, the security measures will be
2 _EN# Strap. Rising Edge of in effect. This should only be enabled in 2
PWROK. manufacturing environments using an external
pull-up resister.
PCIE Routing USB Table
USB
LANE2 MiniCard WLAN Pair Device
LANE3 LAN 0 USB1
1 USB2
LANE5 New Card 2 USB3
3 RESERVED
4 MINI CARD
5 RESERVED
1 6 BLUETOOTH <Core Design> 1
7 NEW CARD
8 RESERVED Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
9 RESERVED
Title
10 Card Reader
Table of Content
www.vinafix.vn
11 CAMERA Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 6 of 59
5 4 3 2 1
SSID = CLOCK NEWCARD_CLKREQ#
MINI1_CLKREQ#
R702 1
R701 1
2 10KR2J-3-GP
2 10KR2J-3-GP
+3.3V_RUN
NEWCARD_CLKREQ#
CLK_PCIE_NEW
3D3V_S0_CK505 3D3V_S0_CK505_IO CLK_PCIE_NEW#
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
SC22P50V2JN-4GP
3D3V_S0_CK505_IO CLK_XTAL_IN
ALBA X00
1
C709
C710
EC701
R703 X701
2 1 1 2 CLK_XTAL_OUT
DY DY
SC1U10V3KX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
2
D 0R3-0-U-GP X-14D31818M-50GP D
1
1
C701
C702
C703
C704
C705
C706
C707
C724
U701
16
46
62
23
19
27
43
52
33
56
4
9
C708 C711 ICS9LPRS355BKLFT-GP-U
DY DY SC12P50V2JN-3GP SC12P50V2JN-3GP
VDDREF
VDD48
VDDSRC
VDDCPU
VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO
VDDPCI
VDDPLL3
2
2
61 CLK_CPU_BCLK1 RN701 1 4 SRN0J-6-GP CLK_CPU_BCLK 8
CPUT0 CLK_CPU_BCLK1#
CPUC0 60 2 3 CLK_CPU_BCLK# 8
3 58 CLK_MCH_BCLK1 RN702 1 4 SRN0J-6-GP CLK_MCH_BCLK 10
X1 CPUT1_F CLK_MCH_BCLK1#
2 X2 CPUC1_F 57 2 3 CLK_MCH_BCLK# 10
50 CLK_48M_CARD R705 1 2 22R2J-2-GP
54 CLK_CPU_ITP1 RN703 1 4 SRN0J-6-GP CLK_CPU_ITP 43
CPUT2_ITP/SRCT8 CLK_CPU_ITP1#
CPUC2_ITP/SRCC8 53 2 3 CLK_CPU_ITP# 43
20 CLK_48M_ICH 1 R706 2 FSA 17
+3.3V_RUN 3D3V_S0_CK505 22R2J-2-GP USB_48MHZ/FSLA
1 CLK_PCIE_LAN1 RN704 SRN0J-6-GP
R704 C714 DY 2SC4D7P50V2CN-1GP SRCT7/CR#_F 51
50 CLK_PCIE_LAN1#
1
2
4
3
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
SRCC7/CR#_E
1 2 20 H_STP_PCI#
45 PCI_STOP# GM 20090310
SC1U10V3KX-3GP
CLK_PCIE_VGA1 RN712 SRN0J-6-GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
20 H_STP_CPU#
44 CPU_STOP# 48
SRCT6 1 4 CLK_PCIE_VGA 53
0R3-0-U-GP 47 CLK_PCIE_VGA1# 2 3 CLK_PCIE_VGA# 53
SRCC6
1
1
C715
C716
C717
C718
C719
C712
C720
C713
41 CLK_PCIE_NEW1 RN705 2 3 SRN0J-6-GP
DY 7
SRCT10
42 CLK_PCIE_NEW1# 1 4
CLK_PCIE_NEW 50
CLK_PCIE_NEW# 50
2
2
16,17,20,43 ICH_SMBCLK SCLK SRCC10
16,17,20,43 ICH_SMBDATA 6 SDATA
SRCT11 SRCT11/CR#_H 40 NEWCARD_CLKREQ# 50
20 CK_PWRGD 63 CK_PW RGD/PD#
SRCC11 SRCC11/CR#_G 39 MINI1_CLKREQ# 43
37 CLK_PCIE_MINI1_1 RN706 2 3 SRN0J-6-GP CLK_PCIE_MINI1 43
SRCT9 CLK_PCIE_MINI1_1#
C ALBA X00 CLKSATAREQ# 8
SRCC9 38 1 4 CLK_PCIE_MINI1# 43 C
20 CLKSATAREQ# R708 1 PCI0/CR#_A
11 CLKREQ#_B 2 475R2F-L1-GP CLKREQ#_1 10 PCI1/CR#_B SRCT4 34 CLK_MCH_3GPLL1 RN707 2 3 SRN0J-6-GP CLK_MCH_3GPLL 11
R707 1 2 33R2J-2-GP PCI2_TME 11 35 CLK_MCH_3GPLL1# 1 4
43 PCLK_FWH DY 12
PCI2/TME SRCC4 CLK_MCH_3GPLL# 11
R709 1 PCI3
26 PCLK_KBC 2 33R2J-2-GP 27_SEL 13 PCI4/27_SELECT SRCT3/CR#_C 31 CLK_PCIE_ICH1 RN708 2 3 SRN0J-6-GP CLK_PCIE_ICH 19
19 CLK_PCI_ICH R710 1 2 33R2J-2-GP ITP_EN 14 32 CLK_PCIE_ICH1# 1 4 CLK_PCIE_ICH# 19
PCI_F5/ITP_EN SRCC3/CR#_D
28 CLK_PCIE_SATA1 RN709 2 3 SRN0J-6-GP CLK_PCIE_SATA 18
SRCT2/SATAT CLK_PCIE_SATA1#
SRCC2/SATAC 29 1 4 CLK_PCIE_SATA# 18
FSB 64
R711 1 FSLB/TEST_MODE
20 CLK_14M_ICH 2 33R2J-2-GP FSC 5 REF0/FSLC/TEST_SEL
24 MCH_SSCDREFCLK1 RN711 2 3 SRN0J-6-GP
GM
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
27MHZ_NONSS/SRCT1/SE1 MCH_SSCDREFCLK 11
55 25 MCH_SSCDREFCLK1# 1 4 MCH_SSCDREFCLK# 11
NC#55 27MHZ_SS/SRCC1/SE2
20 CLK_MCH_DREFCLK1 RN710 2 3 SRN0J-6-GP
GM CLK_MCH_DREFCLK 11
GNDSRC
GNDSRC
GNDSRC
GNDCPU
SRCT0/DOTT_96
GNDREF
1
GNDPCI
C721
C722
C723
21 CLK_MCH_DREFCLK1# 1 4 CLK_MCH_DREFCLK# 11
GND48
SRCC0/DOTC_96
DY DY DY
GND
GND
GND
2
GM 20090310
18
15
1
22
30
36
49
59
26
65
Main source: 71.08513.003 (SLG8SP513VTR) GM 20090311
Second source: 71.00875.C03 (RTM875N-606-VD-GRT)
MCH_SSCDREFCLK1 R712 1 2 0R2J-2-GP
PM CLK_VGA_27M_NSS 54
3D3V_S0_CK505
B B
2
R724
3D3V_S0_CK505 3D3V_S0_CK505 PM 10KR2J-3-GP
MCH_SSCDREFCLK1 MCH_SSCDREFCLK1#
1
27_SEL
1
EC702 EC703
DY DY
2
R713 ITP_EN Output R714 SC47P50V2JN-3GP SC47P50V2JN-3GP
2
10KR2J-3-GP 10KR2J-3-GP R715
0 SRC8 PCI2_TME Output GM 10KR2J-3-GP
2
ITP_EN 1 CPU_ITP PCI2_TME
1
0 Overclocking of CPU and SRC allowed
1
R716 R717 27_SEL PIN 20 PIN 21
DY 10KR2J-3-GP 10KR2J-3-GP 1 Overclocking of CPU and SRC not allowed
DY UMA
0 DOT96T DOT96C
2
1 SRCT0 SRCC0 Discrete
SEL2 SEL1 SEL0
CPU FSB R718 1 2 10KR2J-3-GP FSC
A FSC FSB FSA 8 CPU_BSEL2
<Core Design>
A
R719 1 2 0R2J-2-GP FSB
8 CPU_BSEL1
1 0 1 100M X
133M 533M
8 CPU_BSEL0
R720 1 2 2K2R2J-2-GP FSA
Wistron Corporation
0 0 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R721 1 2 1KR2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.
0 1 1 166M 667M MCH_CLKSEL0 11
R722 1 2 1KR2J-1-GP Title
0 1 0 200M 800M MCH_CLKSEL1 11
0 0 0 266M 1067M R723 1 2 1KR2J-1-GP MCH_CLKSEL2 11
Clock Generator SLG8SP513VTR
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 7 of 59
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1A 1 OF 4 1 TP814
H_A#3 J4 H1 H_ADS# 10
H_A#4 A3# ADS#
L5 E2
D H_A#5 L4
A4#
A5#
BNR#
BPRI# G5
H_BNR# 10
H_BPRI# 10
D
ADDR GROUP 0
H_A#6 K5
H_A#[35..3] H_A#7 A6#
10 H_A#[35..3] M3 A7# DEFER# H5 H_DEFER# 10
H_A#8 N2 F21
CONTROL
A8# DRDY# H_DRDY# 10
H_A#9 J1 E1 H_DBSY# 10
H_A#10 A9# DBSY#
N3 A10#
H_A#11 P5 F1 H_BREQ#0 10
H_A#12 A11# BR0# H_DINV#[3..0]
P2 A12# H_DINV#[3..0] 10
H_A#13 L2 D20 CPU_IERR# R804 1 2 56R2J-4-GP +1.05V_VCCP
H_A#14 A13# IERR# H_DSTBN#[3..0]
P4 A14# INIT# B3 H_INIT# 18 H_DSTBN#[3..0] 10
H_A#15 P1
H_A#16 A15# H_DSTBP#[3..0]
R1 A16# LOCK# H4 H_LOCK# 10 H_DSTBP#[3..0] 10
10 H_ADSTB#0 M1 ADSTB0# H_CPURST# 10,43
C1 H_CPURST# H_D#[63..0]
10 H_REQ#[4..0] RESET# H_RS#[2..0] 10 H_D#[63..0] 10
H_REQ#0 K3 F3 H_RS#0
H_REQ#1 REQ0# RS0# H_RS#1
H2 REQ1# RS1# F4
H_REQ#2 K2 G3 H_RS#2
H_REQ#3 REQ2# RS2#
J3 REQ3# TRDY# G2 H_TRDY# 10
H_REQ#4 L1 REQ4# CPU1B 2 OF 4
HIT# G6 H_HIT# 10
H_A#17 Y2 E4 H_HITM# 10
H_A#18 A17# HITM# H_D#0 H_D#32
U5 A18# E22 D0# D32# Y22
H_A#19 R3 AD4 ITP_BPM#0 ITP_BPM#0 43 H_D#1 F24 AB24 H_D#33
H_A#20 A19# BPM0# ITP_BPM#1 H_D#2 D1# D33# H_D#34
W6 AD3 ITP_BPM#1 43 E26 V24
XDP/ITP SIGNALS
H_A#21 A20# ADDR GROUP 1 BPM1# ITP_BPM#2 H_D#3 D2# D34# H_D#35
U4 A21# BPM2# AD1 ITP_BPM#2 43 G22 D3# D35# V26
H_A#22 Y5 AC4 ITP_BPM#3 ITP_BPM#3 43 H_D#4 F23 V23 H_D#36
A22# BPM3# D4# D36#
DATA GRP0
DATA GRP2
H_A#23 U1 AC2 ITP_BPM#4 ITP_BPM#4 43 H_D#5 G25 T22 H_D#37
H_A#24 A23# PRDY# ITP_BPM#5 H_D#6 D5# D37# H_D#38
R4 A24# PREQ# AC1 ITP_BPM#5 43 E25 D6# D38# U25
H_A#25 T5 AC5 ITP_TCK ITP_TCK 43 H_D#7 E23 U23 H_D#39
H_A#26 A25# TCK ITP_TDI H_D#8 D7# D39# H_D#40
T3 AA6 ITP_TDI 43 K24 Y25
C H_A#27
H_A#28
W2
A26#
A27#
TDI
TDO AB3 ITP_TDO
ITP_TMS
ITP_TDO 43 H_D#9
H_D#10
G24
D8#
D9#
D40#
D41# W 22 H_D#41
H_D#42
C
W5 A28# TMS AB5 ITP_TMS 43 J24 D10# D42# Y23
H_A#29 Y4 AB6 ITP_TRST# ITP_TRST# 43 H_D#11 J23 W 24 H_D#43
H_A#30 A29# TRST# ITP_DBRESET# H_D#12 D11# D43# H_D#44
U2 A30# DBR# C20 ITP_DBRESET# 20,43 H22 D12# D44# W 25
H_A#31 V4 H_D#13 F26 AA23 H_D#45
H_A#32 A31# R805 1 D13# D45#
W3 2 0R2J-2-GP H_D#14 K22 AA24 H_D#46
H_A#33 AA4
A32#
THERMAL DY CPU_PROCHOT# 34
H_D#15 H23
D14# D46#
AB25 H_D#47
H_A#34 A33# R806 1 D15# D47#
AB2 A34# 2 56R2J-4-GP +1.05V_VCCP 10 H_DSTBN#0 J26 DSTBN0# DSTBN2# Y26 H_DSTBN#2 10
H_A#35 AA3 D21 H26 AA26 H_DSTBP#2 10
A35# PROCHOT# 10 H_DSTBP#0 DSTBP0# DSTBP2#
V1 A24 H_THERMDA H25 U22 H_DINV#2 10
10 H_ADSTB#1 ADSTB1# THRMDA H_THERMDA 28 10 H_DINV#0 DINV0# DINV2#
B25 H_THERMDC
THRMDC H_THERMDC 28
18 H_A20M# A6 A20M#
18 H_FERR# A5 C7 H_THRMTRIP# 11,18,26,30,54 H_D#16 N22 AE24 H_D#48
FERR# THERMTRIP# D16# D48#
ICH
18 H_IGNNE# C4 H_D#17 K25 AD24 H_D#49
IGNNE# R810 1 D17# D49#
2 56R2J-4-GP H_THRMTRIP# should connect to H_D#18 P26 AA21 H_D#50
D5
DY +1.05V_VCCP
H_D#19 R23
D18# D50#
AB22 H_D#51
18 H_STPCLK# STPCLK# ICH9 and MCH without T-ing. H_D#20 D19# D51# H_D#52
18 H_INTR C6 LINT0 HCLK BCLK0 A22 CLK_CPU_BCLK 7 L23 D20# D52# AB21
18 H_NMI B4 A21 CLK_CPU_BCLK# 7 H_D#21 M24 AC26 H_D#53
LINT1 BCLK1 D21# D53#
DATA GRP3
DATA GRP1
18 H_SMI# A3 H_D#22 L22 AD20 H_D#54
SMI# H_D#23 D22# D54# H_D#55
M23 D23# D55# AE22
RSVD_CPU_1 M4 H_D#24 P25 AF23 H_D#56
TP807 RSVD#M4 D24# D56#
RSVD_CPU_2 N5 H_D#25 P23 AC25 H_D#57
TP808 RSVD#N5 D25# D57#
RSVD_CPU_3 T2 H_D#26 P22 AE21 H_D#58
RESERVED
TP802 RSVD#T2 D26# D58#
RSVD_CPU_4 V3 H_D#27 T24 AD21 H_D#59
TP804 RSVD#V3 +1.05V_VCCP D27# D59#
RSVD_CPU_5 B2 H_D#28 R24 AC22 H_D#60
TP803 RSVD#B2 D28# D60#
RSVD_CPU_6 C3 H_D#29 L25 AD23 H_D#61
TP805 RSVD#C3 TEST7 D29# D61#
RSVD_CPU_7 D2 H_D#30 T25 AF22 H_D#62
TP813 RSVD#D2 D30# D62#
2
RSVD_CPU_8 D22 H_D#31 N25 AC23 H_D#63
TP810 RSVD#D22 D31# D63#
RSVD_CPU_9 D3 R814 L26 AE25 H_DSTBN#3 10
TP806 RSVD#D3 10 H_DSTBN#1 DSTBN1# DSTBN3#
RSVD_CPU_10 F6 1KR2F-3-GP M26 AF24 H_DSTBP#3 10
TP809 RSVD#F6 10 H_DSTBP#1 DSTBP1# DSTBP3#
B RSVD_CPU_11 B1
10 H_DINV#1 N24 DINV1# DINV3# AC20 H_DINV#3 10 B
TP801
1
KEY_NC CPU_GTLREF0 COMP0 R812 27D4R2F-L1-GP
AD26 GTLREF COMP0 R26 1 2
BGA479-SKT6-GPU7 R807 1 2 1KR2J-1-GP TEST1 C23 MISC U26 COMP1 R811 1 2 54D9R2F-L1-GP
DY TEST1 COMP1
1
1
62.10040.221 R809 1 2 1KR2J-1-GP TEST2 D25 AA1 COMP2 R803 1 2 27D4R2F-L1-GP
R813 C802 R808 1 DY 2 1KR2J-1-GP CPU_TEST3 C24
TEST2 COMP2
Y1 COMP3 R802 1 2 54D9R2F-L1-GP
2KR2F-3-GP SC1KP50V2KX-1GP DY AF26
TEST3 COMP3
2 R801 1 TEST4
2 1KR2J-1-GP CPU_TEST5 AF1 E5
DY A26
TEST5 DPRSTP#
B5
H_DPRSTP# 11,18,34
H_DPSLP# 18
2
TEST6 DPSLP#
DPW R# D24 H_DPWR# 10
7 CPU_BSEL0 B22 BSEL0 PW RGOOD D6 H_PWRGOOD 18,30
7 CPU_BSEL1 B23 BSEL1 SLP# D7 H_CPUSLP# 10
X01 20090112 7 CPU_BSEL2 C21 BSEL2 PSI# AE6 PSI# 34
Layout notes BGA479-SKT6-GPU7
62.10040.221
Z= 55 Ohm 0.5" MAX for CPU_GTLREF0
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5".
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5".
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU-FSB(1/2)
www.vinafix.vn Size
Custom
Document Number
Date: Monday, March 23, 2009
Alba Discrete
Sheet 8 of
Rev
59
SB
5 4 3 2 1
SSID = CPU
+VCC_CORE
CPU1D 4 OF 4
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
A4 VSS VSS P6
1
C915
C922
C919
C908
C938
C902
C903
C901
C934
C935
A8 VSS VSS P21
C907 A11 P24
DY DY DY DY DY DY DY DY SC22U6D3V5MX-2GP A14
VSS VSS
R2
2
VSS VSS
A16 VSS VSS R5
A19 VSS VSS R22
D D
A23 VSS VSS R25
+VCC_CORE +VCC_CORE AF2 T1
VSS VSS
X01 20090106 B6
B8
VSS VSS T4
T23
CPU1C3 OF 4 VSS VSS
B11 VSS VSS T26
+VCC_CORE B13 U3
VSS VSS
A7 VCC VCC AB20 B16 VSS VSS U6
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
A9 VCC VCC AB7 B19 VSS VSS U21
A10 VCC VCC AC7 B21 VSS VSS U24
A12 VCC VCC AC9 B24 VSS VSS V2
1
C911
C912
C931
C916
C921
C927
C936
C910
C932
C933
A13 VCC VCC AC12 C5 VSS VSS V5
A15 AC13 C914 C8 V22
A17
VCC VCC
AC15
DY DY DY DY DY DY SC22U6D3V5MX-2GP C11
VSS VSS
V25
2
VCC VCC VSS VSS
A18 VCC VCC AC17 C14 VSS VSS W1
A20 VCC VCC AC18 C16 VSS VSS W4
B7 VCC VCC AD7 C19 VSS VSS W 23
B9 VCC VCC AD9 C2 VSS VSS W 26
B10 VCC VCC AD10 C22 VSS VSS Y3
B12 VCC VCC AD12 C25 VSS VSS Y6
B14 AD14 +VCC_CORE D1 Y21
VCC VCC VSS VSS
B15 VCC VCC AD15 D4 VSS VSS Y24
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
B17 VCC VCC AD17 D8 VSS VSS AA2
B18 VCC VCC AD18 D11 VSS VSS AA5
B20 VCC VCC AE9 D13 VSS VSS AA8
1
C909
C913
C920
C918
C917
C928
C929
C930
C937
C9 VCC VCC AE10 D16 VSS VSS AA11
C10 AE12 C926 D19 AA14
C12
VCC VCC
AE13
DY DY SC22U6D3V5MX-2GP D23
VSS VSS
AA16
2
VCC VCC VSS VSS
C13 VCC VCC AE15 D26 VSS VSS AA19
C15 VCC VCC AE17 E3 VSS VSS AA22
C C17 VCC VCC AE18 E6 VSS VSS AA25 C
C18 VCC VCC AE20 E8 VSS VSS AB1
D9
D10
VCC VCC AF9
AF10
X01 20090106 E11
E14
VSS VSS AB4
AB8
VCC VCC VSS VSS
D12 VCC VCC AF12 E16 VSS VSS AB11
D14 VCC VCC AF14 E19 VSS VSS AB13
D15 VCC VCC AF15 E21 VSS VSS AB16
D17 VCC VCC AF17 E24 VSS VSS AB19
D18 VCC VCC AF18 F5 VSS VSS AB23
E7 AF20 +1.05V_VCCP F8 AB26
VCC VCC VSS VSS
ST220U2D5VBM-LGP
SCD1U10V2KX-4GP
E9 VCC F11 VSS VSS AC3
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
E10 VCC VCCP G21 F13 VSS VSS AC6
E12 VCC VCCP V6 F16 VSS VSS AC8
1
1
TC901
C923
C924
C925
C906
C904
C905
E13 VCC VCCP J6 F19 VSS VSS AC11
E15 K6 F2 AC14
E17
VCC VCCP
M6
DY F22
VSS VSS
AC16
2
2
VCC VCCP VSS VSS
E18 VCC VCCP J21 F25 VSS VSS AC19
E20 VCC VCCP K21 G4 VSS VSS AC21
F7 VCC VCCP M21 G1 VSS VSS AC24
F9 VCC VCCP N21 G23 VSS VSS AD2
F10 VCC VCCP N6 G26 VSS VSS AD5
F12 VCC VCCP R21 H3 VSS VSS AD8
F14 VCC VCCP R6 H6 VSS VSS AD11
F15 VCC VCCP T21 H21 VSS VSS AD13
F17 VCC VCCP T6 layout note: "+1.5V_VCCA" H24 VSS VSS AD16
F18 VCC VCCP V21
as short as possible +1.5V_VCCA +1.5V_RUN
J2 VSS VSS AD19 NCTF
F20 W 21 J5 AD22
AA7
VCC VCCP R903 J22
VSS VSS
AD25
PIN
VCC VSS VSS CPU_GND1
AA9 VCC VCCA B26 1 2 J25 VSS VSS AE1 TP902
AA10 VCC VCCA C26 K1 VSS VSS AE4
B AA12 CPU_VID[6..0] 34 0R3-0-U-GP K4 AE8 B
VCC CPU_VID0 VSS VSS
AA13 VCC VID0 AD6 K23 VSS VSS AE11
1
AA15 AF5 CPU_VID1 Layout Note: K26 AE14
VCC VID1 CPU_VID2 C939 C940 VSS VSS
AA17 AE5 L3 AE16
AA18
VCC VID2
AF4 CPU_VID3 SCD01U16V2KX-3GP SC10U6D3V5MX-3GP Place as close as possible L6
VSS VSS
AE19
2
VCC VID3 VSS VSS
AA20 VCC VID4 AE3 CPU_VID4 to the CPU VCCA pin. L21 VSS VSS AE23
AB9 AF3 CPU_VID5 L24 AE26 CPU_GND2
VCC VID5 PG901 VSS VSS TP901
AC10 AE2 CPU_VID6 M2 A2 CPU_GND3
VCC VID6 VSS VSS TP903
AB10 R902 1 2 1 2 +VCC_CORE M5 AF6
VCC 100R2F-L1-GP-U VSS VSS
AB12 VCC M22 VSS VSS AF8
AB14 AF7 GAP-CLOSE-PWR-3-GP VCC_SENSE 34 M25 AF11
VCC VCCSENSE VSS VSS
AB15 VCC VCC_SENSE and VSS_SENSE lines N1 VSS VSS AF13
AB17 N4 AF16
AB18
VCC
AE7
should be of equal length. N23
VSS VSS
AF19
VCC VSSSENSE VSS_SENSE 34 VSS VSS
N26 VSS VSS AF21
P3 A25 CPU_GND4
PG902 VSS VSS TP904
BGA479-SKT6-GPU7 AF25
R901 1 VSS
62.10040.221 2 1 2
100R2F-L1-GP-U GAP-CLOSE-PWR-3-GP BGA479-SKT6-GPU7
62.10040.221
X01 20090106
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU-Power(2/2)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 9 of 59
5 4 3 2 1
5 4 3 2 1
SSID = MCH
U1001A 1 OF 10 H_A#[35..3]
H_A#[35..3] 8
H_D#[63..0] A14 H_A#3
D 8 H_D#[63..0]
H_D#0 F2 H_D#_0
H_A#_3
H_A#_4 C15 H_A#4 D
H_D#1 G8 F16 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
F8 H_D#_2 H_A#_6 H13
H_D#3 E6 C18 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
G2 H_D#_4 H_A#_8 M16
H_D#5 H6 J13 H_A#9
H_D#6 H_D#_5 H_A#_9 H_A#10
H2 H_D#_6 H_A#_10 P16
H_D#7 F6 R16 H_A#11
H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
H_D#13 J2 G20 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
C +1.05V_VCCP H_D#30
H_D#31
N10
H_D#_29
H_D#_30
H_A#_33
H_A#_34 K21 H_A#34
H_A#35
C
H_SWING routing Trace width and M3 H_D#_31 H_A#_35 L20
H_D#32 Y3
Spacing use 10 / 20 mil H_D#_32
1
H_D#33 AD14 H12 H_ADS# 8
R1003 H_D#34 H_D#_33 H_ADS#
Y6 H_D#_34 H_ADSTB#_0 B16 H_ADSTB#0 8
221R2F-2-GP H_D#35 Y10 G17 H_ADSTB#1 8
H_D#36 H_D#_35 H_ADSTB#_1
H_SWING Resistors and Y12 H_D#_36 H_BNR# A9 H_BNR# 8
H_D#37 Y14 F11 H_BPRI# 8
Capacitors close MCH
2
H_D#38 H_D#_37 H_BPRI#
Y7 G12
HOST
H_D#_38 H_BREQ# H_BREQ#0 8
500 mil ( MAX ) H_SWING H_D#39 W2 H_D#_39 H_DEFER# E9 H_DEFER# 8
H_D#40 AA8 B10 H_DBSY# 8
H_D#_40 H_DBSY#
1
H_D#41 Y9 AH7 CLK_MCH_BCLK 7
H_D#_41 HPLL_CLK
1
C1001 R1002 H_D#42 AA13 AH6 CLK_MCH_BCLK# 7
SCD1U10V2KX-4GP 100R2F-L1-GP-U H_D#43 H_D#_42 HPLL_CLK#
AA9 H_D#_43 H_DPW R# J11 H_DPWR# 8
H_D#44 AA11 F9 H_DRDY# 8
2
H_D#45 H_D#_44 H_DRDY#
AD11 H9 H_HIT# 8
2
H_D#46 H_D#_45 H_HIT#
AD10 H_D#_46 H_HITM# E12 H_HITM# 8
H_D#47 AD13 H11 H_LOCK# 8
H_D#48 H_D#_47 H_LOCK#
AE12 H_D#_48 H_TRDY# C9 H_TRDY# 8
H_D#49 AE9
H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
H_D#52 H_D#_51 H_DINV#[3..0]
AA3 H_D#_52 H_DINV#[3..0] 8
H_RCOMP routing Trace width and H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1
AD7 L3
Spacing use 10 / 20 mil H_D#55 AE14
H_D#_54 H_DINV#_1
Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3
AF3 H_D#_56 H_DINV#_3 Y1
H_D#57 AC1 H_DSTBN#[3..0]
H_D#_57 H_DSTBN#[3..0] 8
1 2 H_RCOMP H_D#58 AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0
R1001 24D9R2F-L-GP H_D#59 AC3 M7 H_DSTBN#1
H_D#_59 H_DSTBN#_1
B H_D#60
H_D#61
AE11
AE8
H_D#_60 H_DSTBN#_2 AA5
AE6
H_DSTBN#2
H_DSTBN#3
B
H_D#62 H_D#_61 H_DSTBN#_3 H_DSTBP#[3..0]
Place R1001 near to the chip ( < 0.5") AG2 H_D#_62 H_DSTBP#[3..0] 8
H_D#63 AD6 L9 H_DSTBP#0
H_D#_63 H_DSTBP#_0 H_DSTBP#1
H_DSTBP#_1 M8
AA6 H_DSTBP#2
H_DSTBP#_2 H_DSTBP#3
H_DSTBP#_3 AE5
H_REQ#[4..0]
H_REQ#[4..0] 8
B15 H_REQ#0
+1.05V_VCCP H_SWING H_REQ#_0 H_REQ#1
C5 H_SW ING H_REQ#_1 K13
H_RCOMP E3 F13 H_REQ#2
H_RCOMP H_REQ#_2 H_REQ#3
H_REQ#_3 B13
2
8,43 H_CPURST# C12 B14 H_REQ#4
R1004 H_CPURST# H_REQ#_4 H_RS#[2..0]
8 H_CPUSLP# E11 H_CPUSLP# H_RS#[2..0] 8
1KR2F-3-GP B6 H_RS#0
H_RS#_0 H_RS#1
H_RS#_1 F12
A11 C8 H_RS#2
1
H_AVREF H_AVREF H_RS#_2
B11 H_DVREF
CANTIGA-GM-GP-U-NF
1
R1005 C1002
2KR2F-3-GP DY SCD1U16V2KX-3GP
2
2
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cantiga-HOST(1/6)
www.vinafix.vn Size
Custom
Document Number
Date: Monday, March 23, 2009
Alba Discrete
Sheet 10 of
Rev
59
SB
5 4 3 2 1 +1.8V_SUS
U1001B 2 OF 10
SSID = MCH M36 RESERVED#M36
2
DDR CLK/ CONTROL/COMPENSATION
N36 RESERVED#N36 SA_CK_0 AP24 M_CLK_DDR0 16
R33 AT21 M_CLK_DDR1 16 R1113
RESERVED#R33 SA_CK_1 +1.8V_SUS 1KR2F-3-GP
T33 AV24
* is current setting AH9
AH10
RESERVED#T33
RESERVED#AH9
SB_CK_0
SB_CK_1 AU20
M_CLK_DDR2
M_CLK_DDR3
17
17
1
RESERVED#AH10
1
CFG Strap Low High AH12 RESERVED#AH12 SA_CK#_0 AR24 M_CLK_DDR#0 16
AH13 AR21 M_CLK_DDR#1 16 R1126 SM_RCOMP_VOH
RESERVED#AH13 SA_CK#_1
CFG 5 DMI X 2 DMI X 4
* K12 RESERVED#K12 SB_CK#_0 AU24 M_CLK_DDR#2 17 80D6R2F-L-GP
1
AL34 AV20 M_CLK_DDR#3 17 C1105
RESERVED#AL34 SB_CK#_1
CFG 6 ITPM enable ITPM disable
* AK34 C1104 SCD01U16V2KX-3GP R1109
2
RESERVED#AK34 SC2D2U10V3KX-1GP 3K01R2F-3-GP
AN35 BC28
D M_CKE0 16
D
2
RESERVED#AN35 SA_CKE_0
CFG 7
TLS cipher suite with
no confidentiality
TLS cipher suite with
confidentiality * AM35
T24
RESERVED#AM35 SA_CKE_1 AY28
AY36
M_CKE1
M_CKE2
16
17
2
RESERVED#T24 SB_CKE_0
1
SB_CKE_1 BB36 M_CKE3 17
RSVD
numbered in oder *
PCIE GFX lane B31 R1125 SM_RCOMP_VOL
RESERVED#B31 80D6R2F-L-GP
CFG 9 PCIE GFX lane reversed B2 RESERVED#B2 SA_CS#_0 BA17 M_CS0# 16
2
M1 RESERVED#M1 SA_CS#_1 AY16 M_CS1# 16
1
AV16 M_CS2# 17 C1103 R1111
2
SB_CS#_0
CFG 10 PCIE loopback enable PCIE loopback disable
* AY21
SB_CS#_1 AR13 M_CS3# 17 C1102
SC2D2U10V3KX-1GP
SCD01U16V2KX-3GP 1KR2F-3-GP
2
RESERVED#AY21
CFG 12 ALLZ mode enable ALLZ mode disable
* BD17 M_ODT0 16
1
SA_ODT_0
SA_ODT_1 AY17 M_ODT1 16
CFG 13 XOR mode enable XOR mode disable
* BG23 RESERVED#BG23
SB_ODT_0
SB_ODT_1
BF15
AY13
M_ODT2
M_ODT3
17
17
+1.8V_SUS
CFG 16 FSB dynamic ODT disable
*
FSB Dynamic ODT enable BF23
BH18
RESERVED#BF23
RESERVED#BH18 SM_RCOMP BG22 M_RCOMPP
1
CFG 19 BF18 BH21 M_RCOMPN
RESERVED#BF18 SM_RCOMP# +V_DDR_MCH_REF
DMI Lane Reserved
CFG 20
* Reverse
Normal operation DMI lanes
PCIE and SDVO are
SM_RCOMP_VOH BF28
BH28
SM_RCOMP_VOH
SM_RCOMP_VOL
R1119
DY10KR2F-2-GP
SM_RCOMP_VOL
SDVO concurrent Only PCIE or SDVO
* operatiing simultaneously
2
AV42 CANTIGA_SM_VREF 1 2
with PCIE is operational via the PEG port SM_VREF
AR36
SM_PW ROK
1
SM_REXT R1139
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SM_REXT BF17 1 2
* SDVOLFPinterface
C1144
C1143
SDVO_CTRLDATA SDVO interface disable enable BC36 R1123 0R3-0-U-GP
SM_DRAMRST#
1
499R2F-2-GP R1129
DY DY DY10KR2F-2-GP
L_DDC_DATA LFP disable
* card present DPLL_REF_CLK B38
A38
CLK_MCH_DREFCLK
CLK_MCH_DREFCLK# CLK_MCH_DREFCLK 7
2
DPLL_REF_CLK# CLK_MCH_DREFCLK# 7
interface disabled *
DDPC_CTRLDATA SDVO/iHDMI/DP SDVO/iHDMI/DP E41 MCH_SSCDREFCLK
DPLL_REF_SSCLK MCH_SSCDREFCLK# MCH_SSCDREFCLK 7
F41
interface enabled DPLL_REF_SSCLK# MCH_SSCDREFCLK# 7
C PEG_CLK F43 CLK_MCH_3GPLL
CLK_MCH_3GPLL# CLK_MCH_3GPLL 7 GM 20090310 C
CLK
PEG_CLK# E43 CLK_MCH_3GPLL# 7
+3.3V_RUN
AE41 DMI_ITXN0_MRXN0 DMI_ITXN0_MRXN0 19 RN1102
DMI_RXN_0
R1105 1 2 2K21R2F-GP CFG11 AE37 DMI_ITXN1_MRXN1 CLK_MCH_DREFCLK 2 3
DY DMI_RXN_1
AE47 DMI_ITXN2_MRXN2
DMI_ITXN1_MRXN1
DMI_ITXN2_MRXN2
19
19 CLK_MCH_DREFCLK# 1
PM 4
R1115 1 DMI_RXN_2
2 2K21R2F-GP CFG18 AH39 DMI_ITXN3_MRXN3
DY FSB setting
DMI_RXN_3 DMI_ITXN3_MRXN3 19
SRN0J-6-GP
R1110 1 2 4K02R2F-GP CFG19 AE40 DMI_ITXP0_MRXP0
DY 7 MCH_CLKSEL0 T25
DMI_RXP_0
AE38 DMI_ITXP1_MRXP1
DMI_ITXP0_MRXP0
DMI_ITXP1_MRXP1
19
19 RN1103
R1112 1 CFG_0 DMI_RXP_1
2 4K02R2F-GP CFG20 R25 AE48 DMI_ITXP2_MRXP2 MCH_SSCDREFCLK 2 3
DY 7 MCH_CLKSEL1
7 MCH_CLKSEL2 P25
CFG_1 DMI_RXP_2
AH40 DMI_ITXP3_MRXP3
DMI_ITXP2_MRXP2
DMI_ITXP3_MRXP3
19
19 MCH_SSCDREFCLK# 1
PM 4
RN1101 CFG3 CFG_2 DMI_RXP_3
P20 CFG_3
DMI
4 1 PM_EXTTS#0 TP1103 CFG4 P24 AE35 DMI_IRXN0_MTXN0 SRN0J-6-GP
PM_EXTTS#1 TP1105 CFG5 CFG_4 DMI_TXN_0 DMI_IRXN1_MTXN1 DMI_IRXN0_MTXN0 19
3 2 C25 CFG_5 DMI_TXN_1 AE43 DMI_IRXN1_MTXN1 19
CFG6 N24 AE46 DMI_IRXN2_MTXN2
SRN10KJ-5-GP CFG7 CFG_6 DMI_TXN_2 DMI_IRXN3_MTXN3 DMI_IRXN2_MTXN2 19
M24 CFG_7 DMI_TXN_3 AH42 DMI_IRXN3_MTXN3 19 GM 20090310
CFG
CFG8 E21
CFG9 CFG_8 DMI_IRXP0_MTXP0
C23 CFG_9 DMI_TXP_0 AD35 DMI_IRXP0_MTXP0 19
R1128 1 2 2K21R2F-GP CFG5 CFG10 C24 AE44 DMI_IRXP1_MTXP1
DY CFG11 N21
CFG_10 DMI_TXP_1
AF46 DMI_IRXP2_MTXP2 DMI_IRXP1_MTXP1 19
R1108 1 CFG_11 DMI_TXP_2 DMI_IRXP2_MTXP2 19
2 2K21R2F-GP CFG6 CFG12 P21 AH43 DMI_IRXP3_MTXP3
DY CFG13 T21
CFG_12 DMI_TXP_3 DMI_IRXP3_MTXP3 19
R1107 1 CFG_13
2 2K21R2F-GP CFG7 TP1101 CFG14 R20
DY TP1102 CFG15 M20
CFG_14
R1103 1 CFG_15
2 2K21R2F-GP CFG8 CFG16 L21
DY TP1104 CFG17 CFG_16
GRAPHICS VID
H21 CFG_17
R1127 1 2 4K02R2F-GP CFG9 CFG18 P29 +1.05V_VCCP +3.3V_RUN
B DY CFG19 R28
CFG_18
B
CFG_19
R1124 1 2 2K21R2F-GP CFG10 CFG20 T28 B33
DY CFG_20 GFX_VID_0
B32
GFX_VID_1
1
R1102 1 2 2K21R2F-GP CFG12 G33
DY GFX_VID_2
F33 R1121 R1122
R1106 1 2 2K21R2F-GP CFG13 R29
GFX_VID_3
E33 56R2J-4-GP DY 10KR2J-3-GP
DY 20 PM_SYNC#
8,18,34 H_DPRSTP# B7
PM_SYNC# GFX_VID_4
R1104 1 PM_DPRSTP#
2 2K21R2F-GP CFG16 N33
DY 16 PM_EXTTS#0
2
PM_EXT_TS#_0
17 PM_EXTTS#1 P32 PM_EXT_TS#_1
PM
PWROK_R AT40 C34 TSATN#_KBC TSATN#_KBC 26
R1118 RSTIN# PW ROK GFX_VR_EN +1.05V_VCCP
AT11
C
RSTIN#
20,26,28 PM_PWROK 1 2 T20 THERMTRIP#
2
R32 TSATN# B Q1101
0R2J-2-GP DPRSLPVR R1114 DY MMBT3904WT1G-GP
AH37 1KR2F-3-GP
CL_CLK0 20
E
CL_CLK
CL_DATA AH36 CL_DATA0 20
19,25,26,43,50 PLT_RST# 1 2 BG48 AN36 M_PWROK 20
ME
1
R1101 NC#BG48 CL_PW ROK
BF48 NC#BF48 CL_RST# AJ35 CL_RST#0 20
100R2J-2-GP MCH_CLVREF
SCD1U10V2KX-4GP
BD48 NC#BD48 CL_VREF AH34
1
BC48 NC#BC48
1
C1101 BH47 MCH_CLVREF ~= 0.35V
DY NC#BH47
1
+3.3V_RUN
C1106
SC100P50V2JN-3GP BG47 R1116
2
NC#BG47 499R2F-2-GP
BE47 NC#BE47 DDPC_CTRLCLK N28
BH46 M28 R1117
2
NC#BH46 DDPC_CTRLDATA CLKREQ#_B
BF46 G36 1 2
2
NC#BF46 SDVO_CTRLCLK
NC
BG45 NC#BG45 SDVO_CTRLDATA E36 1 TP1106
MISC
8,18,26,30,54 H_THRMTRIP# BH44 K36 CLKREQ#_B 7 10KR2J-3-GP
NC#BH44 CLKREQ#
20,34 DPRSLPVR BH43 NC#BH43 ICH_SYNC# H36 MCH_ICH_SYNC# 20
BH6 NC#BH6
BH5 NC#BH5
A BG4
BH3
NC#BG4 TSATN# B12 TSATN# <Core Design> A
NC#BH3
BF3 NC#BF3
BH2
BG2
NC#BH2
NC#BG2 HDA_BCLK B28 Wistron Corporation
BE2 B30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
NC#BE2 HDA_RST# Taipei Hsien 221, Taiwan, R.O.C.
BG1 NC#BG1 HDA_SDI B29
BF1 NC#BF1 HDA_SDO C29
Title
HDA
BD1 NC#BD1 HDA_SYNC A28
BC1
Cantiga-DMI/CFG(2/6)
www.vinafix.vn
NC#BC1
F1 NC#F1
A47 Size Document Number Rev
NC#A47 Custom
CANTIGA-GM-GP-U-NF Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 11 of 59
5 4 3 2 1
SSID = MCH
M_A_DQ[63..0] U1001D 4 OF 10 M_B_DQ[63..0] U1001E 5 OF 10
16 M_A_DQ[63..0] 17 M_B_DQ[63..0]
M_A_DQ0 AJ38 BD21 M_B_DQ0 AK47 BC16
D M_A_DQ1 AJ41
SA_DQ_0
SA_DQ_1
SA_BS_0
SA_BS_1 BG18
M_A_BS#0 16
M_A_BS#1 16 M_B_DQ1 AH46
SB_DQ_0
SB_DQ_1
SB_BS_0
SB_BS_1 BB17
M_B_BS#0 17
M_B_BS#1 17
D
M_A_DQ2 AN38 AT25 M_A_BS#2 16 M_B_DQ2 AP47 BB33 M_B_BS#2 17
M_A_DQ3 SA_DQ_2 SA_BS_2 M_B_DQ3 SB_DQ_2 SB_BS_2
AM38 SA_DQ_3 AP46 SB_DQ_3
M_A_DQ4 AJ36 BB20 M_A_RAS# 16 M_B_DQ4 AJ46
M_A_DQ5 SA_DQ_4 SA_RAS# M_B_DQ5 SB_DQ_4
AJ40 SA_DQ_5 SA_CAS# BD20 M_A_CAS# 16 AJ48 SB_DQ_5 SB_RAS# AU17 M_B_RAS# 17
M_A_DQ6 AM44 AY20 M_A_WE# 16 M_B_DQ6 AM48 BG16 M_B_CAS# 17
M_A_DQ7 SA_DQ_6 SA_W E# M_B_DQ7 SB_DQ_6 SB_CAS#
AM42 SA_DQ_7 AP48 SB_DQ_7 SB_W E# BF14 M_B_WE# 17
M_A_DQ8 AN43 M_B_DQ8 AU47
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
AN44 SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_A_DM[7..0] M_B_DQ10 BA48
SA_DQ_10 M_A_DM[7..0] 16 SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48 M_B_DM[7..0]
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7..0] 17
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AN39 SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
AU42 SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
M_A_DQ17 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
AY44 SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3
A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6
B
M_A_DQ19 SA_DQ_18 SA_DM_7 M_A_DQS[7..0] M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
BD43 SA_DQ_19 M_A_DQS[7..0] 16 BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45 M_B_DQS[7..0]
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7..0] 17
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BB41 BA43 BF40 AV48
MEMORY
M_A_DQ23 SA_DQ_22 SA_DQS_2 M_A_DQS3 M_B_DQ23 SB_DQ_22 SB_DQS_1 M_B_DQS2
MEMORY
BC40 SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW 12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
M_A_DQ25 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
BD38 SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
M_A_DQ27 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_A_DQS#[7..0] M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6
AT36 SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[7..0] 16 BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7 M_B_DQS#[7..0]
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7..0] 17
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
AV36 BA44 BG34 AV47
C M_A_DQ31
M_A_DQ32
AW 36
SA_DQ_30
SA_DQ_31
SA_DQS#_2
SA_DQS#_3 BD37 M_A_DQS#3
M_A_DQS#4
M_B_DQ31
M_B_DQ32
BH34
SB_DQ_30
SB_DQ_31
SB_DQS#_1
SB_DQS#_2 BH41 M_B_DQS#2
M_B_DQS#3
C
BD13 SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
BC11 SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM
M_A_DQ36 SA_DQ_35 SA_DQS#_7 M_A_A[14..0] M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7
SYSTEM
AU13 SA_DQ_36 M_A_A[14..0] 16 BH12 SB_DQ_36 SB_DQS#_7 AN5
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11 M_B_A[14..0]
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[14..0] 17
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BC12 SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
BA9 SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW 25 M_B_A4
M_A_DQ43 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
AV9 SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ45 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
BD9 SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW 28
M_A_DQ46 AY8 AW 24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
BA6 SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 M_A_A11 M_B_DQ48 M_B_A10
DDR
AV5 SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16
DDR
M_A_DQ49 AV7 BH26 M_A_A12 M_B_DQ49 AU3 AW 33 M_B_A11
M_A_DQ50 SA_DQ_49 SA_MA_12 M_A_A13 M_B_DQ50 SB_DQ_49 SB_MA_11 M_B_A12
AT9 SA_DQ_50 SA_MA_13 BH17 AR3 SB_DQ_50 SB_MA_12 AY33
M_A_DQ51 AN8 AY25 M_A_A14 M_B_DQ51 AN2 BH15 M_B_A13
M_A_DQ52 SA_DQ_51 SA_MA_14 M_B_DQ52 SB_DQ_51 SB_MA_13 M_B_A14
AU5 SA_DQ_52 AY2 SB_DQ_52 SB_MA_14 AU33
M_A_DQ53 AU6 M_B_DQ53 AV1
M_A_DQ54 SA_DQ_53 M_B_DQ54 SB_DQ_53
AT5 SA_DQ_54 AP3 SB_DQ_54
M_A_DQ55 AN10 M_B_DQ55 AR1
M_A_DQ56 SA_DQ_55 M_B_DQ56 SB_DQ_55
AM11 SA_DQ_56 AL1 SB_DQ_56
M_A_DQ57 AM5 M_B_DQ57 AL2
M_A_DQ58 SA_DQ_57 M_B_DQ58 SB_DQ_57
AJ9 SA_DQ_58 AJ1 SB_DQ_58
M_A_DQ59 AJ8 M_B_DQ59 AH1
M_A_DQ60 SA_DQ_59 M_B_DQ60 SB_DQ_59
AN12 SA_DQ_60 AM2 SB_DQ_60
B M_A_DQ61
M_A_DQ62
AM13
AJ11
SA_DQ_61
M_B_DQ61
M_B_DQ62
AM3
AH3
SB_DQ_61 B
M_A_DQ63 SA_DQ_62 M_B_DQ63 SB_DQ_62
AJ12 SA_DQ_63 AJ3 SB_DQ_63
CANTIGA-GM-GP-U-NF CANTIGA-GM-GP-U-NF
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cantiga-DDR(3/6)
www.vinafix.vn Size
Custom
Document Number
Date: Monday, March 23, 2009
Alba Discrete
Sheet 12 of
Rev
59
SB
5 4 3 2 1
SSID = MCH
U1001I 9 OF 10 U1001J 10 OF 10 Place R1301
BG21 AH8 +VCC_PEG
AU48 AM36 L12
VSS VSS
Y8 close to
VSS VSS VSS VSS
AR48
VSS VSS
AE36 AW21
VSS VSS
L8 MCH within
2
AL48 P36 AU21 E8
VSS VSS VSS VSS U1001C 3 OF 10 R1301 500 mils.
BB47
AW47
VSS VSS
L36
J36
AP21
AN21
VSS VSS
B8
AY7
GM 20090316 49D9R2F-GP
VSS VSS VSS VSS
AN47 F36 AH21 AU7
VSS VSS VSS VSS
AJ47 B36 AF21 AN7
1
VSS VSS VSS VSS
AF47 AH35 AB21 AJ7 L32
VSS VSS VSS VSS L_BKLT_CTRL PEG_CMP
AD47 AA35 R21 AE7 G32 T37
VSS VSS VSS VSS L_CTRL_CLK L_BKLT_EN PEG_COMPI
AB47 Y35 M21 AA7 RN1301 M32 T36
VSS VSS VSS VSS L_CTRL_CLK PEG_COMPO
Y47 U35 J21 N7 1 8
VSS VSS VSS VSS L_CTRL_DATA PCIE_MRX_GTX_N[0..15]
T47 T35 G21 J7 2 7 M33
D N47
L47
VSS
VSS
VSS
VSS
BF34
AM34
BC20
BA20
VSS
VSS
VSS
VSS
BG6
BD6
3
4
PM 6
5
L_DDC_CLK
L_DDC_DATA
K33
J33
L_CTRL_DATA
L_DDC_CLK PEG_RX#_0
H44
J46
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N[0..15] 53
D
VSS VSS VSS VSS L_DDC_DATA PEG_RX#_1 PCIE_MRX_GTX_N2
G47 AJ34 AW20 AV6 L44
VSS VSS VSS VSS PEG_RX#_2 PCIE_MRX_GTX_N3
BD46 AF34 AT20 AT6 SRN0J-7-GP L40
VSS VSS VSS VSS PEG_RX#_3 PCIE_MRX_GTX_N4
BA46 AE34 AJ20 AM6 M29 N41
VSS VSS VSS VSS L_VDD_EN PEG_RX#_4 PCIE_MRX_GTX_N5
AY46 W34 AG20 M6 C44 P48
VSS VSS VSS VSS LVDS_IBG PEG_RX#_5 PCIE_MRX_GTX_N6
AV46 B34 Y20 C6 B43 N44
VSS VSS VSS VSS LVDS_VBG PEG_RX#_6 PCIE_MRX_GTX_N7
AR46 A34 N20 BA5 E37 T43
VSS VSS VSS VSS LVDS_VREFH PEG_RX#_7 PCIE_MRX_GTX_N8
AM46 BG33 K20 AH5 E38 U43
VSS VSS VSS VSS LVDS_VREFL PEG_RX#_8 PCIE_MRX_GTX_N9
V46 BC33 F20 AD5 C41 Y43
VSS VSS VSS VSS LVDSA_CLK# PEG_RX#_9 PCIE_MRX_GTX_N10
R46 BA33 C20 Y5 C40 Y48
VSS VSS VSS VSS LVDSA_CLK PEG_RX#_10 PCIE_MRX_GTX_N11
P46 AV33 A20 L5 B37 Y36
VSS VSS VSS VSS LVDSB_CLK# PEG_RX#_11 PCIE_MRX_GTX_N12
H46 AR33 BG19 J5 A37 AA43
VSS VSS VSS VSS LVDSB_CLK PEG_RX#_12
LVDS
F46 AL33 A18 H5 AD37 PCIE_MRX_GTX_N13
VSS VSS VSS VSS PEG_RX#_13 PCIE_MRX_GTX_N14
BF44 AH33 BG17 F5 H47 AC47
VSS VSS VSS VSS LVDSA_DATA#_0 PEG_RX#_14 PCIE_MRX_GTX_N15
AH44 AB33 BC17 BE4 E46 AD39
VSS VSS VSS VSS LVDSA_DATA#_1 PEG_RX#_15 PCIE_MRX_GTX_P[0..15]
AD44 P33 AW17 G40 PCIE_MRX_GTX_P[0..15] 53
VSS VSS VSS LVDSA_DATA#_2 PCIE_MRX_GTX_P0
AA44 L33 AT17 BC3 A40 H43
VSS VSS VSS
VSS VSS LVDSA_DATA#_3 PEG_RX_0
GRAPHICS
Y44 H33 R17 AV3 J44 PCIE_MRX_GTX_P1
VSS VSS VSS VSS PEG_RX_1 PCIE_MRX_GTX_P2
U44 N32 M17 AL3 H48 L43
VSS VSS VSS VSS LVDSA_DATA_0 PEG_RX_2 PCIE_MRX_GTX_P3
T44 K32 H17 R3 D45 L41
M44
F44
VSS
VSS
VSS
VSS VSS
VSS
VSS
F32
C32
C17
VSS
VSS
VSS
VSS
VSS
P3
F3
F40
B40
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3
PEG_RX_3
PEG_RX_4
PEG_RX_5
N40
P47
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
BC43 A31 BA16 BA2 N43 PCIE_MRX_GTX_P6
VSS VSS VSS VSS PEG_RX_6 PCIE_MRX_GTX_P7
AV43 AN29 AW2 A41 T42
VSS VSS VSS LVDSB_DATA#_0 PEG_RX_7 PCIE_MRX_GTX_P8
AU43 T29 AU16 AU2 H38 U42
VSS VSS VSS VSS LVDSB_DATA#_1 PEG_RX_8 PCIE_MRX_GTX_P9
AM43 N29 AN16 AR2 G37 Y42
VSS VSS VSS VSS LVDSB_DATA#_2 PEG_RX_9 PCIE_MRX_GTX_P10
J43 K29 N16 AP2 J37 W47
VSS VSS VSS VSS LVDSB_DATA#_3 PEG_RX_10 PCIE_MRX_GTX_P11
C43 H29 K16 AJ2 Y37
VSS VSS VSS VSS PEG_RX_11 PCIE_MRX_GTX_P12
BG42 F29 G16 AH2 B42 AA42
VSS VSS VSS VSS LVDSB_DATA_0 PEG_RX_12 PCIE_MRX_GTX_P13
AY42 A29 E16 AF2 G38 AD36
VSS VSS VSS VSS LVDSB_DATA_1 PEG_RX_13 PCIE_MRX_GTX_P14
AT42 BG28 BG15 AE2 F37 AC48
VSS VSS VSS VSS LVDSB_DATA_2 PEG_RX_14 PCIE_MRX_GTX_P15 PCIE_MTX_GRX_N[0..15]
PCI-EXPRESS
AN42 BD28 AC15 AD2 K37 AD40
VSS VSS VSS VSS LVDSB_DATA_3 PEG_RX_15 PCIE_MTX_GRX_N[0..15] 53
AJ42 BA28 W15 AC2
VSS VSS VSS VSS PCIE_MTX_GRX_C_N0 C1302 SCD1U10V2KX-5GP PCIE_MTX_GRX_N0
AE42 AV28 A15 Y2 J41 1 2
VSS VSS VSS VSS PEG_TX#_0 PCIE_MTX_GRX_C_N1 C1305 SCD1U10V2KX-5GP PCIE_MTX_GRX_N1
N42 AT28 BG14 M2 M46 1 2
VSS VSS VSS VSS PEG_TX#_1 PCIE_MTX_GRX_C_N2 C1307 SCD1U10V2KX-5GP PCIE_MTX_GRX_N2
L42 AR28 AA14 K2 F25 M47 1 2
VSS VSS VSS VSS TVA_DAC PEG_TX#_2 PCIE_MTX_GRX_C_N3 C1301 SCD1U10V2KX-5GP PCIE_MTX_GRX_N3
BD41 AJ28 C14 AM1 H25 M40 1 2
C AU41
AM41
VSS
VSS
VSS
VSS
AG28
AE28
BG13
BC13
VSS
VSS
VSS
VSS
AA1
P1
K25
TVB_DAC
TVC_DAC
PEG_TX#_3
PEG_TX#_4
M42
R48
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
C1310
C1313
1
1
2
2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
C
VSS VSS VSS VSS PEG_TX#_5 PCIE_MTX_GRX_C_N6 C1314 SCD1U10V2KX-5GP PCIE_MTX_GRX_N6
AH41 AB28 BA13 H1 H24 N38 1 2
VSS VSS VSS VSS TV_RTN PEG_TX#_6
TV
AD41 Y28 T40 PCIE_MTX_GRX_C_N7 C1315 1 2 SCD1U10V2KX-5GP PCIE_MTX_GRX_N7
VSS VSS PEG_TX#_7 PCIE_MTX_GRX_C_N8 C1317 SCD1U10V2KX-5GP PCIE_MTX_GRX_N8
AA41 P28 U24 U37 1 2
VSS VSS VSS PEG_TX#_8 PCIE_MTX_GRX_C_N9 C1330 SCD1U10V2KX-5GP PCIE_MTX_GRX_N9
Y41 K28 AN13 U28 U40 1 2
VSS VSS VSS VSS PEG_TX#_9 PCIE_MTX_GRX_C_N10 C1311 SCD1U10V2KX-5GP PCIE_MTX_GRX_N10
U41 H28 AJ13 U25 C31 Y40 1 2
VSS VSS VSS VSS TV_DCONSEL_0 PEG_TX#_10 PCIE_MTX_GRX_C_N11 C1312 SCD1U10V2KX-5GP PCIE_MTX_GRX_N11
T41 F28 AE13 U29 E32 AA46 1 2
VSS VSS VSS VSS TV_DCONSEL_1 PEG_TX#_11 PCIE_MTX_GRX_C_N12 C1316 SCD1U10V2KX-5GP PCIE_MTX_GRX_N12
M41 C28 N13 AA37 1 2
VSS VSS VSS PEG_TX#_12 PCIE_MTX_GRX_C_N13 C1327 SCD1U10V2KX-5GP PCIE_MTX_GRX_N13
G41 BF26 L13 AA40 1 2
VSS VSS VSS PEG_TX#_13 PCIE_MTX_GRX_C_N14 C1329 SCD1U10V2KX-5GP PCIE_MTX_GRX_N14
B41 AH26 G13 AF32 AD43 1 2
VSS VSS VSS VSS_NCTF PEG_TX#_14 PCIE_MTX_GRX_C_N15 C1332 SCD1U10V2KX-5GP PCIE_MTX_GRX_N15
BG40 AF26 E13 AB32 AC46 1 2
VSS VSS VSS VSS_NCTF PEG_TX#_15 PCIE_MTX_GRX_P[0..15]
BB40 AB26 BF12 V32
VSS VSS VSS VSS_NCTF PCIE_MTX_GRX_C_P0 C1303 SCD1U10V2KX-5GP PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P[0..15] 53
AV40 AA26 AV12 AJ30 E28 J42 1 2
VSS VSS VSS VSS_NCTF CRT_BLUE PEG_TX_0 PCIE_MTX_GRX_C_P1 C1306 SCD1U10V2KX-5GP PCIE_MTX_GRX_P1
AN40 C26 AT12 AM29 L46 1 2
VSS VSS VSS VSS_NCTF PEG_TX_1 PCIE_MTX_GRX_C_P2 C1309 SCD1U10V2KX-5GP PCIE_MTX_GRX_P2
H40 B26 AM12 AF29 G28 M48 1 2
VSS VSS VSS VSS_NCTF CRT_GREEN PEG_TX_2 PCIE_MTX_GRX_C_P3 C1304 SCD1U10V2KX-5GP PCIE_MTX_GRX_P3
E40 BH25 AA12 AB29 M39 1 2
VSS NCTF
VSS VSS VSS VSS_NCTF PEG_TX_3 PCIE_MTX_GRX_C_P4 C1308 SCD1U10V2KX-5GP PCIE_MTX_GRX_P4
AT39 BD25 J12 U26 J28 M43 1 2
VSS VSS VSS VSS_NCTF CRT_RED PEG_TX_4 PCIE_MTX_GRX_C_P5 C1328 SCD1U10V2KX-5GP PCIE_MTX_GRX_P5
AM39 BB25 A12 U23 R47 1 2
VSS VSS VSS VSS_NCTF PEG_TX_5
VGA
AJ39 AV25 BD11 AL20 G29 N37 PCIE_MTX_GRX_C_P6 C1324 1 2 SCD1U10V2KX-5GP PCIE_MTX_GRX_P6
VSS VSS VSS VSS_NCTF CRT_IRTN PEG_TX_6 PCIE_MTX_GRX_C_P7 C1323 SCD1U10V2KX-5GP PCIE_MTX_GRX_P7
AE39 AR25 BB11 V20 T39 1 2
VSS VSS VSS VSS_NCTF CRT_DDC_CLK PEG_TX_7 PCIE_MTX_GRX_C_P8 C1325 SCD1U10V2KX-5GP PCIE_MTX_GRX_P8
N39 AJ25 AY11 AC19 H32 U36 1 2
VSS VSS VSS VSS_NCTF CRT_DDC_DATA CRT_DDC_CLK PEG_TX_8 PCIE_MTX_GRX_C_P9 C1326 SCD1U10V2KX-5GP PCIE_MTX_GRX_P9
L39 AC25 AN11 AL17 J32 U39 1 2
VSS VSS VSS VSS_NCTF CRT_DDC_DATA PEG_TX_9 PCIE_MTX_GRX_C_P10 C1331 SCD1U10V2KX-5GP PCIE_MTX_GRX_P10
B39 Y25 AH11 AJ17 J29 Y39 1 2
VSS VSS VSS VSS_NCTF CRT_TVO_IREF CRT_HSYNC PEG_TX_10 PCIE_MTX_GRX_C_P11 C1318 SCD1U10V2KX-5GP PCIE_MTX_GRX_P11
BH38 N25 AA17 E29 Y46 1 2
VSS VSS VSS_NCTF CRT_TVO_IREF PEG_TX_11 PCIE_MTX_GRX_C_P12 C1319 SCD1U10V2KX-5GP PCIE_MTX_GRX_P12
BC38 L25 Y11 U17 L29 AA36 1 2
VSS VSS VSS VSS_NCTF CRT_VSYNC PEG_TX_12
1
1
BA38 J25 N11 AA39 PCIE_MTX_GRX_C_P13 C1320 1 2 SCD1U10V2KX-5GP PCIE_MTX_GRX_P13
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
VSS VSS VSS PEG_TX_13 PCIE_MTX_GRX_C_P14 C1321 SCD1U10V2KX-5GP PCIE_MTX_GRX_P14
R1302
R1303
R1304
AU38 G25 G11 AD42 1 2
VSS VSS VSS GMCH_GND1 PEG_TX_14 PCIE_MTX_GRX_C_P15 C1322 SCD1U10V2KX-5GP PCIE_MTX_GRX_P15
AH38 E25 C11 BH48 AD46 1 2
VSS SCB
VSS VSS VSS VSS_SCB TP1303 PEG_TX_15
AD38 BF24 BG10 BH1 GMCH_GND2 NCTF
VSS VSS VSS VSS_SCB TP1302
AA38 AD12 AV10 A48 GMCH_GND3
TP1304
2
2
Y38
VSS VSS
AY24 AT10
VSS VSS_SCB
C1 GMCH_GND4 PIN CANTIGA-GM-GP-U-NF
VSS VSS VSS VSS_SCB TP1301
U38
VSS VSS
AT24 AJ10
VSS VSS_SCB
A3 for Discrete
T38 AJ24 AE10
VSS VSS VSS
J38 AH24 AA10 E1
VSS VSS VSS NC#E1
F38 AF24 M10 D2
VSS VSS VSS NC#D2
C38 AB24 BF9 C3
VSS VSS VSS NC#C3
BF37 R24 BC9 B4
B BB37
AW37
VSS
VSS
VSS
VSS
L24
K24
AN9
AM9
VSS
VSS
NC#B4
NC#A5
A5
A6
GM 20090316 B
VSS VSS VSS NC#A6
AT37 J24 AD9 A43
VSS VSS VSS NC#A43
AN37 G24 G9 A44
VSS VSS VSS NC#A44
AJ37 F24 B9 B45
NC
VSS VSS VSS NC#B45
H37 E24 BH8 C46
VSS VSS VSS NC#C46
C37 BH23 BB8 D47
VSS VSS VSS NC#D47
BG36 AG23 AV8 B47
VSS VSS VSS NC#B47
BD36 Y23 AT8 A46
VSS VSS VSS NC#A46
AK15 B23 F48
VSS VSS NC#F48
AU36 A23 E48
VSS VSS NC#E48
AJ6 C48
VSS NC#C48
B48
NC#B48
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
www.vinafix.vn Size
C
Date:
Cantiga-GND/LVDS/VGA(4/6)
Document Number
Monday, March 23, 2009
Alba Discrete
Sheet 13 of
Rev
59
SB
5 4 3 2 1
SSID = MCH
U1001F 6 OF 10
+1.05V_VCCP
AG34 VCC
U1001G 7 OF 10
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SC4D7U6D3V5KX-3GP
AC34 VCC
+1.8V_SUS AB34 VCC
C1413
C1402
C1405
C1403
AA34 VCC
1
AP33 VCC_SM VCC_AXG_NCTF W 28 Y34 VCC
AN33 VCC_SM VCC_AXG_NCTF V28 V34 VCC
BH32 W 26 U34
D D
2
VCC_SM VCC_AXG_NCTF VCC
SC1U6D3V2KX-GP
BG32 VCC_SM VCC_AXG_NCTF V26 AM33 VCC
BF32 VCC_SM VCC_AXG_NCTF W 25 AK33 VCC
1
C1412
BD32 VCC_SM VCC_AXG_NCTF V25 AJ33 VCC
BC32 VCC_SM VCC_AXG_NCTF W 24 AG33 VCC
BB32 V24 AF33
2
VCC_SM VCC_AXG_NCTF VCC
BA32 VCC_SM VCC_AXG_NCTF W 23
3060mA
AY32 VCC_SM VCC_AXG_NCTF V23 AE33 VCC
VCC CORE
AW 32 VCC_SM VCC_AXG_NCTF AM21 AC33 VCC
Close to (G)MCH AV32 VCC_SM VCC_AXG_NCTF AL21 AA33 VCC
AU32 VCC_SM VCC_AXG_NCTF AK21 Y33 VCC
AT32 VCC_SM VCC_AXG_NCTF W 21 W 33 VCC
AR32 VCC_SM VCC_AXG_NCTF V21 V33 VCC
3000mA
POWER
AP32 VCC_SM VCC_AXG_NCTF U21 U33 VCC
AN32 VCC_SM VCC_AXG_NCTF AM20 AH28 VCC
BH31 VCC_SM VCC_AXG_NCTF AK20 AF28 VCC
BG31 VCC_SM VCC_AXG_NCTF W 20 AC28 VCC
BF31 U20 R1408 +1.05V_VCCP AA28
VCC_SM VCC_AXG_NCTF 0R3-0-U-GP VCC
BG30 VCC_SM VCC_AXG_NCTF AM19 AJ26 VCC
SC1U10V3KX-3GP
+1.05V_VCCP_AXG
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
BH29 AL19 1 2 AG26
VCC_SM VCC_AXG_NCTF GM VCC
SCD1U16V2KX-3GP
BG29 VCC_SM VCC_AXG_NCTF AK19 AE26 VCC
C1415
C1417
C1419
C1418
BF29 VCC_SM VCC_AXG_NCTF AJ19 AC26 VCC
1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
BD29 VCC_SM VCC_AXG_NCTF AH19 AH25 VCC
VCC SM
BC29 VCC_SM VCC_AXG_NCTF AG19 AG25 VCC
C1414
C1411
BB29 AF19 AF25
G/P G/P G/P G/P
2
VCC_SM VCC_AXG_NCTF VCC
1
BA29 VCC_SM VCC_AXG_NCTF AE19 AG24 VCC
POWER
AY29 VCC_SM VCC_AXG_NCTF AB19 AJ23 VCC
AW 29 AA19 AH23 +1.05V_VCCP
2
VCC_SM VCC_AXG_NCTF VCC
AV29 VCC_SM VCC_AXG_NCTF Y19 AF23 VCC
AU29 VCC_SM VCC_AXG_NCTF W 19 VCC_NCTF AM32
C
AT29
AR29
VCC_SM VCC_AXG_NCTF V19
U19
GM 20090311 T32 VCC VCC_NCTF AL32
AK32 C
VCC_SM VCC_AXG_NCTF VCC_NCTF
On the edge AP29 VCC_SM VCC_AXG_NCTF AM17 VCC_NCTF AJ32
VCC_AXG_NCTF AK17 VCC_NCTF AH32
BA36 VCC_SM/NC VCC_AXG_NCTF AH17 VCC_NCTF AG32
BB24 VCC_SM/NC VCC_AXG_NCTF AG17 VCC_NCTF AE32
BD16 AF17 AC32
VCC GFX NCTF
VCC_SM/NC VCC_AXG_NCTF VCC_NCTF
BB21 VCC_SM/NC VCC_AXG_NCTF AE17 Supply Signal Group Imax VCC_NCTF AA32
AW 16 VCC_SM/NC VCC_AXG_NCTF AC17 VCC_NCTF Y32
AW 13 VCC_SM/NC VCC_AXG_NCTF AB17 +1.05V_VCCP VCC 3060mA VCC_NCTF W 32
AT13 VCC_SM/NC VCC_AXG_NCTF Y17 VCC_NCTF U32
VCC_AXG_NCTF W 17 +1.05V_VCCP VTT 852mA VCC_NCTF AM30
VCC_AXG_NCTF V17 VCC_NCTF AL30
VCC_AXG_NCTF AM16 +1.05V_VCCP VCC_PEG 1782mA VCC_NCTF AK30
+1.05V_VCCP_AXG Y26 AL16 AH30
VCC_AXG VCC_AXG_NCTF VCC_NCTF
AE25 VCC_AXG VCC_AXG_NCTF AK16 +1.05V_VCCP VCC_DMI 456mA VCC_NCTF AG30
AB25 VCC_AXG VCC_AXG_NCTF AJ16 VCC_NCTF AF30
AA25 VCC_AXG VCC_AXG_NCTF AH16 +1.05V_VCCP VCCA_SM 720mA VCC_NCTF AE30
AE24 VCC_AXG VCC_AXG_NCTF AG16 VCC_NCTF AC30
AC24 VCC_AXG VCC_AXG_NCTF AF16 +1.05V_VCCP VCCA_SM_CK 26mA VCC_NCTF AB30
AA24 VCC_AXG VCC_AXG_NCTF AE16 VCC_NCTF AA30
Y24 VCC_AXG VCC_AXG_NCTF AC16 +1.05V_VCCP VCCA_HPLL 24mA VCC_NCTF Y30
AE23 VCC_AXG VCC_AXG_NCTF AB16 VCC_NCTF W 30
VCC NCTF
AC23 VCC_AXG VCC_AXG_NCTF AA16 +1.05V_VCCP VCCA_MPLL 139.2mA VCC_NCTF V30
AB23 VCC_AXG VCC_AXG_NCTF Y16 VCC_NCTF U30
+1.05V_VCCP
AA23 VCC_AXG VCC_AXG_NCTF W 16 +1.05V_VCCP VCCD_HPLL 157.2mA VCC_NCTF AL29
AJ21 VCC_AXG VCC_AXG_NCTF V16 VCC_NCTF AK29
AG21 VCC_AXG VCC_AXG_NCTF U16 +1.05V_VCCP VCCA_PEG_PLL 50mA VCC_NCTF AJ29
R1401 AE21 AH29
0R3-0-U-GP VCC_AXG VCC_NCTF
AC21 VCC_AXG +1.05V_VCCP VCCD_PEG_PLL 50mA VCC_NCTF AG29
1 2 AA21 AE29
B GM Y21
VCC_AXG
+1.05V_VCCP VCC_AXF 321.35mA
VCC_NCTF
AC29 B
VCC_AXG VCC_NCTF
AH20 VCC_AXG VCC_NCTF AA29
8700mA
R1402 +1.5V_RUN VCCD_TVDAC 35mA
SC4D7U6D3V5KX-3GP
AF20 VCC_AXG VCC_NCTF Y29
0R3-0-U-GP
SCD1U10V2KX-4GP
AE20 VCC_AXG VCC_NCTF W 29
+1.8V_SUS VCC_SM 3000mA
SCD1U16V2KX-3GP
1 2 AC20 V29
GM VCC_AXG VCC_NCTF
C1421
C1416
AB20 VCC_AXG VCC_NCTF AL28
1
1
C1420
AA20 VCC_AXG +1.8V_SUS VCC_SM_CK 124mA VCC_NCTF AK28
T17 VCC_AXG VCC_NCTF AL26
G/P G/P G/P T16 +1.5V_RUN VCCA_PEG_BG 414uA AK26
2
VCC_AXG VCC_NCTF
AM15 VCC_AXG VCC_NCTF AK25
AL15 VCC_AXG +3.3V_RUN VCC_HV 105.3mA VCC_NCTF AK24
AE15 VCC_AXG VCC_NCTF AK23
AJ15 VCC_AXG
AH15 VCC_AXG
AG15 VCC_AXG
AF15 CANTIGA-GM-GP-U-NF
VCC_AXG
AB15 VCC_AXG
AA15 VCC_AXG
VCC GFX
Y15 VCC_AXG
GM 20090311 V15
U15
VCC_AXG
VCC_AXG
AN14 VCC_AXG
AM14 VCC_AXG
U14 VCC_AXG VCC_SM_LF AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
VCC SM LF
T14 VCC_AXG VCC_SM_LF
VCC_SM_LF AM40 SM_LF3_GMCH
VCC_SM_LF AV21 SM_LF4_GMCH
VCC_SM_LF AY5 SM_LF5_GMCH
VCC_SM_LF AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD47U6D3V2KX-GP
VCC_SM_LF <Core Design>
A A
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C1406
C1404
C1401
C1407
C1409
C1408
C1410
1
VCC_AXG_SENSE AJ14
TP1402
TP1401 VSS_AXG_SENSE AH14
VCC_AXG_SENSE 2 Wistron Corporation
2
VSS_AXG_SENSE 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
CANTIGA-GM-GP-U-NF Title
Cantiga-Power(5/6)
www.vinafix.vn
Size Document Number Rev
Custom SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 14 of 59
5 4 3 2 1
SSID = MCH
+1.05V_VCCP
U1001H 8 OF 10
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
ST220U2D5VBM-LGP
SCD1U16V2KX-3GP
TC1501
C1512
C1502
C1505
C1509
EC1501
U13
D VTT D
1
VTT T13
B27 U12
A26
VCCA_CRT_DAC VTT
T12
DY
2
VCCA_CRT_DAC VTT
VTT U11
VTT T11
A25 U10
CRT
+1.05V_VCCP VCCA_DAC_BG VTT
B25 VSSA_DAC_BG VTT T10
VTT U9
GM 20090311 T9
852mA
0R3-0-U-GP VTT
VTT U8
64.8mA
1 2 +1.05V_VCCP_VCCA_DPLL F47 T8
+1.05V_VCCP GM VCCA_DPLLA VTT
U7 +1.05V_VCCP
VTT
R1515 VTT +3.3V_RUN
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L48 VCCA_DPLLB VTT T7
1
C1538
C1539
U6
G/P G/P M_VCCA_HPLL AD1
VTT
T6 D1501 R1510
VCCA_HPLL 24mA
PLL
VTT
U5 A K 2 1
2
M_VCCA_MPLL VTT
AE1 VCCA_MPLL 139.2mA VTT T5
L1503 V3 SDMK0340L-7-F-GP 10R2J-2-GP
M_VCCA_HPLL VTT
1 2 VTT U3
C1523
C1521
BLM18PG121SN1D-GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
J48 VCCA_LVDS 13.2mA VTT V2
1
120ohm 100MHz For Discrete U2
A LVDS
VTT
J47 VSSA_LVDS VTT T2
+1.5V_RUN V1
2
VTT
VTT U1
R1512
1 2 VCCA_PEG_BG AD48 +1.05V_VCCP
VCCA_PEG_BG R1509
1
0R2J-2-GP 414uA 1D05V_VCC_AXF 1 2
SC1U10V3KX-3GP
L1502 C1530
A PEG
1 2 M_VCCA_MPLL X00 ALBA SCD1U10V2KX-4GP 0R3-0-U-GP
C C
1
C1527
BLM18PG121SN1D-GP 1D05V_RUN_PEGPLL
SCD1U10V2KX-4GP
AA48 VCCA_PEG_PLL 50mA
1
+1.05V_VCCP
C1522
C1519
C1526
SC10U6D3V5MX-3GP
120ohm 100MHz DY
R1501 SC10U6D3V5MX-3GP
DY
2
1 2 1D05V_SM AR20
2
VCCA_SM
SC1U10V3KX-3GP
ST100U6D3VBM-5GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC4D7U6D3V3KX-GP
AP20 VCCA_SM
TC1502
0R3-0-U-GP AN20 VCCA_SM
POWER
1
1
C1504
C1503
C1507
C1506
AR17
DY
720mA
VCCA_SM
AP17
DY AN17
VCCA_SM +1.8V_SUS
2
2
VCCA_SM R1502
AT16 VCCA_SM
AR16 1D8V_VCC_SM_CK 1 2
A SM
VCCA_SM
AP16 VCCA_SM
2
0R5J-5-GP
+1.05V_VCCP +1.05V_VCCP
SCD1U10V2KX-4GP
R1504 R1503
C1508
L1504 1D05V_SM_CK 1R3F-GP
SC22U6D3V5MX-2GP
SC2D2U10V3KX-1GP
1 2
1D05V_RUN_PEGPLL
SCD1U10V2KX-4GP
1 2
2 1
1
1
C1511
C1513
BLM18BB221SN1D-GP 0R3-0-U-GP C1515
SCD1U10V2KX-4GP
2
1
1
C1535
C1531
SC10U6D3V5MX-3GP
220ohm 100MHz DY AP28 VCCA_SM_CK
321.35mA
37.5mA
AN28 B22 C1510
2
VCCA_SM_CK VCC_AXF
AP25 B21 SC10U6D3V5MX-3GP
AXF
2
1
VCCA_SM_CK VCC_AXF
AN25 VCCA_SM_CK VCC_AXF A21
AN24 VCCA_SM_CK
AM28 VCCA_SM_CK_NCTF
AM26
A CK
VCCA_SM_CK_NCTF
AM25 VCCA_SM_CK_NCTF
AL25 VCCA_SM_CK_NCTF VCC_SM_CK BF21
GM 20090316 AM24 BH20
124mA
SM CK
VCCA_SM_CK_NCTF VCC_SM_CK
AL24 VCCA_SM_CK_NCTF VCC_SM_CK BG20
AM23 VCCA_SM_CK_NCTF VCC_SM_CK BF20
B AL23 VCCA_SM_CK_NCTF B
+1.5V_RUN
R1513 K47 +3.3V_RUN
VCCD_TVDAC
118.8mA VCC_TX_LVDS
79mA
1 2 B24
DY A24
VCCA_TV_DAC
C35
105.3mA
TV
0R2J-2-GP VCCA_TV_DAC VCC_HV
B35
HV
VCC_HV
2
VCC_HV A35
1
+1.5V_RUN R1514 +VCC_PEG +1.05V_VCCP
0R2J-2-GP A32 R1506 C1528
L1501 VCC_HDA 50mA HDA SCD1U10V2KX-4GP
V48 1 2
2
1D5VRUN_QDAC VCC_PEG
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
1 2 U48
1782mA
1
BLM18PG181SN1D-GP VCC_PEG 0R3-0-U-GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
V47
PEG
VCC_PEG
1
1
C1514
C1516
C1534
C1518
C1532
U47
D TV/CRT
VCC_PEG C1533
M25 VCCD_TVDAC 35mA VCC_PEG U46
SC10U6D3V5MX-3GP R1507
2
2
+1.05V_VCCP 1D5VRUN_QDAC L28 1 2
R1508 VCCD_QDAC 2mA
VCC_DMI AH48
1 2 1D05V_RUN_HPLL AF1 AF48 0R3-0-U-GP
456mA
DMI
VCCD_HPLL 157.2mA VCC_DMI
0R3-0-U-GP 1D05V_RUN_PEGPLL VCC_DMI AH47
+VCC_PEG X01 20081215
SCD1U10V2KX-4GP
AA47 VCCD_PEG_PLL 50mA VCC_DMI AG47
R1505
1
1
C1520
1D05V_VCC_DMI 1 2
C1529 M38
VTTLF
VCCD_LVDS
LVDS
SCD1U10V2KX-4GP L37 A8 VTTLF1 0R3-0-U-GP
2
VCCD_LVDS VTTLF
1
L1 VTTLF2
VTTLF VTTLF3 C1517
60.31mA VTTLF AB2
SCD1U10V2KX-4GP
2
A CANTIGA-GM-GP-U-NF
A
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
<Core Design>
C1525
C1524
C1501
1 1 1
2 2 2 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cantiga-Power/Filter(6/6)
www.vinafix.vn Size
Custom
Document Number
Date: Monday, March 23, 2009
Alba Discrete
Sheet 15 of
Rev
59
SB
5 4 3 2 1
DM1
M_A_A0 102 108
SSID = MEMORY M_A_A1
M_A_A2
101
100
A0
A1
A2
/RAS
/W E
/CAS
109
113
M_A_RAS# 12
M_A_WE# 12
M_A_CAS# 12
put near connector
M_A_A3 99 M_CLK_DDR0
M_A_A4 A3 M_CLK_DDR#0
98 A4 /CS0 110 M_CS0# 11
M_A_A5 97 115 M_CS1# 11 M_CLK_DDR1
M_A_A6 A5 /CS1 M_CLK_DDR#1
94 A6
M_A_A7 92 79 M_CKE0 11
M_A_A8 A7 CKE0
93 A8 CKE1 80 M_CKE1 11
M_A_A9 91
12 M_A_DQS#[7..0] A9
M_A_A10 105 30 M_CLK_DDR0 M_CLK_DDR0 11
A10/AP CK0
1
M_A_A11 90 32 M_CLK_DDR#0 M_CLK_DDR#0 11
12 M_A_DQ[63..0] A11 /CK0
M_A_A12
DUMMY-C2
DUMMY-C2
DUMMY-C2
DUMMY-C2
89 A12
D D
C1603
C1604
C1623
C1624
M_A_A13 116 164 M_CLK_DDR1 M_CLK_DDR1 11
12 M_A_DM[7..0] A13 CK1
M_A_A14 86 166 M_CLK_DDR#1 M_CLK_DDR#1 11
A14 /CK1
12 M_A_DQS[7..0] 84 A15
M_A_BS#2 85 10 M_A_DM0
2
12 M_A_BS#2 A16/BA2 DM0 M_A_DM1
12 M_A_A[14..0] DM1 26
M_A_BS#0 107 52 M_A_DM2
12 M_A_BS#0 M_A_BS#1 BA0 DM2 M_A_DM3
12 M_A_BS#1 106 BA1 DM3 67
130 M_A_DM4
M_A_DQ0 DM4 M_A_DM5
5 DQ0 DM5 147
M_A_DQ1 7 170 M_A_DM6
M_A_DQ2 DQ1 DM6 M_A_DM7
17 DQ2 DM7 185
M_A_DQ3 19
M_A_DQ4 DQ3 ICH_SMBDATA +3.3V_RUN
4 DQ4 SDA 195 ICH_SMBDATA 7,17,20,43
M_A_DQ5 6 197 ICH_SMBCLK
DQ5 SCL ICH_SMBCLK 7,17,20,43
M_A_DQ6 14
M_A_DQ7 DQ6
16 DQ7 VDDSPD 199
M_A_DQ8 23
M_A_DQ9 DQ8
25 DQ9 SA0 198
M_A_DQ10
SCD1U16V2KX-3GP
ALBA X00
SC2D2U10V3KX-1GP
35 DQ10 SA1 200
M_A_DQ11 37 DQ11
1
C1602
C1601
M_A_DQ12 20 50 PM_EXTTS#0 11
M_A_DQ13 DQ12 NC#50
22 69
Layout Note: M_A_DQ14 36
DQ13 NC#69
83
DY
2
+1.8V_SUS M_A_DQ15 DQ14 NC#83
Place near DM1 38 DQ15 NC#120 120
M_A_DQ16 43 163
M_A_DQ17 DQ16 NC#163/TEST +1.8V_SUS
45 DQ17
M_A_DQ18
ST220U2D5VBM-LGP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
55 DQ18
M_A_DQ19
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
57 DQ19 VDD 81
TC1601
C1620
C1619
C1616
C1613
C1609
C1612
M_A_DQ20 44 82
DQ20 VDD
1
1
C1622
C1621
C1607
C
M_A_DQ21 46 87 C
M_A_DQ22 DQ21 VDD
56 88
DY DY DY DY M_A_DQ23 58
DQ22 VDD
95
2
2
M_A_DQ24 DQ23 VDD
61 DQ24 VDD 96
M_A_DQ25 63 103
DQ25 VDD
Height 6.5mm
M_A_DQ26 73 104
M_A_DQ27 DQ26 VDD
75 DQ27 VDD 111
M_A_DQ28 62 112 Layout Note:
M_A_DQ29 DQ28 VDD
64 DQ29 VDD 117 Place these resistors close to DM1,
M_A_DQ30 74 118
M_A_DQ31 DQ30 VDD all trace length Max=1.5".
76 DQ31
M_A_DQ32 123 3
M_A_DQ33 DQ32 VSS
125 DQ33 VSS 8
M_A_DQ34 135 9 +0.9V_DDR_VTT
M_A_DQ35 DQ34 VSS
137 DQ35 VSS 12
M_A_DQ36 124 15 RN1601 RN1605
M_A_DQ37 DQ36 VSS M_A_A5 M_CKE0
126 DQ37 VSS 18 1 8 1 4
M_A_DQ38 134 21 M_A_A8 2 7 2 3 M_A_BS#2
M_A_DQ39 DQ38 VSS M_A_A9
Layout Note: 136 DQ39 VSS 24 3 6
M_A_DQ40 141 27 M_A_A12 4 5 SRN56J-4-GP
Place one cap close to every 2 pullup M_A_DQ41 DQ40 VSS
143 DQ41 VSS 28
resistors terminated to +0.9V_DDR_VTT. M_A_DQ42 151 33 SRN56J-5-GP
+0.9V_DDR_VTT M_A_DQ43 DQ42 VSS M_A_A13
153 DQ43 VSS 34 1 2
M_A_DQ44 140 39 R1663 56R2J-4-GP
M_A_DQ45 DQ44 VSS
142 DQ45 VSS 40
M_A_DQ46 152 41 RN1602 RN1606
M_A_DQ47 DQ46 VSS M_ODT0 M_A_A3
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
154 DQ47 VSS 42 1 8 1 8
M_A_DQ48 157 47 M_CS0# 2 7 2 7 M_A_A1
DQ48 VSS
1
1
C1610
C1627
C1611
C1608
C1605
C1630
C1606
C1614
C1617
C1618
C1615
C1629
C1628
M_A_DQ49 159 48 M_A_BS#1 3 6 3 6 M_A_A10
M_A_DQ50 DQ49 VSS M_A_RAS# M_A_BS#0
173 53 4 5 4 5
B
DY DY DY DY DY DY M_A_DQ51 175
DQ50 VSS
54 B
2
M_A_DQ52 DQ51 VSS SRN56J-5-GP
158 59 SRN56J-5-GP
M_A_DQ53 DQ52 VSS
160 DQ53 VSS 60
M_A_DQ54 174 65 RN1603 RN1607
M_A_DQ55 DQ54 VSS M_ODT1 M_A_A7
176 DQ55 VSS 66 1 8 8 1
M_A_DQ56 179 71 M_CS1# 2 7 7 2 M_A_A11
M_A_DQ57 DQ56 VSS M_A_CAS# M_A_A14
181 DQ57 VSS 72 3 6 6 3
M_A_DQ58 189 77 M_A_WE# 4 5 5 4 M_CKE1
M_A_DQ59 DQ58 VSS
191 DQ59 VSS 78
M_A_DQ60 180 121 SRN56J-5-GP SRN56J-5-GP
M_A_DQ61 DQ60 VSS
182 DQ61 VSS 122
M_A_DQ62 192 127
M_A_DQ63 DQ62 VSS
194 DQ63 VSS 128
132 RN1604
M_A_DQS#0 VSS M_A_A0
11 /DQS0 VSS 133 1 8
M_A_DQS#1 29 138 M_A_A2 2 7
M_A_DQS#2 /DQS1 VSS M_A_A4
49 /DQS2 VSS 139 3 6
M_A_DQS#3 68 144 M_A_A6 4 5
M_A_DQS#4 /DQS3 VSS
129 /DQS4 VSS 145
M_A_DQS#5 146 149 SRN56J-5-GP
M_A_DQS#6 /DQS5 VSS
167 /DQS6 VSS 150
M_A_DQS#7 186 155
/DQS7 VSS
VSS 156
M_A_DQS0 13 161
M_A_DQS1 DQS0 VSS
31 DQS1 VSS 162
M_A_DQS2 51 165
M_A_DQS3 DQS2 VSS
70 DQS3 VSS 168
M_A_DQS4 131 171
M_A_DQS5 DQS4 VSS
148 DQS5 VSS 172
M_A_DQS6 169 177
A M_A_DQS7 DQS6 VSS A
188 DQS7 VSS 178 <Core Design>
VSS 183
11 M_ODT0 M_ODT0 114 184
ODT0 VSS
+V_DDR_MCH_REF 11 M_ODT1 M_ODT1 119 ODT1 VSS
VSS
187
190 Wistron Corporation
1 193 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VREF VSS Taipei Hsien 221, Taiwan, R.O.C.
2 VSS VSS 196
1
C1626 C1625 202 201 Title
SCD1U16V2KX-3GP DY SC2D2U10V3KX-1GP GND GND
DDRII-SODIMM SLOT1
2
DDR2-200P-10-U1
www.vinafix.vn
Size Document Number Rev
62.10017.881 Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 16 of 59
5 4 3 2 1
5 4 3 2 1
DM2
SSID = MEMORY M_B_A0
M_B_A1
102
101
A0
A1
RAS#
WE#
108
109
M_B_RAS# 12
M_B_W E# 12
put near connector
M_B_A2 100 113 M_B_CAS# 12 M_CLK_DDR2
M_B_A3 A2 CAS# M_CLK_DDR#2
99
M_B_A4 A3 M_CLK_DDR3
98 A4 CS0# 110 M_CS2# 11
M_B_A5 97 115 M_CS3# 11 M_CLK_DDR#3
M_B_A6 A5 CS1#
94 A6
M_B_A7 92 79 M_CKE2 11
M_B_A8 A7 CKE0
93 A8 CKE1 80 M_CKE3 11
M_B_A9 91
12 M_B_DQS#[7..0] A9
1
M_B_A10 105 30 M_CLK_DDR2 M_CLK_DDR2 11
M_B_A11 A10/AP CK0 M_CLK_DDR#2
90 32
DUMMY-C2
DUMMY-C2
DUMMY-C2
DUMMY-C2
12 M_B_DQ[63..0] A11 CK0# M_CLK_DDR#2 11
M_B_A12
C1703
C1704
C1718
C1719
D 89 D
M_B_A13 A12 M_CLK_DDR3
12 M_B_DM[7..0] 116 A13 CK1 164 M_CLK_DDR3 11
M_B_A14 86 166 M_CLK_DDR#3 M_CLK_DDR#3 11
A14 CK1#
12 M_B_DQS[7..0] 84
2
M_B_BS#2 A15 M_B_DM0
12 M_B_BS#2 85 10
A16/BA2 DM0 M_B_DM1
12 M_B_A[14..0] DM1 26
M_B_BS#0 107 52 M_B_DM2
12 M_B_BS#0 M_B_BS#1 BA0 DM2 M_B_DM3
12 M_B_BS#1 106 BA1 DM3 67
130 M_B_DM4
M_B_DQ0 DM4 M_B_DM5
5 DQ0 DM5 147
M_B_DQ1 7 170 M_B_DM6
M_B_DQ2 DQ1 DM6 M_B_DM7
17 185
M_B_DQ3 DQ2 DM7
19
M_B_DQ4 DQ3 ICH_SMBDATA
4 195 ICH_SMBDATA 7,16,20,43
M_B_DQ5 DQ4 SDA ICH_SMBCLK
6 197 ICH_SMBCLK 7,16,20,43
M_B_DQ6 DQ5 SCL
14 DQ6
M_B_DQ7 16 199 +3.3V_RUN
M_B_DQ8 DQ7 VDDSPD
M_B_DQ9
23
25
DQ8
198
ALBA X00
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
M_B_DQ10 DQ9 SA0
35 DQ10 SA1 200 +3.3V_RUN
1
M_B_DQ11
C1701
C1702
37
M_B_DQ12 DQ11
20 50
Layout Note: M_B_DQ13 22
DQ12 NC#50
69
PM_EXTTS#1 11 DY
2
+1.8V_SUS M_B_DQ14 DQ13 NC#69
Place near DM2 36 DQ14 NC#83 83
M_B_DQ15 38 120
M_B_DQ16 DQ15 NC#120
43 163
M_B_DQ17 DQ16 NC#163/TEST
45
ST220U2D5VBM-LGP
M_B_DQ18 DQ17 +1.8V_SUS
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
55
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SC2D2U10V3KX-1GP
M_B_DQ19 DQ18
57 81
DQ19 VDD
C1716
C1707
C1712
C1711
C1710
C1714
C1709
C1715
M_B_DQ20 44 82
DQ20 VDD
1
TC1701
C1717
M_B_DQ21 46 87
C
M_B_DQ22 DQ21 VDD C
DY DY DY M_B_DQ23
56
58
DQ22 VDD
88
95
2
2
M_B_DQ24 DQ23 VDD
61 DQ24 VDD 96
M_B_DQ25 63 103
M_B_DQ26 DQ25 VDD
73 DQ26 VDD 104 Layout Note:
M_B_DQ27 75 111
M_B_DQ28 DQ27 VDD Place these resistors close to DM2,
62 DQ28 VDD 112
M_B_DQ29 64 117 all trace length Max=1.5".
M_B_DQ30 DQ29 VDD
74 118
M_B_DQ31 DQ30 VDD
76 DQ31
M_B_DQ32 123 3 +0.9V_DDR_VTT
M_B_DQ33 DQ32 VSS
125 DQ33 VSS 8
M_B_DQ34 135 9 RN1701 RN1704
M_B_DQ35 DQ34 VSS M_B_A8 M_CKE3
137 12 1 8 1 8
M_B_DQ36 DQ35 VSS M_B_A5 M_B_A14
124 DQ36 VSS 15 2 7 2 7
M_B_DQ37 126 18 M_B_A1 3 6 3 6 M_B_A11
M_B_DQ38 DQ37 VSS M_B_A3 M_B_A6
134 21 4 5 4 5
M_B_DQ39 DQ38 VSS
Layout Note: 136
DQ39 VSS
24
M_B_DQ40 141 27 SRN56J-5-GP SRN56J-5-GP
Place one cap close to every 2 pullup M_B_DQ41 DQ40 VSS
143 DQ41 VSS 28
+0.9V_DDR_VTT resistors terminated to +0.9V_DDR_VTT. M_B_DQ42 151 33
DQ42 VSS
Height 11mm
M_B_DQ43 153 34 RN1702 RN1705
M_B_DQ44 DQ43 VSS M_ODT3 M_B_A7
140 39 1 8 1 8
M_B_DQ45 DQ44 VSS M_CS3# M_B_A4
142 DQ45 VSS 40 2 7 2 7
M_B_DQ46 152 41 M_B_A0 3 6 3 6 M_B_A2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
M_B_DQ47 DQ46 VSS M_B_BS#1
154 DQ47 VSS 42 4 5 4 5
1
1
C1729
C1726
C1728
C1727
C1725
C1723
C1722
C1706
C1724
C1713
C1705
C1721
C1708
M_B_DQ48 157 47
M_B_DQ49 DQ48 VSS
SRN56J-5-GP SRN56J-5-GP
DY DY DY DY M_B_DQ50
159
173
DQ49 VSS
48
53
2
M_B_DQ51 DQ50 VSS
175 54 RN1703 RN1706
M_B_DQ52 DQ51 VSS M_B_A10 M_B_RAS#
B 158 59 1 8 1 8 B
M_B_DQ53 DQ52 VSS M_B_BS#0 M_ODT2
160 DQ53 VSS 60 2 7 2 7
M_B_DQ54 174 65 M_B_W E# 3 6 3 6 M_CS2#
M_B_DQ55 DQ54 VSS M_B_CAS# M_B_A13
176 DQ55 VSS 66 4 5 4 5
M_B_DQ56 179 71
M_B_DQ57 DQ56 VSS
181 72 SRN56J-5-GP SRN56J-5-GP
M_B_DQ58 DQ57 VSS
189 DQ58 VSS 77
M_B_DQ59 191 78 RN1707
M_B_DQ60 DQ59 VSS M_B_A12
180 DQ60 VSS 121 1 8
M_B_DQ61 182 122 2 7 M_B_BS#2
M_B_DQ62 DQ61 VSS M_B_A9
192 127 3 6
M_B_DQ63 DQ62 VSS M_CKE2
194 128 4 5
DQ63 VSS
VSS 132
M_B_DQS#0 11 133 SRN56J-5-GP
M_B_DQS#1 DQS0# VSS
29 138
M_B_DQS#2 DQS1# VSS
49 DQS2# VSS 139
M_B_DQS#3 68 144
M_B_DQS#4 DQS3# VSS
129 DQS4# VSS 145
M_B_DQS#5 146 149
M_B_DQS#6 DQS5# VSS
167 150
M_B_DQS#7 DQS6# VSS
186 DQS7# VSS 155
156
M_B_DQS0 VSS
13 161
M_B_DQS1 DQS0 VSS
31 162
M_B_DQS2 DQS1 VSS
51 165
M_B_DQS3 DQS2 VSS
70 DQS3 VSS 168
M_B_DQS4 131 171
M_B_DQS5 DQS4 VSS
148 172
M_B_DQS6 DQS5 VSS
169 DQS6 VSS 177
M_B_DQS7 188 178
DQS7 VSS
183
A
M_ODT2 VSS A
11 M_ODT2 114 184 <Core Design>
+V_DDR_MCH_REF M_ODT3 ODT0 VSS
11 M_ODT3 119 187
ODT1 VSS
190
VSS
1 193
2
VREF
VSS
VSS
VSS 196 Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
C1730 C1720 NP1 201 Taipei Hsien 221, Taiwan, R.O.C.
SCD1U16V2KX-3GP SC2D2U10V3KX-1GP NP1 GND
NP2 202
2
NP2 GND Title
DDR2-200P-33-GP DDRII-SODIMM SLOT2
www.vinafix.vn
Size Document Number Rev
Custom SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 17 of 59
5 4 3 2 1
5 4 3 2 1
SSID = ICH
R1816
ICH_RTCX1 LPC_LFRAME# 0R2J-2-GP 2 LPC_LFRAME#_IN
DYR18171 LPC_LFRAME#_IN 43
R1812 1 2 10MR2J-L-GP ICH_RTCX2 LPC_LAD3 0R2J-2-GP 2 LPC_LAD3_IN
DYR18181 LPC_LAD3_IN 43
X1801 LPC_LAD2 0R2J-2-GP 2 LPC_LAD2_IN
DYR18191 LPC_LAD2_IN 43
4 1 LPC_LAD1 0R2J-2-GP 2 LPC_LAD1_IN
DYR18201 LPC_LAD1_IN 43
1
LPC_LAD0 0R2J-2-GP 2 LPC_LAD0_IN
D C1807 C1806 DY 1 LPC_LAD0_IN 43 D
SC12P50V3JN-GP 3 2 SC12P50V3JN-GP
2
For MINICARD debug board.
X02 20090219 X-32D768KHZ-38GPU
X02 20090219
1 OF 6 LPC_LAD[0..3]
+RTC_CELL LPC_LAD[0..3] 26
U1801A
R1814 C23 K5 LPC_LAD0
ICH_RTCRST# RTCX1 FW H0/LAD0 LPC_LAD1
1 2 C24 RTCX2 FW H1/LAD1 K4
L6 LPC_LAD2
FW H2/LAD2
2
20KR2F-L-GP ICH_RTCRST# A25 K2 LPC_LAD3
RTCRST# FW H3/LAD3
RTC
LPC
C1801 SRTCRST# F20
SC1U10V3KX-3GP G1801 SM_INTRUDER# SRTCRST# +3.3V_RUN
C22 K3 LPC_LFRAME# 26
2
GAP-OPEN INTRUDER# FW H4/LFRAME# R1810
ICH_INTVRMEN B22 J3 1 2
DY
1
LAN100_SLP INTVRMEN LDRQ0#
A22 LAN100_SLP LDRQ1#/GPIO23 J1
10KR2J-3-GP
+RTC_CELL E25 N7
GLAN_CLK A20GATE KA20GATE 26 +1.05V_VCCP
A20M# AJ27 H_A20M# 8
R1815 C13 R1801
LAN_RSTSYNC H_DPRSTP#
1 2 DPRSTP# AJ25 H_DPRSTP# 8,11,34 1 2
LAN / GLAN
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# 8
1
20KR2F-L-GP G13 56R2J-4-GP
C1808 LAN_RXD1 H_FERR#_R
D14 LAN_RXD2 FERR# AJ26 1 2 H_FERR# 8
SC1U10V3KX-3GP R1804 56R2J-4-GP
2
D13 LAN_TXD0 CPUPW RGD AD22 H_PWRGOOD 8,30
D12 +3.3V_RUN
C LAN_TXD1 C
E13 AF25 H_IGNNE# 8 R1807
LAN_TXD2 IGNNE#
CPU
R1821 1 2
+1.5V_RUN
Place within 500 mil of SB. 1 2GPIO56 B10 AE22
DY
DY GLAN_DOCK#/GPIO56 INIT#
AG25
H_INIT# 8
H_INTR 8 10KR2J-3-GP
R1811 1 INTR
2 24D9R2F-L-GP 10KR2J-3-GP GLAN_COMP B28 GLAN_COMPI RCIN# L3 KBRCIN# 26
B27 GLAN_COMPO
AF23 H_NMI 8 +1.05V_VCCP
R1822 33R2J-2-GP ACZ_BIT_CLK NMI R1802
22 ICH_AZ_CODEC_BITCLK
1 2 AF6 HDA_BIT_CLK SMI# AF24 H_SMI# 8
ACZ_SYNC_R AH4 1 2
HDA_SYNC 56R2J-4-GP
STPCLK# AH27 H_STPCLK# 8
R1823 1 2 33R2J-2-GP ACZ_RST#_R AE7
22 ICH_AZ_CODEC_SYNC HDA_RST# H_THERMTRIP_R
THRMTRIP# AG26 1 2 H_THERMTRIP_1 1 2 H_THRMTRIP# 8,11,26,30,54
22 ICH_SDIN_CODEC AF4 R1803 54D9R2F-L1-GP R1805 0R2J-2-GP
R1824 33R2J-2-GP HDA_SDIN0
22 ICH_AZ_CODEC_RST#
1 2 Removed AG4 HDA_SDIN1 PECI AG27 Placed Within 2" from SB.
IHDA
AH3 HDA_SDIN2
X01 20081208 AE5 HDA_SDIN3
AH11
R1825 33R2J-2-GP ACZ_SDATAOUT_R SATA4RXN
22 ICH_SDOUT_CODEC
1 2 AG5 HDA_SDOUT SATA4RXP AJ11
SATA4TXN AG12
AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12
AE8 HDA_DOCK_RST#/GPIO34
X01 20081208 SATA_LED# AG8
SATA5RXN AH9
AJ9
TP1801 SATALED# SATA5RXP
SATA5TXN AE10
44 SATA_IRXN0_HTXN0_C AJ16 SATA0RXN SATA5TXP AF10
HDD 44 SATA_IRXP0_HTXP0_C AH16
SATA
C1802 1 SATA0RXP
44 SATA_ITXN0_HRXN0 2 SCD01U50V2KX-1GP SATA_ITXN0_HRXN0_C AF17 SATA0TXN SATA_CLKN AH18 CLK_PCIE_SATA# 7
44 SATA_ITXP0_HRXP0 C1803 1 2 SCD01U50V2KX-1GP SATA_ITXP0_HRXP0_C AG17 AJ18 CLK_PCIE_SATA 7
SATA0TXP SATA_CLKP
B 44 SATA_IRXN1_OTXN1_C AH13 AJ7 SATARBIAS B
SATA1RXN SATARBIAS#
ODD 44 SATA_IRXP1_OTXP1_C
44 SATA_ITXN1_ORXN1 C1804 1 2 SCD01U50V2KX-1GP SATA_ITXN1_ORXN1_C
AJ13
AG14
SATA1RXP
SATA1TXN
SATARBIAS AH7 1
R1806
2
24D9R2F-L-GP
44 SATA_ITXP1_ORXP1 C1805 1 2 SCD01U50V2KX-1GP SATA_ITXP1_ORXP1_C AF14 Place within 500 mils from SB.
SATA1TXP
ICH9M-GP-NF
ICH_AZ_CODEC_BITCLK
Removed
1
EC1802
X01 20081208 DY SC4D7P50V2CN-1GP
2
Lay Out Close U1801
+RTC_CELL
R1813
2 1 ICH_INTVRMEN integrated VccSus1_05,VccSus1_5,VccCL1_5
A
330KR2F-L-GP INTVRMEN High=Enable Low=Disable A
<Core Design>
integrated VccLan1_05VccCL1_05
R1809
LAN100_SLP
2 1 LAN100_SLP High=Enable Low=Disable Wistron Corporation
330KR2F-L-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R1808 Title
2 1 SM_INTRUDER#
ICH9-LAN/HDA/SATA/LPC(1/4)
www.vinafix.vn
1MR2J-1-GP Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 18 of 59
5 4 3 2 1
5 4 3 2 1
2 OF 6 +3.3V_RUN
SSID = ICH D11
U1801B
AD0 REQ0# F1 PCI_REQ0# RN1905
PCI_GNT0# PCI_PIRQF#
5 OF 6
C8
D9
AD1 PCI GNT0# G4
B6 PCI_REQ1# PCI_TRDY#
8
7
1
2
U1801E +3.3V_RUN AD2 REQ1#/GPIO50 PCI_GNT1# PCI_REQ3#
E12 AD3 GNT1#/GPIO51 A7 TP1907 6 3
AA26 H5 E9 F13 PCI_REQ2# PCI_PIRQD# 5 4
VSS VSS AD4 REQ2#/GPIO52 PCI_GNT2#
AA27 VSS VSS J23 C9 AD5 GNT2#/GPIO53 F12 TP1916
AA3 J26 E10 E6 PCI_REQ3# SRN8K2J-4-GP
VSS VSS U1902 AD6 REQ3#/GPIO54 PCI_GNT3#
AA6 VSS VSS J27 B7 AD7 GNT3#/GPIO55 F6
AB1 AC22 1 C7 RN1901
VSS VSS B AD8 PCI_PIRQB#
AA23 VSS VSS K28 5 VCC C5 AD9 C/BE0# D8 8 1
AB28 K29 2 PCI_PLTRST# G11 B4 PCI_PIRQG# 7 2
D
AB29
VSS VSS
L13 11,25,26,43,50 PLT_RST# PLT_RST# 4
DY A
F8
AD10 C/BE1#
D6 PCI_REQ0# 6 3
D
VSS VSS Y AD11 C/BE2# PCI_PIRQH#
AB4 VSS VSS L15 GND 3 F11 AD12 C/BE3# A5 5 4
AB5 VSS VSS L2 E7 AD13
AC17 L26 74LVC1G08GW-1-GP A3 D3 PCI_IRDY# SRN8K2J-4-GP
VSS VSS AD14 IRDY#
AC26 VSS VSS L27 D2 AD15 PAR E3
AC27 L5 R1907 1 2 0R2J-2-GP F10 R1 PCIRST1# RN1902
VSS VSS AD16 PCIRST# TP1903
AC3 L7 D5 C6 PCI_DEVSEL# PCI_STOP# 8 1
VSS VSS AD17 DEVSEL# PCI_PERR# PCI_PLOCK#
AD1 VSS VSS M12 D10 AD18 PERR# E4 7 2
AD10 M13 B3 C2 PCI_PLOCK# PCI_IRDY# 6 3
VSS VSS AD19 PLOCK# PCI_SERR# PCI_PERR#
AD12 VSS VSS M14 F7 AD20 SERR# J4 5 4
AD13 M15 R1913 1 2 0R2J-2-GP C3 A4 PCI_STOP#
AD14
VSS VSS
M16
53 PLTRST_ICH_DELAY# DY F3
AD21 STOP#
F5 PCI_TRDY# SRN8K2J-4-GP
VSS VSS AD22 TRDY# PCI_FRAME#
AD17 VSS VSS M17 F4 AD23 FRAME# D7
AD18 M23 C1 RN1906
VSS VSS AD24 PCI_PLTRST# PCI_DEVSEL#
AD21
AD28
VSS VSS M28
M29
X01 20081208 G7
H7
AD25 PLTRST# C14
D4 PCI_REQ1#
8
7
1
2
VSS VSS AD26 PCICLK CLK_PCI_ICH 7
AD29 N11 D1 R2 ICH_PME# PCI_FRAME# 6 3
VSS VSS AD27 PME# TP1904
AD4 N12 G5 PCI_REQ2# 5 4
VSS VSS AD28
AD5 VSS VSS N13 H6 AD29
AD6 N14 G1 SRN8K2J-4-GP
VSS VSS AD30
AD7 VSS VSS N15 H3 AD31
AD9 VSS VSS N16
RN1904
AE12
AE13
VSS VSS N17
N18 PCI_PIRQA# J5
Interrupt I/F H4 PCI_PIRQE# PCI_SERR# 8 1
VSS VSS PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF# PCI_PIRQE#
AE14 VSS VSS N26 E1 PIRQB# PIRQF#/GPIO3 K6 7 2
AE16 N27 PCI_PIRQC# J6 F2 PCI_PIRQG# PCI_PIRQA# 6 3
VSS VSS PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH# PCI_PIRQC#
AE17 VSS VSS P12 C4 PIRQD# PIRQH#/GPIO5 G2 5 4
AE2 VSS VSS P13
AE20 P14 ICH9M-GP-NF SRN8K2J-4-GP
VSS VSS
C AE24 VSS VSS P15 C
AE3 VSS VSS P16
AE4 VSS VSS P17
AE6 P2 PCI_GNT0# 1 2
AE9
VSS VSS
P23 R1910 DY 1KR2J-1-GP
VSS VSS SPI_CS#1
AF13 P28 1 2
AF16
VSS VSS
P29 R1911 DY 1KR2J-1-GP
VSS VSS RP1901 RN1903 PCI_GNT3#
AF18 P4 1 2
AF22
VSS
VSS
VSS
VSS P7 USB_OC#7 1 10 +3.3V_ALW +3.3V_ALW 8 1 USB_OC#9 R1909 DY 1KR2J-1-GP
AH26 R11 USB_OC#11 2 9 USB_OC#0 7 2 USB_OC#8
VSS VSS USB_OC#5 USB_OC#1 USB_OC#10
AF26 VSS VSS R12 3 8 6 3
AF27 R13 USB_OC#4 4 7 USB_OC#6 5 4 USB_OC#3
VSS VSS USB_OC#2
AF5 VSS VSS R14 +3.3V_ALW 5 6
AF7 R15 SRN8K2J-4-GP BOOT BIOS Strap
VSS VSS SRN10KJ-L3-GP
AF9 VSS VSS R16
AG13 R17 PCI_GNT#0 SPI_CS#1 BOOT BIOS Location
VSS VSS 4 OF 6
AG16 VSS VSS R18
AG18 R28 U1801D 0 1 SPI
VSS VSS
AG20 VSS VSS T12 N29 PERN1 DMI0RXN V27 DMI_IRXN0_MTXN0 11
AG23 T13 N28 V26 1 0 PCI
Direct Media Interface
VSS VSS PERP1 DMI0RXP DMI_IRXP0_MTXP0 11
AG3 VSS VSS T14 P27 PETN1 DMI0TXN U29 DMI_ITXN0_MRXN0 11
AG6 VSS VSS T15 P26 PETP1 DMI0TXP U28 DMI_ITXP0_MRXP0 11 1 1 LPC(Default)
AG9 VSS VSS T16
AH12 VSS VSS T17 43 PCIE_IRXN2_MTXN2 L29 PERN2 DMI1RXN Y27 DMI_IRXN1_MTXN1 11 A16 swap override strap
AH14
AH17
VSS VSS T23
B26
Mini 43 PCIE_IRXP2_MTXP2
C1903 2 1 SCD1U16V2KX-3GP PCIE_ITXN2_MRXN2_C
L28
M27
PERP2 DMI1RXP Y26
W 29
DMI_IRXP1_MTXP1 11
low = A16 swap override enable
VSS VSS 43 PCIE_ITXN2_MRXN2 PETN2 DMI1TXN DMI_ITXN1_MRXN1 11
AH19 VSS VSS U12 Card 43 PCIE_ITXP2_MRXP2 C1902 2 1 SCD1U16V2KX-3GP PCIE_ITXP2_MRXP2_C M26 PETP2 DMI1TXP W 28 DMI_ITXP1_MRXP1 11 PCI_GNT#3 high = default
AH2 VSS VSS U13
AH22 VSS VSS U14 25 PCIE_IRXN3_RTXN3 J29 PERN3 DMI2RXN AB27 DMI_IRXN2_MTXN2 11
AH25 U15 J28 AB26
PCI-Express
VSS VSS 25 PCIE_IRXP3_RTXP3 PERP3 DMI2RXP DMI_IRXP2_MTXP2 11
C1904 2 1 SCD1U16V2KX-3GP PCIE_ITXN3_LRXN3_C
B AH28
AH5
VSS VSS U16
U17
LAN 25 PCIE_ITXN3_LRXN3
C1905 2 1 SCD1U16V2KX-3GP PCIE_ITXP3_LRXP3_C
K27
K26
PETN3 DMI2TXN AA29
AA28
DMI_ITXN2_MRXN2 11 B
VSS VSS 25 PCIE_ITXP3_LRXP3 PETP3 DMI2TXP DMI_ITXP2_MRXP2 11
AH8 VSS VSS AD23
AJ12 VSS VSS U26 G29 PERN4 DMI3RXN AD27 DMI_IRXN3_MTXN3 11 +1.5V_RUN
USB
AJ14 VSS VSS U27 G28 PERP4 DMI3RXP AD26 DMI_IRXP3_MTXP3 11 Pair Device
AJ17 VSS VSS U3 H27 PETN4 DMI3TXN AC29 DMI_ITXN3_MRXN3 11
AJ8 VSS VSS V1 H26 PETP4 DMI3TXP AC28 DMI_ITXP3_MRXP3 11 0 USB1
2
B11 VSS VSS V13
B14 V15 50 PCIE_IRXN5_NTXN5 E29 T26 CLK_PCIE_ICH# 7 R1908 1 USB2
VSS VSS PERN5 DMI_CLKN 24D9R2F-L-GP
B17
B2
VSS VSS V23
V28
New 50 PCIE_IRXP5_NTXP5
C1907 2 1 SCD1U16V2KX-3GP PCIE_ITXN5_NRXN5_C
E28
F27
PERP5 DMI_CLKP T25 CLK_PCIE_ICH 7
2 USB3
VSS VSS 50 PCIE_ITXN5_NRXN5 PETN5
B20 V29 Card 50 PCIE_ITXP5_NRXP5 C1906 2 1 SCD1U16V2KX-3GP PCIE_ITXP5_NRXP5_C F26 AF29
1
VSS VSS PETP5 DMI_ZCOMP DMI_IRCOMP_R
B23 VSS VSS V4 DMI_IRCOMP AF28 3 RESERVED
B5 VSS VSS V5 C29 PERN6/GLAN_RXN
B8 VSS VSS W 26 C28 PERP6/GLAN_RXP USBP0N AC5 USB_PN0 46 4 MINI CARD
C26
C27
VSS VSS W 27
W3
D27
D26
PETN6/GLAN_TXN USBP0P AC4
AD3
USB_PP0 46 USB1 5 RESERVED
VSS VSS PETP6/GLAN_TXP USBP1N USB_PN1 46
E11
E14
VSS VSS Y1
Y28 D23
USBP1P AD2
AC1 USB_PN2
USB_PP1 46 USB2 6 BLUETOOTH
VSS VSS TP1917 SPI_CLK USBP2N USB_PN2 51
USB_PP2
E18
E2
VSS VSS Y29
Y4
TP1918
SPI_CS#1
D24
F23
SPI_CS0# USBP2P AC2
AA5 USB_PN3
USB_PP2 51 USB3 7 NEW CARD
VSS VSS SPI_CS1#/GPIO58/CLGPIO6 USBP3N TP1908
E21 Y5 AA4 USB_PP3
VSS VSS USBP3P TP1909
E24 VSS VSS AG28 TP1920 D25 SPI_MOSI USBP4N AB2 USB_PN4 43 8 RESERVED
SPI
E5
E8
VSS VSS AH6
AF2
TP1919 E23 SPI_MISO USBP4P AB3
AA1 USB_PN5
USB_PP4 43 MINI CARD 9 RESERVED
VSS VSS USBP5N TP1912
F16 B25 46 USB_OC#0 USB_OC#0 N4 AA2 USB_PP5
VSS VSS OC0#/GPIO59 USBP5P TP1913
F28 46 USB_OC#1 USB_OC#1 N5 W5 10 Card Reader
VSS OC1#/GPIO40 USBP6N USB_PN6 45
ICH_GND1 USB_OC#2
F29
G12
VSS VSS A1
A2
TP1905 51 USB_OC#2
USB_OC#3
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3
USB_PP6 45 BlUETOOTH 11 CAMERA
VSS VSS OC3#/GPIO42 USBP7N USB_PN7 50
USB_OC#4
A
G14
G18
VSS VSS A28
A29 ICH_GND2 USB_OC#5
M1
N2
OC4#/GPIO43 USBP7P Y2
W1 USB_PN8
USB_PP7 50 New Card <Core Design>
A
VSS VSS TP1906 OC5#/GPIO29 USBP8N TP1910
G21 AH1 USB_OC#6 M4 W2 USB_PP8
VSS VSS OC6#/GPIO30 USBP8P TP1911
G24 AH29 NCTF PIN USB_OC#7 M3 V2 USB_PN9
VSS VSS OC7#/GPIO31 USBP9N TP1914
G26
G27
VSS
VSS
VSS
VSS
AJ1
AJ2
ICH_GND3
TP1901
USB_OC#8
USB_OC#9
N3
N1
OC8#/GPIO44
OC9#/GPIO45
USBP9P
USBP10N
V3
U5
USB_PP9
USB_PN10
TP1915
USB_PN10 50
Wistron Corporation
USB_OC#10 USB_PP10 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G8
H2
VSS VSS AJ28
AJ29 ICH_GND4 USB_OC#11
P5
P3
OC10#/GPIO46 USBP10P U4
U1
USB_PP10 50 Card Reader Taipei Hsien 221, Taiwan, R.O.C.
VSS VSS TP1902 OC11#/GPIO47 USBP11N USB_PN11 47
H23
H28
VSS VSS B1
B29 USB_RBIAS_PN AG2 USBP11P U2 USB_PP11 47 CAMERA Title
VSS VSS USBRBIAS
H29 2 1 AG1
VSS USBRBIAS# ICH9-PCI/PCIE/DMI/USB/GND(2/4)Rev
www.vinafix.vn
ICH9M-GP-NF R1912 ICH9M-GP-NF Size Document Number
22D6R2F-L1-GP Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 19 of 59
5 4 3 2 1
5 4 3 2 1
SSID = ICH +3.3V_RUN
3 OF 6
U1801C RN2001
+3.3V_ALW G16 AH23 SATA0GP SATA0GP 8 1
50 SMB_CLK SMBCLK SATA0GP/GPIO21
A13 AF19 SATA1GP SATA2GP 7 2
50 SMB_DATA SMBDATA SATA1GP/GPIO19
LINKALERT# E17 AE21 SATA2GP SATA3GP 6 3
SATA
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
GPIO
SMB
RN2003 ME_EC_CLK1 C17 AD20 SATA3GP SATA1GP 5 4
SMB_DATA ME_EC_DATA1 SMLINK0 SATA5GP/GPIO37
4 1 B18 SMLINK1
3 2 SMB_CLK H1 CLK_14M_ICH 7 SRN10KJ-6-GP
ICH_RI# CLK14
F19 AF3
Clocks
RI# CLK48 CLK_48M_ICH 7
SRN2K2J-1-GP
D SUS_STAT# ICH_SUSCLK D
TP2011 R4 SUS_STAT#/LPCPD# SUSCLK P1 ICH_SUSCLK 28
8,43 ITP_DBRESET# ITP_DBRESET# G19
R2012 1 LINKALERT# SYS_RESET# SB_SLP_S3# PM_PWROK
2 10KR2J-3-GP SLP_S3# C16 R2018 1 2 10KR2J-3-GP
M6 E16 DPRSLPVR R2004 1 2 100KR2J-1-GP
11 PM_SYNC# PMSYNC#/GPIO0 SLP_S4#
G17 PM_SLP_S5#
PM_SLP_S4# 26,38,50
TP2012 LAN_RST#1 R2011 1 DY 2 0R2J-2-GP
RN2002 SMB_ALERT# SLP_S5# RSMRST#_KBC R2020 1 10KR2J-3-GP
TP2009 A17 SMBALERT#/GPIO11 2
4 1 ME_EC_DATA1 C10 GPIO26 TP2006
ME_EC_CLK1 H_STP_PCI# S4_STATE#/GPIO26
3 2 7 H_STP_PCI# A14 STP_PCI#
H_STP_CPU# PM_PWROK
SYS GPIO
7 H_STP_CPU# E19 STP_CPU# PW ROK G20
SRN10KJ-5-GP
26 PM_CLKRUN# L4 CLKRUN# DPRSLPVR/GPIO16 M2 DPRSLPVR 11,34
R2024 1 2 10KR2J-3-GP PCIE_WAKE# PCIE_WAKE# PM_BATLOW#_R
Power MGT
25,50 PCIE_WAKE# E20 W AKE# BATLOW # B13
26 INT_SERIRQ INT_SERIRQ M5 SERIRQ
28 THERM_SCI# AJ23 THRM# PW RBTN# R3 PM_PWRBTN# 26
RN2004
8 1 PM_BATLOW#_R 26,34 VGATE_PWRGD VGATE_PWRGD D21 D20 LAN_RST#1
SMB_ALERT# VRMPW RGD LAN_RST# R2017
7 2
6 3 R2009 1 2 0R2J-2-GP ICH_TP7 A20 D22 M_PWROK 2 1
5 4 ICH_RI# DY SST RSMRST# RSMRST#_KBC 26 PM_PWROK 11,26,28
26 ECSCI# ECSCI# AG19 R5 CK_PWRGD 7 0R2J-2-GP
SRN8K2J-4-GP PLTRST_DELAY#_SB TACH1/GPIO1 CK_PW RGD
AH21 TACH2/GPIO6
26 ECSWI# ECSWI# AG21 R6 M_PWROK M_PWROK 11
ECSMI# TACH3/GPIO7 CLPW ROK
26 ECSMI# A21 GPIO8
R2022 1 2 10KR2J-3-GP ECSMI# GPIO12 C12 B16 PM_SLP_M#
TP2005 LAN_PHY_PW R_CTRL/GPIO12 SLP_M# TP2007 +3.3V_RUN
GPIO13 C21
TP2018 GPIO17 ENERGY_DETECT/GPIO13
TP2019 AE18 TACH0/GPIO17 CL_CLK0 F24 CL_CLK0 11
1
GPIO18 K1 B19
TP2003 GPIO18 CL_CLK1
GPIO20 AF8
TP2010 GPIO20
C
GPIO22 AJ22 F22 R2023 C
TP2001 SCLOCK/GPIO22 CL_DATA0 CL_DATA0 11
GPIO27 3K24R2F-GP
Controller Link
A9 C19
GPIO
TP2008 GPIO27 CL_DATA1
GPIO28 D19
TP2013
2
+3.3V_RUN GPIO28 CL_VREF0_ICH
7 CLKSATAREQ# L1 SATACLKREQ#/GPIO35 CL_VREF0 C25
CLK_SEL0 AE19 A19
RN2006 CLK_SEL1 SLOAD/GPIO38 CL_VREF1
AG22 SDATAOUT0/GPIO39
H_STP_CPU# GPIO48
SCD1U10V2KX-4GP
4 1 TP2017 AF21 SDATAOUT1/GPIO48 CL_RST0# F21 CL_RST#0 11
1
H_STP_PCI#
453R2F-1-GP
3 2 AH24 D18
DY TP2002 GPIO49 CL_RST1#
C2001
R2021
iTPM_EN A8
SRN10KJ-5-GP GPIO57/CLGPIO5 GPIO24
GPIO24/MEM_LED A16 TP2004
22 SB_SPKR M7 C18 GPIO10 TP2015
2
SPKR GPIO10/SUS_PW R_ACK GPIO14
11 MCH_ICH_SYNC# AJ24 C11 TP2016
2
R2005 1 8K2R2J-3-GP PM_CLKRUN# ICH_TP3 MCH_SYNC# GPIO14/AC_PRESENT
2 TP2014 B21 TP3 GPIO9/W OL_EN C20
MISC
R2007 1 2 8K2R2J-3-GP INT_SERIRQ AH20
R2008 2 10KR2J-3-GP GPIO18 PW M0
1 AJ20 PW M1
R2013 2 1 10KR2J-3-GP ECSCI# AJ21
R2015 1 10KR2J-3-GP ECSWI# PW M2
2
R2006 2 1 10KR2J-3-GP CLKSATAREQ# ICH9M-GP-NF
+3.3V_RUN
R2030
iTPM Select(Not Strap Pin)
1
PLTRST_DELAY#_SB 1 2 PLTRST_DELAY#
iTPM Select(Not Strap Pin) R2001 R2014 DY PLTRST_DELAY# 26,53
10KR2J-3-GP 10KR2J-3-GP 0R2J-2-GP
B
DY DY CLK Gen select
B
iTPM_EN
2
iTPM_EN CLK_SEL0
CLK_SEL1 CLK_SEL0 CLL_SEL1
1
R2019 0 = Disable Disable X X
1
100KR2J-1-GP
R2003 R2016 Seligo 1 1 +3.3V_ALW
1 = Enable 10KR2J-3-GP
DY DY 10KR2J-3-GP
Realtek 1 0
2
ICS 0 1
2
U2001
1 B
VCC 5
SB_SLP_S3# 2 A DY 4 PM_SLP_S3# PM_SLP_S3# 26,28,30,36,37,38,39,50
Y
3 GND
74LVC1G08GW-1-GP
+3.3V_RUN
R2010 2 1 0R2J-2-GP
RN2005
4 1
3 2
SRN2K2J-1-GP
A A
<Core Design>
U2002
7,16,17,43 ICH_SMBDATA 1 6 SMB_DATA
Wistron Corporation
2 5 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SMB_CLK 3 4 ICH_SMBCLK 7,16,17,43 Title
2N7002SPT ICH9-GPIO/PM/CL(3/4)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 20 of 59
5 4 3 2 1
5 4 3 2 1
+RTC_CELL 6 OF 6 +1.05V_VCCP
U1801F R2115
SSID = ICH A23 VCCRTC VCC1_05 A15 SB_VCC1_05 1 2
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
VCC1_05 B15
C2143
C2142
C2144
C2140
C2145
V5REF_S0 A6 C15 0R3-0-U-GP
V5REF 2mA VCC1_05
1
C2155
C2156
VCC1_05 D15
V5REF_S5 AE1 E15 R2116
V5REF_SUS 2mA VCC1_05
F15
DY DY 1 2
2
VCC1_05
AA24 VCC1_5_B VCC1_05 L11
AA25 L12 0R3-0-U-GP
VCC1_5_B VCC1_05
AB24 VCC1_5_B VCC1_05 L14
AB25 VCC1_5_B VCC1_05 L16
AC24 VCC1_5_B VCC1_05 L17
*Within a given well, 5VREF needs to
1634mA
AC25 VCC1_5_B VCC1_05 L18
D 1D5V_DMIPLL_ICH_S0 +1.5V_RUN D
be up before the corresponding 3.3V rail AD24 VCC1_5_B VCC1_05 M11
AD25 M18 L2102
VCC1_5_B VCC1_05 1D5V_DMIPLL_ICH_S0
SC10U6D3V5MX-3GP
SCD01U16V2KX-3GP
AE25 VCC1_5_B VCC1_05 P11 2 1
AE26 P18 COIL-1UH-31-GP
+3.3V_RUN +5V_RUN +3.3V_ALW +5V_ALW VCC1_5_B VCC1_05
AE27 VCC1_5_B VCC1_05 T11
1
C2116
C2117
AE28 VCC1_5_B VCC1_05 T18
AE29 U11
A
A
2 VCC1_5_B VCC1_05
2
F25 U18
CORE
2
D2102 R2112 D2101 R2108 VCC1_5_B VCC1_05
G25 VCC1_5_B VCC1_05 V11
SDMK0340L-7-F-GP 10R2J-2-GP SDMK0340L-7-F-GP 10R2J-2-GP H24 V12
VCC1_5_B VCC1_05
H25 VCC1_5_B VCC1_05 V14
J24 V16 +1.05V_VCCP
K
1
V5REF_S0 V5REF_S5 VCC1_5_B VCC1_05 R2117
J25 VCC1_5_B VCC1_05 V17
VCCDMI
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
K24 VCC1_5_B VCC1_05 V18 1 2
1
1
C2123 K25
SC1U6D3V2KX-GP C2110 VCC1_5_B 0R3-0-U-GP
L23 VCC1_5_B 23mA VCCDMIPLL R29
1
SCD1U16V2KX-3GP
C2136
C2114
C2115
646mA
L24
2
2
VCC1_5_B +1.05V_VCCP
L25 VCC1_5_B W 23
M24 50mA VCCDMI Y23
2
VCC1_5_B VCCDMI R2114
M25 VCC1_5_B
N23 AB23 SB_V_CPU_IO 1 2
VCC1_5_B 2mA V_CPU_IO SB_V_CPU_IO
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
N24 VCC1_5_B V_CPU_IO AC23
C2129
C2130
C2108
N25 0R3-0-U-GP
VCC1_5_B
1
+1.5V_RUN +1.5V_PCIE_ICH P24 AG29 +3.3V_RUN
VCC1_5_B VCC3_3
P25 VCC1_5_B DY
VCCA3GP
R2109 R24 AJ6
2
VCC1_5_B VCC3_3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
1 2 R25 VCC1_5_B
C2128
C2131
C2107
ST220U2D5VBM-LGP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC2D2U10V3KX-1GP
R26 VCC1_5_B VCC3_3 AC10
1
0R5J-5-GP R27 VCC1_5_B
1
1
TC2101
C2137
C2149
C2112
C2111
C2113
C T24 VCC1_5_B VCC3_3 AD19 C
T27 AF20
DY DY DY
2
VCC1_5_B VCC3_3 +3.3V_RUN
T28 AG24
2
2
VCC1_5_B VCC3_3
T29 AC20
VCCP_CORE
VCC1_5_B VCC3_3
308mA
U24 VCC1_5_B
U25 VCC1_5_B VCC3_3 B9
SCD1U10V2KX-4GP
V24 VCC1_5_B VCC3_3 F9
C2146
C2147
C2153
V25 VCC1_5_B VCC3_3 G3 +3.3V_RUN
1
U23 VCC1_5_B VCC3_3 G6
1
+1.5V_RUN +VCCSATAPLL W 24 J2
VCC1_5_B VCC3_3 C2105
W 25 J7
2
+3.3V_RUN L2101 VCC1_5_B VCC3_3 SCD1U10V2KX-4GP
K23 K7
PCI
2
VCC1_5_B VCC3_3
1 2 Y24 VCC1_5_B
R2110 L-10UH-11-GP SC1U10V3KX-3GP +3.3V_ALW
SC10U6D3V5MX-3GP
Y25 VCC1_5_B 11mA VCCHDA AJ4
1 2 SB_VCCLAN3_3 R2107
1
1
C2101
C2103
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AJ19 VCCSATAPLL47mA 11mA VCCSUSHDA AJ3 1 2
0R3-0-U-GP
1
1
C2124
C2120
AC16 AC8 VCCSUS1_05[1] 1 0R2J-2-GP
TP2101
2
VCC1_5_A VCCSUS1_05
C2102
AD15 F17 VCCSUS1_05[2] 1
DY AD16
VCC1_5_A VCCSUS1_05 TP2102
R2101
2
2
VCC1_5_A
ARX
AE15 AD8 VCCSUS1_5[1] 1 2
AF15
VCC1_5_A VCCSUS1_5 DY +1.5V_RUN
+1.5V_RUN VCC1_5_A VCCSUS1_5[2] 0R3-0-U-GP
AG15 VCC1_5_A VCCSUS1_5 F18
AH15 VCC1_5_A
AJ15 VCC1_5_A
SCD1U10V2KX-4GP
VCCSUS3_3 A18
C2152
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AC11 VCC1_5_A VCCSUS3_3 D16
1
+1.5V_RUN
C2132
C2104
VCCPSUS
AD11 VCC1_5_A VCCSUS3_3 D17
AE11 E22
1
VCC1_5_A VCCSUS3_3
ATX
R2121 AF11
2
VCC_GLAN_PLL VCC1_5_A
B 1 2 AG10 VCC1_5_A
B
SC10U6D3V5MX-3GP
SC2D2U10V3KX-1GP
AG11 VCC1_5_A VCCSUS3_3 AF1
1342mA
0R3-0-U-GP AH10 VCC1_5_A
1
1
C2122
C2126
AJ10 VCC1_5_A VCCSUS3_3 T1
T2 +3.3V_ALW
VCCSUS3_3 R2111
AC9 T3
2
VCC1_5_A VCCSUS3_3 SB_VCCSUS3_3
VCCSUS3_3 T4 1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC18 VCC1_5_A VCCSUS3_3 T5
AC19 T6 0R3-0-U-GP
VCC1_5_A VCCSUS3_3
1
C2125
C2127
C2121
212mA
VCCSUS3_3 U6
AC21 U7
VCC1_5_A VCCSUS3_3
V6
DY DY
VCCPUSB
2
VCCSUS3_3
G10 VCC1_5_A VCCSUS3_3 V7
G9 VCC1_5_A VCCSUS3_3 W6
+1.5V_RUN W7
R2105 VCCSUS3_3 +3.3V_ALW
AC12 VCC1_5_A VCCSUS3_3 Y6
1 2 1D5V_USB_S0 AC13 Y7 R2118
VCC1_5_A VCCSUS3_3 ICH9_SUS3_3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AC14 VCC1_5_A VCCSUS3_3 T7 1 2
0R3-0-U-GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD022U16V2KX-3GP
1
1
C2106
C2133
C2134
AJ5 G22 0R3-0-U-GP
VCCUSBPLL 11mA VCCCL1_05
1
C2141
C2139
C2138
DY AA7 G23
2
VCC1_5_A VCCCL1_5
USB CORE
AB6
2
VCC1_5_A
AB7 A24
73mA
VCC1_5_A VCCCL3_3
AC6 VCC1_5_A VCCCL3_3 B24
AC7 VCC1_5_A
VCCLAN1D05 A10 VCCLAN1_05
A11 VCCLAN1_05
1
VCCSUS1_05[3]
A C2154 A
A12
SCD1U10V2KX-4GP DY SB_VCCLAN3_3 B12
VCCLAN3_3 78mA <Core Design>
2
VCCLAN3_3 VCCSUS1_5[3]
+1.5V_RUN VCC_GLAN_PLL
Wistron Corporation
SC1U10V3KX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
A27 VCCGLANPLL 23mA
SCD1U10V2KX-4GP
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GLAN POWER
C2150
C2148
C2151
D28 VCCGLAN1_5 Taipei Hsien 221, Taiwan, R.O.C.
80mA
D29 VCCGLAN1_5 DY
1
+3.3V_RUN
C2119
E26
2
2
C2118 +3.3V_RUN VCCGLAN1_5 R2120 Title
E27
SC4D7U6D3V3KX-GP DY VCCGLAN1_5 SB_VCCCL3_3 1 2
ICH9-POWER(4/4)
2
A26 VCCGLAN3_3 1mA
www.vinafix.vn
0R3-0-U-GP Size Document Number Rev
ICH9M-GP-NF Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 21 of 59
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
+AVDD
+5V_RUN
+3.3V_RUN
+3.3V_RUN Close to codec L2201
1 2
SC1U10V3KX-3GP
Close to codec
SCD1U10V2KX-4GP
AUD_DVDDCORE 0R5J-5-GP +5V_RUN
+PVDD
SCD1U10V2KX-4GP
1
C2215
C2217
C2213 L2202
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
2
1
D D
C2208
C2211
SC10U6D3V5MX-3GP 1 2
C2207
2
U2201
SC1U10V3KX-3GP
0R5J-5-GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
1
1
C2219
C2218
C2203
1 27 L2203
DVDD_CORE AVDD
AVDD 38 1 2
9 AUD_AGND
2
ICH_AZ_CODEC_BITCLK DVDD 0R5J-5-GP
PVDD 39
3 DVDD_IO PVDD 45
13 AUD_SENSE_A
SENSE_A
1
ICH_AZ_CODEC_BITCLK 6 14 AUD_SENSE_B AUD_AGND
C2210 18 ICH_AZ_CODEC_BITCLK HDA_BITCLK SENSE_B
DY SC4D7P50V2CN-1GP R2201 1 2 33R2J-2-GP ICH_SDIN_CODEC_C0 8
2
18 ICH_SDIN_CODEC HDA_SDI AUD_EXT_MIC_L
HP0_PORT_A_L 28 AUD_EXT_MIC_L 50
ICH_SDOUT_CODEC 5 29 AUD_EXT_MIC_R
18 ICH_SDOUT_CODEC HDA_SDO HP0_PORT_A_R AUD_EXT_MIC_R 50
23 AUD_VREFOUT_B AUD_VREFOUT_B 50
ICH_AZ_CODEC_SYNC VREFOUT_A_OR_F
18 ICH_AZ_CODEC_SYNC
10 HDA_SYNC
31 AUD_HP1_JACK_L_C R2218 1 2 60D4R2F-GP AUD_HP1_JACK_L
ICH_AZ_CODEC_RST# HP1_PORT_B_L AUD_HP1_JACK_R_C R2220 AUD_HP1_JACK_L 50
18 ICH_AZ_CODEC_RST#
11 HDA_RST# HP1_PORT_B_R 32 1 2 60D4R2F-GP AUD_HP1_JACK_R
AUD_HP1_JACK_R 50
+3.3V_RUN
19 AUD_INT_MIC_R_L C2214 1 2 SC1U10V3KX-3GP
X02 20090226
PORT_C_L INT_MIC_L_R 44
PORT_C_R 20
24 AUD_VREFOUT_C R2202 1 2 4K7R2J-2-GP
X02 20090309
VREFOUT_C
1
AUD_DMIC_CLK 2
R2208 AUD_DMIC_IN0 DMIC_CLK/GPIO1 AUD_SPK_L+ R2203
47 AUD_DMIC_IN0 4 DMIC0/GPIO2 SPKR_PORT_D_L+ 40 AUD_SPK_L+ 44 From SB
10KR2J-3-GP 41 AUD_SPK_L- C2209 120KR2F-L-GP
SPKR_PORT_D_L- AUD_SPK_L- 44 SB_SPKR_R
46 DMIC1/GPIO0/SPDIF_OUT_1 2 1 SCD1U10V2KX-4GP 1 2 SB_SPKR 20
43 AUD_SPK_R-
2
SPKR_PORT_D_R- AUD_SPK_R+ AUD_SPK_R- 44
C 48 SPDIF_OUT_0 SPKR_PORT_D_R+ 44 AUD_SPK_R+ 44 2 1 SCD1U10V2KX-4GP KBC_BEEP_R 1 2 KBC_BEEP 26 C
AMP_MUTE# R2206
2
AMP_MUTE# 47 15 C2212 499KR2F-1-GP From EC
26 AMP_MUTE# EAPD PORT_E_L R2205
PORT_E_R 16
X02 20090226 PUMP_CAPN
DUMMY-C2
35
PORT_F_L 17
18 AUD_PC_BEEP
X02 20090226
CAP- PORT_F_R
1
AUD_HP1_JACK_R AUD_HP1_JACK_L
1
C2204
SC2D2U25V5KX-1GP 2 36
PC_BEEP 12 AUD_PC_BEEP
CAP+
PUMP_CAPP
MONO_OUT 25 Trace width>15 mils
D
7 DVSS Q2203 Q2201
+3.3V_RUN 33 22 AUD_CAP2 P8503BMG-GP P8503BMG-GP
U2202 AVSS CAP2
30 AVSS G G
5 1 26 21 AUD_VREFFLT
VCC OE# AVSS VREFFILT
2
DY
S
AUD_DMIC_CLK_Y A AUD_V_B
4 Y GND 3 42 PVSS V- 34
74LVC1G125DC-GP 49 37 AUD_VREG
GND VREG
1
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC4D7U6D3V3KX-GP
SC1U6D3V2KX-GP
0R2J-2-GP
C2205
C2220
92HD81B1X5NLGXYAX8-GP
DY
S
1
1
R2210 +15V_ALW
C2201
C2202
P8503BMG-GP G G
2
R2207 AUD_AGND Q2204
2
1 2 33R2J-2-GP AUD_DMIC_CLK P8503BMG-GP
47 AUD_DMIC_CLK_G Q2202
1
D
EC2201 R2219
B
SC22P50V2JN-4GP DY AUD_AGND AUD_AGND AUD_AGND AUD_AGND 100KR2J-1-GP
B
2
Close to codec
2
HP_CODEC_MUTE
Azalia I/F EMI
D
R2212
ICH_SDOUT_CODEC Q2205 2 1
2N7002-7F-GP
AMP_MUTE# G 0R3-0-U-GP
1
R2204 R2213
S
47R2J-2-GP 2 1
DY +AVDD R2209 +AVDD
20KR2F-L-GP 0R3-0-U-GP
2
1 2 AUD_HP1_JD# 50
1
1
ICH_AZ_CODEC_SDOUT1
R2215 R2216 R2214
2K49R2F-GP 2K49R2F-GP 2 1
0R3-0-U-GP
2
2
AUD_SENSE_A AUD_SENSE_B
1
1
C2221 R2211 AUD_AGND
SC1000P50V3JN-GP-U R2217 20KR2F-L-GP
A 39K2R2F-L-GP A
<Core Design>
2
2 1
2
EXT_MIC_JD# 50
1
DY C2206
SCD1U10V2KX-4GP
AUD_AGND
AUD_AGND Wistron Corporation
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Close to Pin13 Taipei Hsien 221, Taiwan, R.O.C.
Close to Pin14
Title
AUDIO CODEC 92HD81
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 22 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 23 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 24 of 59
5 4 3 2 1
5 4 3 2 1
SSID = LOM
+DVDD12 +DVDD12
1
C2522
+DVDD12
SCD1U10V2KX-4GP
2
C2503 1 2 SCD1U10V2KX-4GP
D LAN_TX/RX# LAN_TX/RX# 42 D
C2504 1 2 SCD1U10V2KX-4GP
+3.3V_LAN
LANX2
LANX1
1 2 RSET C2506 1 2 SCD1U10V2KX-4GP
R2507 2K49R2F-GP
C2509 1 2 SCD1U10V2KX-4GP
CTRL12A
Place close to
1
C2511
SCD1U10V2KX-4GP PIN 10, 13, 30, 36
48
47
46
45
44
43
42
41
40
39
38
37
U2501
2
VCTRL12A
NC#44
NC#43
CKXTAL2
CKXTAL1
NC#40
NC#39
LED0
VDD33
GND
RSET
VCTRL12D
Lay out close to Pin48.
R2508
+3.3V_LAN 1 36 +DVDD12 0R2J-2-GP +3.3V_LAN
MDI0+ AVDD33 DVDD12 LED1/EESK LAN_LINK100#
42 MDI0+ 2 MDIP0 LED1/EESK 35 1 2 LAN_LINK100# 42
42 MDI0- MDI0- 3 34 LED2/EEDI 1 2 LAN_LINK10# LAN_LINK10# 42 C2507 1 2 SCD1U10V2KX-4GP
MDIN0 LED2/EEDI/AUX LED3/EEDO
4 NC#4 LED3/EEDO 33
42 MDI1+ MDI1+ 5 32 EECS R2509 C2515 1 2 SCD1U10V2KX-4GP
MDI1- MDIP1 EECS 0R2J-2-GP
42 MDI1- 6 MDIN1 GND 31
7 30 +DVDD12 C2514 1 2 SCD1U10V2KX-4GP
GND DVDD12
Use single trace 8 NC#8 VDD33 29 +3.3V_LAN
feedback to PIN.4. 9 28 LAN_ISOLATE# 1 2 +3.3V_RUN
+DVDD12 NC#9 ISOLATE# R2505 1KR2J-1-GP
C
10 DVDD12 PERST# 27 C
11 NC#11 LANWAKE# 26 1 2
12 25 R2504 15KR2J-1-GP
REFCLK_M
REFCLK_P
NC#12 CLKREQ#
PLT_RST# 11,19,26,43,50
DVDD12
GNDTX
VDDTX
NC#23
NC#24
HSON
HSOP
HSIN
HSIP
GND
PCIE_WAKE# 20,50
LANX1 R2501
LAN_CLKREQ# LANX2
RTL8103EL-GR-GP
1
C2523 DY2SCD1U10V2KX-4GP 2
DY 1
13
14
15
16
17
18
19
20
21
22
23
24
10MR2J-L-GP
+DVDD12
X2501
LANX2 1 LANX1
X01 20081208 2 X01 20081218
1
XTAL-25MHZ-102-GP C2502
C2501 SC15P50V2JN-2-GP
SC18P50V2JN-1-GP
2
PCIE_IRXN3_RTXN3_LAN C2518 1 2 SCD1U10V2KX-4GP PCIE_IRXN3_RTXN3 19
PCIE_IRXP3_RTXP3_LAN C2520 1 2 SCD1U10V2KX-4GP PCIE_IRXP3_RTXP3 19
1 2
C2512 SC1U6D3V2KX-GP Lay out close to Pin19. 1 2
R2506 1KR2J-1-GP
B C2513
1 2
SC1U6D3V2KX-GP
X01 20081126 B
U2502
CLK_PCIE_LAN# 7
CLK_PCIE_LAN 7 EECS 1 8 +3.3V_LAN
LED1/EESK CS VCC
2 SK DY DC 7
1
PCIE_ITXN3_LRXN3 19 LED2/EEDI 3 6 C2521
LED3/EEDO DI ORG SCD1U10V2KX-4GP
PCIE_ITXP3_LRXP3 19 4 DO GND 5
DY
2
+3.3V_LAN
AT93C46DN-SH-B-GP
1
R2502 DY 2
0R3-0-U-GP 1 2 +3.3V_LAN
+3.3V_ALW
Q2501 R2510
3K6R2F-GP
S
Max current: 333mA
D
1
D
1
R2503
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
1
1
C2508
C2505
C2517
C2510
C2516
C2519 10KR2J-3-GP AO3403-GP
G
SCD1U10V2KX-4GP 2.2A
2
Rds= 260m ohm
2
2
<Core Design>
C2524
SCD1U10V2KX-4GP
1
A A
Wistron Corporation
D
Q2502 DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
2N7002-7F-GP Taipei Hsien 221, Taiwan, R.O.C.
G
26 PM_LAN_ENABLE Title
LAN Realtek-RTL8103EL
S
Size Document Number Rev
www.vinafix.vn
Custom SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 25 of 59
5 4 3 2 1
5 4 3 2 +3.3V_RUN 1
+3.3V_RTC_LDO
Put 0.1uf close to VCC-GND pin pair. +3.3V_RUN
DISCRETE_ID
SSID = KBC
2
L2601 1 2 BLM18AG601SN-3GP VBAT 1 2
R2640 R2630 DY 0R2J-2-GP
2
2K2R2J-2-GP
C2602 C2603 U2602
SCD1U10V2KX-4GP DY
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
1
4 3 KBC_SDA1
28 THERM_SDA
1
1
C2617
C2616
C2611
C2609
C2612
C2613
C2614
C2615
5 2
DY
2
115
102
KBC_SCL1
For GDDR2 VRAM 6 1
88
76
46
19
80
THERM_SCL 28
4
U2601A 1 OF 2
D BAT_IN# 31
D
VCC
VCC
VCC
VCC
VCC
AVCC
VDD
GPIO41
2N7002SPT
ALBA X00
ALBA X00 R2631 1
104 124 ADAPT_TRIP_SEL
X02 20090226 DY 2
VREF GPIO10/LPCPD# ADAPT_TRIP_SEL 32
7 PLT_RST1#_1 0R2J-2-GP
LRESET# +1.05V_VCCP +3.3V_RUN
1 CAPA_INT#
32 AD_IA_KBC 97
98
GPI90/AD0 A/D LCLK 2
3
PCLK_KBC 7
GPI91/AD1 LFRAME# LPC_LFRAME# 18
TP2602 THERMTRIP_VGA# 99 126 LPC_LAD0
GPI92/AD2 LAD0
1
32 ADAPT_OC 100 127 LPC_LAD1 LPC_LAD[0..3] 18
DISCRETE_ID GPI93/AD3 LAD1 LPC_LAD2 R2616 E51_RxD
108 128 1 2
+3.3V_RTC_LDO 10KR2J-3-GP KBC_THERMTRIP# GPIO05 LAD2 LPC_LAD3 2K2R2J-2-GP R2605 DY 10KR2J-3-GP
1 2
96 GPIO04 LPC LAD3 1
125
SERIRQ INT_SERIRQ 20
R2610 C2604
ALBA X00 8 PM_CLKRUN# 20
2
+3.3V_RTC_LDO GPIO11/CLKRUN#
KBRST# 122 KBRCIN# 18 2 1
PCB_VER0 101 121 +3.3V_RTC_LDO
KA20GATE 18
B
54 THERMTRIP_VGA# PCB_VER1 GPI94 GA20 ECSCI#_KBC SCD1U16V2KX-3GP RN2602
105 GPI95 ECSCI#/GPIO54 29
PCB_VER2 KBC_SCL1
106 GPI96 D/A GPIO65/SMI# 9 PANEL_BKEN 54 4 1
1
47 CAMERA_DET# 107 123 ECSWI#_KBC E C KBC_THERMTRIP# KBC_SDA1 3 2
GPI97 GPIO67/PW UREQ# 8,11,18,30,54 H_THRMTRIP#
R2634 Pull High : Discrete
SCD1U16V2KX-3GP
2 1
2K2R2J-2-GP internal Pull Low for UMA R2613 10KR2J-3-GP Q2601 SRN4K7J-8-GP
EC2601
CH3904PT-GP RN2601
64 68 KBC_SDA1 BAT_SDA 4 1
20,28,30,36,37,38,39,50 PM_SLP_S3# DY
2
GPIO01/TB2 GPIO74/SDA2 KBC_SCL1 BAT_SCL
51 KBC_PWRBTN# 95 SMB 67 3 2
2
GPIO03 GPIO73/SCL2
32 AC_IN# 93 69 BAT_SDA 31,32 D2603
LID_CLOSE# GPIO06 GPIO22/SDA1 SRN4K7J-8-GP
51 LID_CLOSE# 94 GPIO07 GPIO17/SCL1 70 BAT_SCL 31,32 20 ECSWI# 1
20,34 VGATE_PWRGD 119 GPIO23
BIOS_ID 6 3 ECSWI#_KBC KBC_PWRBTN# 1 2
GPIO24 BAS16-1-GP R2633 100KR2J-1-GP
47 EC_SPI_WP#_R 109 GPIO30
R2636 2 0R2J-2-GP RUNPWROK_G31 1D8V_VRAM_ON
C 30,36,37,38,39 RUNPWROK 1 120
65
GPIO31 SP GPIO66/G_PW M 81 1D8V_VRAM_ON 30 2
C
47 PWRLED GPIO32/D_PW M
HP_MUTE LCD_CBL_DET#
X02 20090226 TP2604
1
3.3V_DELAY_EN_KBC
66
16
GPIO33/H_PW M D2601
X02 20090309 R2627
1 2
100KR2J-1-GP
30 3.3V_DELAY_EN_KBC GPIO40/F_PW M
AD_OFF 17 84 1 KB_DET# 1 2
31 AD_OFF
RSMRST#_KBC GPIO42/TCK GPIO77 KBC_GPIO76
BLUETOOTH_EN 45 20 ECSCI#
R2625 DY 100KR2J-1-GP
20 RSMRST#_KBC
PM_SLP_S4#
20 GPIO43/TMS SPI GPIO76/SHBM 83
ECSCI#_KBC CAMERA_DET#
20,38,50 PM_SLP_S4#
1 2 PLTRST_DELAY#_EC
21
22
GPIO44/TDI GPIO GPIO75 82
91 PWR_BTN_LED#
WIFI_RF_EN 43
BAS16-1-GP
3
R2623
1 2
100KR2J-1-GP
20,53 PLTRST_DELAY# GPIO45/E_PW M GPIO81 PWR_BTN_LED# 47
R2635 0R2J-2-GP 23 2 KBC_THERMTRIP# 1 2
33 3V_5V_POK R2614 1 PM_PWROK_R GPIO46/TRST# R2624 100KR2J-1-GP
11,20,28 PM_PWROK 2
0R2J-2-GP
24
25
GPIO47 ALBA X00
31 PSID_DISABLE# GPIO50/TDO
TP2603 1 HDD_5V_EN 26 111 E51_TxD E51_TxD 43 D2602 THERMTRIP_VGA_GATE 1 2
BLON_OUT GPIO51 GPO83/SOUT_CR/BADDR1 E51_RxD R2637 100KR2J-1-GP
41 BLON_OUT 27 GPIO52/RDY# GPIO87/SIN_CR 113 E51_RxD 43 20 ECSMI# 1
34 CPUCORE_ON R2615 1 2 CPUCORE_ON_R 28 112
0R2J-2-GP ECSMI#_KBC GPIO53 GPO84/BADDR0 BAS16-1-GP ECSMI#_KBC
73 GPIO70 3
39 GFX_CORE_EN 74 114 PM_LAN_ENABLE 25 S5_ENABLE 1 2
GPIO71 GPIO16 TSATN#_KBC R2626 10KR2J-3-GP
37 1.1V_RUN_EN 75 GPIO72 GPIO34 14 TSATN#_KBC 11 2
110 15 KCOL0 1 2
46,51 USB_PWR_EN# GPO82/TRIS# GPIO36 S5_ENABLE 30
R2622 DY 10KR2J-3-GP
SER/IR KBC_GPIO76 1 2
R2632 10KR2J-3-GP
KBC_VCORF
X02 20090226 VCORF 44
U2601B 2 OF 2
KCOL[0..16] 45
1
+3.3V_RUN
AGND
GND
GND
GND
GND
GND
GND
C2605 KBC_XI 77 53 KCOL0
SC1U10V3KX-3GP 32KX1/32KCLKIN KBSOUT0/JENK# KCOL1
52
MB VERSION
2
WPCE773LA0DG-GP KBSOUT1/TCK KCOL2
51
116
89
78
45
18
5
103
KBSOUT2/TMS KCOL3
KBSOUT3/TDI 50
1
ID
10KR2J-3-GP
10KR2J-3-GP
KBC_XO 79 49 KCOL4
AMP_MUTE# 32KX2 KBSOUT4/JEN0# KCOL5
22 AMP_MUTE# 30 48
B10KR2J-3-GP MB VERSION GPIO55/CLKOUT KBSOUT5/TDO
B
2
R2601
R2604
R2609 47 KCOL6
DY DY DY R2629 31 PS_ID_EC 63
KBSOUT6/RDY#
43 KCOL7
GPIO14/TB1 KBSOUT7 KCOL8
ID VER2 VER1 VER0 0R2J-2-GP 20 PM_PWRBTN# 117 KBC 42
2
LCD_TST_EN GPIO20/TA2 KBSOUT8 KCOL9
41 LCD_TST_EN 31 GPIO56/TA1 KBSOUT9 41
PCB_VER0 22 KBC_BEEP 32 40 KCOL10
SA 0 0 0
1
PCB_VER1 GPIO15/A_PW M KBSOUT10 KCOL11
47 BATLOW_LED 118 GPIO21/B_PW M KBSOUT11 39
PCB_VER2 KCOL12
SB 0 0 1 X01 20081215 41 BRIGHTNESS 62 GPIO13/C_PW M KBSOUT12/GPIO64 38
37 KCOL13
KBSOUT13/GPIO63
1
R2612 KCOL14
SC 0 1 0 X01 20081216 KBSOUT14/GPIO62 36
10KR2J-3-GP
10KR2J-3-GP
RUNPWROK 2 1 CPUCORE_ON 35 KCOL15
DY KBSOUT15/GPIO61/XOR_OUT
R2602
R2603
R2608 45 KB_DET# KB_DET# 13 34 KCOL16
10KR2J-3-GP -1 0 1 1 0R2J-2-GP R2639 41 LCD_CBL_DET# LCD_CBL_DET# 12
GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO60/KBSOUT16
GPIO57/KBSOUT17 33 KCOL17 1 TP2601
54 THERMTRIP_VGA_GATE 2 1 0R2J-2-GP THERMTRIP_VGA_GATE_K 11 KROW[0..7] 45
2
R2638 2 0R2J-2-GP LCD_TST_R GPIO27/PSDAT2
41 LCD_TST 1 10 GPIO26/PSCLK2
R2611 45 TPDATA 71 54 KROW0
PLT_RST1#_1 GPIO35/PSDAT1 KBSIN0 KROW1
2 1 PLT_RST# 11,19,25,43,50 45 TPCLK 72 GPIO37/PSCLK1 PS/2 KBSIN1 55
56 KROW2
0R2J-2-GP KBSIN2 KROW3
X01 20081215 KBSIN3 57
1
58 KROW4
C2601 EC_SPI_DI KBSIN4 KROW5
86 59
DY SC470P50V2KX-3GP
47 EC_SPI_DI
EC_SPI_DO 87
F_SDI KBSIN5
60 KROW6
KBC CLK 47 EC_SPI_DO
2
EC_SPI_CS# F_SDO KBSIN6 KROW7
ALBA X00 47 EC_SPI_CS#
EC_SPI_CLK R2619 1 2 0R2J-2-GP
90
EC_SPI_CLK_C 92 F_CS0# FIU KBSIN7 61
47 EC_SPI_CLK F_SCK
EMI PCLK_KBC
X02 20090224
2
C2607 85 ECRST#
KBC_XI VCC_POR#
2 1
R2628
DY 0R2J-2-GP SC15P50V3JN-GP
WPCE773LA0DG-GP
1
PCLK_KBC_RC
A E51_TxD X2601 ECRST# <Core Design> A
2
X-32D768KHZ-38GPU
2
+3.3V_RTC_LDO
R2607
R2620
20MR3-GP 10KR2J-3-GP Wistron Corporation
1
4K7R2J-2-GP R2618 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
E
2
1 2 C2606 Taipei Hsien 221, Taiwan, R.O.C.
1
4
2
28,30 PURE_HW_SHUTDOWN# 1 2 ECRST#_C B SC1U10V3KX-3GP
2
Title
DY C2610 C2608 R2621 R2617 Q2602
SC4D7P50V2CN-1GP
KBC Winbond WPC773L
www.vinafix.vn
1
2 1 X3_1 1 2 KBC_XO 0R2J-2-GP CH3906PT-GP C
Size Document Number Rev
SC15P50V3JN-GP 33KR3-GP Custom
Alba Discrete SB
X02 20090224 Date: Monday, March 23, 2009 Sheet 26 of 60
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 27 of 59
5 4 3 2 1
5 4 3 2 1
+5V_RUN +3.3V_RUN +5V_RUN
SSID = Thermal
1
R2802
1
R2801 1 2
C2810 C2812 10KR2J-3-GP DY R2817
SC4D7U6D3V5KX-3GP SCD1U16V2KX-3GP 0R2J-2-GP DY 10KR2J-3-GP
2
D2801
EMC2102_FAN_TACH A K EMC2102_FAN_TACH_1 EMC2102_FAN_TACH_1 44
D D
B0530WS-7-F-GP
EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE 44
+3.3V_RTC_LDO RN2801
R2815 3 2 +3.3V_RUN
2 1 4 1
DY
X01 20081215 49D9R2F-GP SRN4K7J-8-GP
THERM_SCL 26
THERM_SDA 26
+3.3V_RUN
R2814
2 1 EMC2102_VDD_3D3
29
28
27
26
25
24
23
22
U2801
49D9R2F-GP
GND
TACH
VDD_5Va
FANa
FANb
VDD_5Vb
SMCLK
SMDATA
2
+3.3V_RUN
C2803
SCD1U16V2KX-3GP
2
1 21 R2812
VDD_3V NC#21
1
C2804 8K2R2J-3-GP
SC470P50V3JN-2GP H_THERMDC 2 20
DN1 GND
2
1
H_THERMDA 3 19 ALERT# R2810 2 1 0R2J-2-GP
DP1 ALERT# DY THERM_SCI# 20
H_THERMDA, H_THERMDC routing together, VGA_THERMDC 4 EMC2102 18 CLK_32K
DN2 CLK_IN R2811
C Trace width / Spacing = 10 / 10 mil GND = Internal Oscillator Selected C
VGA_THERMDA 5 17 EMC2102_CLK_SEL 2 1
DP2 CLK_SEL 0R2J-2-GP +3.3V = External 32.768kHz Clock Selected
T8_THERMDC 6 16 EM2102_RESET#
DN3 RESET#
T8_THERMDA 7 DP3 NC#15 15 ALBA X00
THERMTRIP#
POWER_OK#
SYS_SHDN#
FAN_MODE
54 VGA_THERMDC
SHDN_SEL
TRIP_SET
1
C2802
NC#8
SC470P50V3JN-2GP
2
54 VGA_THERMDA GND = Channel 1
EMC2102-DZK-GP
OPEN = Channel 3
10
11
12
13
14
GPU Sensor ALBA X00
Layout notice : +3.3V = Disabled RN2802 SRN10KJ-5-GP
4 1 +3.3V_RUN
Both VGA_THERMDA and THERMDC routing R2803 3 2
10 mil trace width and 10 mil spacing. 2
DY 1 EMC2102_SHDN
+3.3V_RUN +3.3V_RTC_LDO
10KR2J-3-GP
ALBA X00
1
+3.3V_RUN +3.3V_RUN
C2801 must be near Q2801 R2804 R2818 R2816
2 1 EMC2102_FAN_mode 10KR2J-3-GP 10KR2J-3-GP
DY 0R2J-2-GP
E
2
2
1
Q2801 B
DY C2801 C2805
1
MMBT3904-3-GP SC470P50V3JN-2GP SC470P50V3JN-2GP R2805 Q2803 C2807 R2806
G
1
B C2805 must be 2 1 2N7002-7F-GP SCD1U16V2KX-3GP 10KR2F-2-GP B
C
near EMC2102 0R2J-2-GP
2
S D PURE_HW_SHUTDOWN# 26,30
2
3.HW T8 sensor TRIP_SET Pin Voltage
GND = Fan is OFF V_DEGREE=(((Degree-75)/21)
V_DEGREE
Layout notice : OPEN = Fan is at 60% full-scale T8 shutdown is set 88 deg-C.
Both DN3 and DP3 routing 10 mil +3.3V = Fan is at 75% full-scale
1
TP2802 1 EMC2102_FAN_TACH_1
1
trace width and 10 mil spacing. TP2801 1 EMC2102_FAN_DRIVE C2806 R2807
SCD1U16V2KX-3GP 2K37R2F-GP
2
32K suspend clock output ALBA X00
Lay out close to SKT2(CPU socket) +3.3V_ALW
R2813 U2802
20 ICH_SUSCLK D S CLK_32K_R 1 2 CLK_32K EM2102_RESET# 1 C2808
B
5 2
Q2802 10R2J-2-GP H_THERMDA 2
VCC DY 1
8 H_THERMDA 20,26,30,36,37,38,39,50 PM_SLP_S3# A DY
1
1
2N7002-7F-GP 4 SCD1U16V2KX-3GP PM_PWROK 11,20,26
G
C2809 R2833 Y
3
DY GND
1
SC4D7P50V2CN-1GP 10KR2J-3-GP
DY
2
C2833 74LVC1G08GW-1-GP
DY SC2200P50V2KX-2GP
2
2
A H_THERMDC A
8 H_THERMDC <Core Design>
RUN_POWER_ON 30
H_THERMDA, H_THERMDC routing together, Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Trace width / Spacing = 10 / 10 mil Taipei Hsien 221, Taiwan, R.O.C.
Title
Thermal/Fan Controllor EMC2102
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 28 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 29 of 59
5 4 3 2 1
5 4 3 2 1
SSID = Reset.Suspend
Max current: 115mA
Q3005
SI2301BDS-T1-GP
+3.3V_ALW S D +3.3V_DELAY
X02 20090304
1
D D
1.8A
G
R3011
Rds= 0.15 ohm
1
H_THRMTRIP# 8,11,18,26,54
100KR2J-1-GP C3005
SC22U6D3V5MX-2GP
SC1U6D3V2KX-GP
2
C3007
E
1
R3002
1 2 H_PWRGD_R B
8,18 H_PWRGOOD DY DY Q3001 3.3V_DELAY_EN# DY
2
1
1KR2J-1-GP CHT2222APT-GP
C
C3001
SCD1U10V2KX-4GP DY
1
2 Q3003
D3001 2N7002SPT R3015
BAS16-1-GP 3 PURE_HW_SHUTDOWN# 26,28 100R2F-L1-GP-U
R3013
33 3V_5V_EN 1 3.3V_DELAY_EN_KBC 2 1
2
26 3.3V_DELAY_EN_KBC
6
0R2J-2-GP
1
1 2 S5_ENABLE 26
R3001
R3003 1KR2J-1-GP
200KR2J-L1-GP
R3012 1 2 3.3V_DELAY_EN
DY 26,36,37,38,39 RUNPWROK DY
1
75KR2F-GP
DY
2
C3006 3.3V_DELAY_1
SCD1U16V2KX-3GP
2
C C
Optional RC network to fine tune PWR SEQ. X01 20090112
+3.3V_RTC_LDO
1
R3009
100KR2J-1-GP
Max current: 6243.3mA
X01 20081215 +5V_RUN +5V_ALW
PM_RUN_EN# 2
U3001
1 S D 8
2 S D 7
R3005 3 S D 6
RUN_POWER_ON 1 2 10KR2J-3-GP RUN_ON_5V 4 G D 5
+15V_ALW AO4468-GP
1
11.6A
C3002
Rds=14m ohm
3
SC6800P25V2KX-1GP
2
Q3002
2
B 2N7002SPT B
R3010
10KR2J-3-GP
4
Max current: 4865.6mA
+3.3V_RUN +3.3V_ALW
U3002
1 S D 8
2 S D 7
20,26,28,36,37,38,39,50 PM_SLP_S3# RUN_POWER_ON 28
R3004 3 S D 6
1 2 10KR2J-3-GP RUN_ON_3D3V 4 G D 5
+1.8V_RUN
AO4468-GP
1
11.6A
2
+3.3V_RTC_LDO C3003
R3016 SCD01U50V2KX-1GP Rds=14m ohm
2
+15V_ALW 10R3F-GP
2
R3014
2
100KR2J-1-GP +1.8V_RUN
D
R3008
1
1D8V_VRAM_ON# 10KR2J-3-GP Q3006
2N7002-7F-GP
1
G Max current: 5386mA
1
C3033
6
SC10U6D3V5KX-1GP +1.8V_SUS
S
A
2 U3003 <Core Design>
A
2N7002SPT 1 S D 8
Q3004 S D
X01 20090112 2
S D
7
RUN_ON_1D8V
3
4 G D
6
5 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
FDS8880-NL-GP Taipei Hsien 221, Taiwan, R.O.C.
1
10.7A Title
C3004
SCD01U50V2KX-1GP Rds=12m ohm
Power Plane Enable
2
www.vinafix.vn
1D8V_VRAM_ON Size Document Number Rev
26 1D8V_VRAM_ON Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 30 of 59
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Support +5V_ALW
1
PR3107 ALBA X00
1
15KR2J-1-GP
PR3105 DY
E
10KR2J-3-GP PD3102
1
B CH3904PT-GP BAV99-4-GP +3.3V_ALW +3.3V_ALW
3
PQ3103
2
2
PR3108
1
D PR3106 PSID_DISABLE#_R D
1 2
100KR2J-1-GP DY PSID_DISABLE# 26
PR3102
0R2J-2-GP 2K2R2J-2-GP
G
1
PQ3102 PD3101
2
FDV301N-NL-GP BAV99-4-GP
3
PR3103
D S PS_ID 1 2
D
PS_ID_EC 26
33R2J-2-GP
DCin CONN PR3104
1
DY 2 This cap should be used
only as last resort for
33R2J-2-GP
EMI suppression.
1 AFTP3101 +DC_IN +DC_IN_SS
DCIN1 PU3101
9 8 1 S D 8
S D
SC1U25V5KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
3 2 7
1
S D
240KR3-GP
NP2 4 3 6
1
PC3104
PC3105
PC3107
PC3108
PC3106
PS_ID_R PR31011 2 0R3-0-U-GP PS_ID_R2 PC3103 G D
PR3111
5 1 4 5
NP1
DY SCD1U50V3KX-GP
2
2 AFTP3102 1 FDS6675BZ-GP
K
2
7 6
2
PD3107 Id=-9.6A
1
DC-JACK133-GP-U 1SMB22AT3G-GP-U
C
AFTP3109 1 22.10088.F11 PD3103 PQ3104 Qg=-25nC C
R2
DY B240A-13-GP PQ3101 E Rdson=18~30mohm
A
3 OUT B
1 R1 DY
R1
C
26 AD_OFF DY
2
IN 2 GND
2
R2 PDTA124EU-1-GP
PR3110
DDTC124EUA-7F-GP 47KR3J-L-GP
X02 20090302
1
X02 20090219
AFTP3103 1 PBAT_PRES1#
Batt Connecter AFTP3104
AFTP3106
1
1
PBAT_SMBDAT1
PBAT_SMBCLK1
AFTP3105 1 +PBATT
GND2 BAT
B 11 B
GND1 9 1 PR3109
AFTP3107
BAT_ALERT 8 2 1 +3.3V_RTC_LDO
7 PBAT_ALARM# 1
SYS_PRES# AFTP3108
470KR2J-2-GP
6
BATT_PRS# 5 PBAT_PRES1# PR3112 1 2 100R2J-2-GP BAT_IN# 26
DAT_SMB 4 PBAT_SMBDAT1 4 1
PBAT_SMBCLK1 PRN3101 BAT_SDA 26,32
3 3 2 SRN100J-3-GP
CLK_SMB 2
BAT_SCL 26,32
BATT2+
BATT1+ 1 +PBATT
10 PG3108
1
2 1 BATT_SENSE 32
SYN-CON9-10-GP PC3102 PC3101
20.81143.009 SCD1U50V3KX-GP SC2200P50V2KX-2GP GAP-CLOSE-PWR-3-GP
2
2
BAT_IN#
BAT_SDA
BAT_SCL
A A
<Core Design>
3
PD3104
BAV99-4-GP
PD3106
BAV99-4-GP
PD3105
BAV99-4-GP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
1
Title
DC IN/BATT CONN/USB CONN
www.vinafix.vn
Size Document Number Rev
Custom
+3.3V_RTC_LDO Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 31 of 59
5 4 3 2 1
5 4 3 2 1
+PBATT
SSID = Charger
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
+3.3V_RTC_LDO
EC3201
EC3202
EC3203
EC3204
Id=-9.6A
1
Qg=-25nC
Adaptor In Soft-Start Circuit
1
Rdson=18~30mohm Id=-9.6A
2
PR3211
100KR2J-1-GP Qg=-25nC
Layout Trace 250mil
Rdson=18~30mohm
+DC_IN_SS Layout Trace 300mil
2
D PU3206 D
26 AC_IN# +SDC_IN +PWR_SRC Layout Trace 300mil +PBATT
SC1U10V3KX-3GP
8 D S 1
PC3207
7 D S 2 PR3212 PU3202
1
6 D S 3 1 2 1 S D 8
D
5 D G 4 2 S D 7
D01R2512F-4-GP 3 S D 6
2
2
PQ3203 FDS6675BZ-GP +DC_IN_SS 4 G D 5
G ACAV_IN PR3213
10KR2J-3-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
FDS6675BZ-GP
2N7002-7F-GP
S
1
1
PG3201
PG3202
DC_IN_D PR3216
PR3214 PR3215 470KR2J-2-GP
DCIN_GATE1 1 2 DCIN_GATE2 1 2
2
PQ3204 49K9R2F-L-GP 100KR2J-1-GP
2N7002-7F-GP
D
G
PQ3202
2N7002-7F-GP
X02 20090302
X02 20090302
S
1
ACAV_IN G
1
PC3208
SCD1U50V3KX-GP PC3209
MAX8731_CSSN
MAX8731_CSSP
+DC_IN_SS SCD1U50V3KX-GP
2
PR3217
1 2
CHG_AGNDCHG_AGND CHG_AGND
1
0R2J-2-GP
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
1
C
PR3218 PC3210 PU3203 PC3211 C
PC3213
365KR3F-GP SC1U25V5KX-1GP SC1U10V3KX-3GP
ASNS
2
1
PC3233
PC3212
PC3217
MAX8731_DCIN 22 28 PR3219
DY
2
DCIN CSSP
5
6
7
8
33R2J-2-GP
MAX8731_ACIN 2 PU3204
D
D
D
D
2
ACIN CHG_AGND SI4800BDY-T1
SCD01U50V2KX-1GP
27
2
CSSN
1
+3.3V_RTC_LDO 11 26 MAX8731_VCC
VDD VCC
1
PC3214
PR3222
1
PR3220 0R3-0-U-GP PD3201 PC3216
49K9R2F-L-GP PC3215 25 MAX8731_BST 1 2MAX8731_BST1 K A 1 2
2
G
S
S
S
SCD1U25V3KX-GP BST MAX8731_LDO
21
2
4
3
2
1
ACAV_IN LDO BAS516-1-GP SC1U10V3KX-3GP
13 ACOK
CHG_AGND 24 MAX8731_DHI PC3218
CHG_AGND BAT_SCL_1 DHI PR3223 CHG_PWR +PBATT
10 SCL PL32011
1 2 1R3F-GP 1 2 SCD1U25V3KX-GP PR3224 Layout Trace 300mil
26,31 BAT_SCL
PG3206 23 MAX8731_LX 1 2 MAX8731_LX1 1 2 1 2
GAP-CLOSE-PWR LX
1 2
BAT_SDA_1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2 9 PC3219 SC220P50V2KX-3GP IND-5D6UH-39-GP D01R2512F-4-GP
26,31 BAT_SDA SDA
1SMA18AT3G-GP
PG3207 20 MAX8731_DLO
K
DLO
5
6
7
8
GAP-CLOSE-PWR
1
PC3232
PC3231
PC3230
PC3220
PC3221
PC3222
PD3202
DY
D
D
D
D
14 19 PU3205
DY
GAP-CLOSE-PWR-3-GP
BATSEL PGND
2
2
2
18 MAX8731_CSIP SI4800BDY-T1
GAP-CLOSE-PWR-3-GP
A
CSIP
PG3203
CHG_AGND
PR3283 17 MAX8731_CSIN
G
S
S
S
CSIN
PG3204
2 1 AD_IA 8
4
3
2
1
1
26 AD_IA_KBC 0R2J-2-GP INP
B B
PR3227
1 2 10KR2F-2-GP MAX8731_CCV 6 MAX8731_LDO
CCV
1MAX8731_CCV1
MAX8731_CCI 5 16
MAX8731_CCS CCI FBSB
4 CCS
1
MAX8731_REF 3
MAX8731_DAC 7 REF PR3226 PR3209
DAC BAT_SENSE BATT_SENSE 10KR2F-2-GP
12 15 1 2
GND
GND FBSA BATT_SENSE 31 +3.3V_RTC_LDO
PR3225
PC3229
PC3223
PC3224
PC3225
PC3226
PC3227
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1
100R2F-L1-GP-U
2
1
MAX8731AETI-GP ACAV_IN
10KR2F-2-GP
29
PC3228
X01 20081215
1
SCD01U50V2KX-1GP
2
PR3210
2
1
MAX8731_REF1 1 2 ADAPT_OC1 15K4R2F-GP
1 2 PR3201DY 1MR2F-GP
PG3205 +5V_ALW PR3203
DY
2
GAP-CLOSE-PWR 100KR2J-1-GP
TABLE1 CHG_AGND
2
ADAPTOR (W) TRIP CURRENT (A) PR3202 PR3205 PR3207 PR3208
1
1
DYPC3206 PC3205
SC100P50V2JN-3GP DYSCD01U50V2KX-1GP
ADAPT_OC
ADAPT_OC 26
1
65 3.17 57.6K 13.0K 105 N/A PQ3201 1 2
D
2
PR3204 2N7002-7F-GP PG3208
90 4.43 51.1K 17.8K 348 33.2K 100KR2J-1-GP DY GAP-CLOSE-PWR
1
PR3221
DY
2
130 6.43 32.4K 20.5K 100 27.4K AD_IA 1 2 MAX8731_IINP1 G PR3206 1 2
DY
0R2J-2-GP PG3209
150 7.43 30.9K 24.9K 432 88.7K MAX8731_REF +5V_ALW 10KR2J-3-GP GAP-CLOSE-PWR
SCD01U50V2KX-1GP
1 2
DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
S
1
PC3201
PR3202
9.75 DY
2
200 19.1K 28K 301 36.5K 5
6
7
8
A A
PC3203
PC3204
51K1R3F-GP CHG_AGND
SC100P50V2JN-3GP
<Core Design>
1
1
PC3202
PU3201
DY
2IN+
2IN-
2OUT
VCC
11.28
2
230 32.4K 6.49K 115 N/A PR3205
DY DY DYPR3208 LM393DR-GP CHG_AGND
Note 1: PR6326 is populated if ADAPT_TRIP_SET is 17K8R3F-1-GP
DY 33K2R3F-GP
Wistron Corporation
2
used to program for the next lower adaptor CHG_AGND
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
ADAPT_TRIP_SET is floating for the higher MAX8731_REF2 Taipei Hsien 221, Taiwan, R.O.C.
adaptor, grounded for the lower adaptor CHG_AGND CHG_AGND CHG_AGND DY
1
ADAPT_TRIP_SEL Title
1OUT
GND
1IN+
ADAPT_TRIP_SEL 26
1IN-
24.9K at PR6326 allows the 65W adaptor setting PR3207
Note 2: 348R3F-GP CHG_AGND CHARGER MAX8731
to switch down to 45W. (now is 33.2K for 90W) DY ADAPT_TRIP_SEL=1 Adapter is 90w
www.vinafix.vn
Size Document Number Rev
4
3
2
1
Custom
Note 3: PR6302 must be 5m ohm instead of 10m ohm ADAPT_TRIP_SEL=0 Adapter is 65w Alba Discrete SB
2
for the 230W adaptor CHG_AGND
Date: Monday, March 23, 2009 Sheet 32 of 59
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +3D3V_PWR 3D3V_AUX_S5
PG3301 +PWR_SRC +PWR_SRC_5V/3V 51125_VCLK
2 1
1
PG3302
GAP-CLOSE-PWR 1 2 PR3321
PG3303 100KR2J-1-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
2 1 GAP-CLOSE-PWR
2
PG3304
PC3327
PC3324
GAP-CLOSE-PWR 1 2 51125_ENTRIP PD3308
PG3308 BAT54-7-F-GP
2
2 1 GAP-CLOSE-PWR
PG3309 DY
G
GAP-CLOSE-PWR 1 2 PQ3304 2N7002-7F-GP
3
PG3305
3
2 1 GAP-CLOSE-PWR 51125_ENTIP1 D S
D PG3306 PD3305 PD3306 D
1
GAP-CLOSE-PWR 1 2 2N7002-7F-GP BAT54S-7F-GP BAT54S-7F-GP
D
PG3312 PC3321 DY
2 1 GAP-CLOSE-PWR PQ3305 SC18P50V2JN-1-GP R3311
2
PG3313 147KR2F-GP
1
GAP-CLOSE-PWR 1 2 G +15V_ALW +5V_ALW2
30 3V_5V_EN
2
PG3315 PG3323
G
2 1 GAP-CLOSE-PWR 2N7002-7F-GP GAP-CLOSE-PWR-3-GP
S
PQ3303
GAP-CLOSE-PWR 51125_ENTIP2 D S 1 2
X01 20090105
K
1
1
R3312 PC3326
PC3322 DY 86K6R2F-GP PD3303 SC1U25V5KX-1GP PC3325 PC3328
SC18P50V2JN-1-GP BZT52C15S-GP DY SCD1U25V3KX-GP SCD1U25V3KX-GP
2
2
A
X01 20090105 X02 20090310
X01 20081215
+PWR_SRC
+PWR_SRC_5V/3V
PC3305 PC3306 +PWR_SRC_5V/3V
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
1
1
PC3303 PC3304 DY
1
1
SCD01U50V2KX-1GP
SC10U25V6KX-1GP
DY
2
C PC3308 PC3309 PC3310 C
D D
2
8
7
6
5
5
6
7
8
1
D
D
D
D
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
D
D
D
D
PU3301 PU3303 DY
16
FDS8884-GP FDS8884-GP
2
Design Current = 3.98A PU3302
Design Current = 7.72A
VIN
PeakCurrent = 5.68A
6.2<OCP<7.38A Peak Current = 10.25A
G
S
S
S
SCD1U25V3KX-GP
S
S
S
G
PC3311 PC3307
G S 11.23A<OCP< 13.33A
1
2
3
4
4
3
2
1
51125_VBST2 51125_VBST1
S G 2 1 1 2
0R3-0-U-GP PR3304
9 VBST2 VBST1 22 1 2
0R3-0-U-GP PR3303
1 2
+3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 +5V_PWR +5V_PWR +5V_ALW
PL3301 DRVH2 DRVH1 PL3302
PG3307
1 2 51125_LL2 11 20 51125_LL1 1 2 1 2
IND-3D3UH-90-GP LL2 LL1 IND-2D2UH-111-GP
DY
1
GAP-CLOSE-PWR-3-GP
51125_DRVL2 51125_DRVL1 GAP-CLOSE-PWR
D 12
DRVL2 DRVL1
19
1
1
PC3312 PTC3301
D PG3310
GAP-CLOSE-PWR-3-GP
8
7
6
5
5
6
7
8
ST220U6D3VDM-15GP
SCD1U10V2KX-4GP
PR3320
DY 1 2
D
D
D
D
SCD1U10V2KX-4GP
D
D
D
D
PC3313
2D2R5F-2-GP PU3304 51125_VO2 7 24 51125_VO1 PU3305 PR3319
2
VO2 VO1
1
1
PG3320 FDS6690AS-GP 2D2R5F-2-GP PG3321 PTC3302 GAP-CLOSE-PWR
2
ST220U6D3VDM-15GP
51125_FB2 5 2 51125_FB1 PG3311
DY
2
VFB2 VFB1
FDS6690AS-GP
X01 20081215 1 2
2
1
2
2
1
G
S
S
S
PC3320 1 2 51125_EN 13 23 3V_5V_POK GAP-CLOSE-PWR
DY820KR2F-GP
S
S
S
G
SC330P50V3KX-GP PR3306 EN0 PGOOD PC3319
DY S G S PG3314
2
1
2
3
4
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1 SC560P50V-GP
G 1 1 2
2
51125_VREF ENTRIP2 ENTRIP1
3 15 GAP-CLOSE-PWR
VREF GND
SCD22U10V2KX-1GP
PC3314
X01 20090105 PG3316
1
51125_TONSEL 4 25 1 2
TONSEL GND
1
PR3309 GAP-CLOSE-PWR
2
1
14 18 51125_VCLK 0R2J-2-GP PG3317
SKIPSEL VCLK
1
PR3308 51125_SKIPSEL DY 1 2
B PR3307 0R2J-2-GP PR3310 B
DY
VREG3
VREG5
1
6K65R2F-GP 33KR2F-GP GAP-CLOSE-PWR
1 2
TPS51125RGER-GP PC3301 51125_FB1_R PG3318
2
1 2
51125_FB2_R 74.51125.073 SC1KP50V2KX-1GP 1 2
2
PC3315 PC3316 DY
3D3V_AUX_S5_5_51125 8
17
+3.3V_RTC_LDO
DYSC18P50V2JN-1-GP +5V_ALW2 SC18P50V2JN-1-GP GAP-CLOSE-PWR
2
3D3V_AUX_S5 PG3319
PG3322
2
1 2
1
1 2
1
PR3312 PR3313 PR3314 GAP-CLOSE-PWR
PR3311 GAP-CLOSE-PWR-3-GP 21K5R2F-GP
10KR2F-2-GP
51125_VREF 2 1
DY0R2J-2-GP X01 20090113 100KR2J-1-GP
PR3315 Close to VFB Pin (pin2)
2
3D3V_AUX_S5 2 1 3V_5V_POK 26
2
0R2J-2-GP
2 PR3316
1
X01 20090105
51125_VREF
1
SC10U10V5KX-2GP
0R2J-2-GP PC3317 PC3318
Close to VFB Pin (pin5) 3D3V_AUX_S5 +3.3V_RTC_LDO I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
SC10U10V5KX-2GP
2 PR3317
1
3D3V_AUX_S5 DY Inductor: 2.2UH FDVE0630-2R2M=P3 TOKO 21mohm Isat =8.7Arms 68.2R21B.10A
2
0R2J-2-GP PR3301
1 2 O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
2 PR3318
1 H/S: FDSS8884 SO-8/ 23mohm/[email protected]/ 84.08884.037
DY 0R2J-2-GP 0R2J-2-GP
L/S: FDS6690AS SO-8/ 12mohm/[email protected]/ 84.06690.E37
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH FDV0630-3R3M=P3 TOKO 31mohm Isat =6.9Arms 68.3R31A.10E
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00LTONSEL CH1 CH2 SKIPSEL VREG3 or VREG5 VREF(2V) GND
H/S: FDSS8884 SO-8/ 23mohm/[email protected]/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/[email protected]/ 84.06690.E37 GND 200kHz 265kHz Operating OOA Auto Skip Auto Skip
A Mode PWM only A
VREF 245kHz 305kHz
VREG3 300kHz 375kHz Eiger
VREG5 365kHz 460kHz EN0 Open 820kΩ to GND GND
Operating Wistron Corporation
enable both 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Mode enable both LDOs, disable all Taipei Hsien 221, Taiwan, R.O.C.
LDOs, VCLK on VCLK off and circuit
and ready to ready to turn on Title
turn on
switcher
switcher channels DCDC 5V/3D3V (TPS51125)
Size Document Number Rev
channels
www.vinafix.vn
Custom SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 33 of 59
5 4 3 2 1
5 4 3 2 1
SSID = CPU.Regulator 11,20 DPRSLPVR
8,11,18 H_DPRSTP#
PR3404 1 2 10KR2J-3-GP
CPUCORE_ON 26
+3.3V_RUN PR34021 DY 2 10KR2J-3-GP CPU_VID[6..0] 9
CLK_EN#
CPU_VID6
CPU_VID5
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
PTP3401
+3.3V_RUN
D D
499R2F-2-GP
1
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
0R2J-2-GP
PR3405
10R3F-GP
2
1
PR3406
PR3411
PR3407
RP3401
PR3412
PR3413
PR3414
PR3408
PR3409
PR3410
PR3415
1
1
PC3401
SCD1U10V2KX-4GP
6266A_DPRSLPVR
6266A_DPRSTP#
6266A_CLK_EN#
6266A_VRON
6266A_3V3
6266A_D6
6266A_D5
6266A_D4
6266A_D3
6266A_D2
6266A_D1
6266A_D0
+3.3V_RUN
49
48
47
46
45
44
43
42
41
40
39
38
37
PR3416
+1.05V_VCCP 1K91R2F-1-GP
GND
3V3
CLK_EN#
DPRSTP#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PC3403
2
PR3420 SCD22U25V3KX-GP
1 36 6266A_BOOT1 1 2 6266A_BOOT1_R 2 1 6266A_PHASE1
20,26 VGATE_PWRGD PGOOD BOOT1 6266A_PHASE1 35
1
C
1R3F-GP C
PR3419 1 2 6266A_PSI# 2 35 6266A_UGATE1
68R2F-GP DY 8 PSI#
PR3417 0R2J-2-GP PSI# UGATE1 6266A_UGATE1 35
1 2 6266A_PMON 3 PMON PHASE1 34 6266A_PHASE1
PC3402 PR3421 4K99R2F-L-GP
2
1 2 1 2 6266A_RBIAS 4 RBIAS PGND1 33
PR3422 147KR2F-GP
SCD1U16V2KX-3GP 5 32 6266A_ LGATE1
8 CPU_PROCHOT# PR3424 VR_TT# LGATE1 PC3404 6266A_ LGATE1 35
+5V_RUN
PR3423 1 2 4K02R2F-GP 1 DY 2 6266A_NTC 6 31 1 2
DY NTC-470K-8-GP PC3406 NTC PU3401 PVCC
PC34051 2 SCD01U50V2KX-1GP 1 26266A_SOFT 7 30 SC2D2U10V3KX-1GP 6266A_LGATE2
DY SCD015U50V3KX-GP SOFT ISL6266AHRZ-GP LGATE2 6266A_LGATE2 35
Place close to 6266A_VO 1 2 6266A_OCSET 8 74.06266.073 29
PR3418 13K7R2F-GP OCSET PGND2
1st phase choke PC3407 1 2 SC1KP50V2KX-1GP 6266A_VW 9 28 6266A_PHASE2
VW PHASE2
6266A_COMP 10 6266A_UGATE2
X01 20090105 COMP UGATE2 27
PR3426 PC3408 6266A_UGATE2 35
PR3425 6266A_FB 11 26 6266A_BOOT2 1 2 6266A_BOOT2_R 1 2 6266A_PHASE2
FB BOOT2 6266A_PHASE2 35
1 2
6266A_FB2 12 25 1R3F-GP SCD22U25V3KX-GP
PC3409 8K25R2F-1-GP FB2 NC#25
DROOP
1 2
VDIFF
VSUM
ISEN2
ISEN1
VSEN
GND
VDD
RTN
DFB
VIN
SC100P50V2JN-3GP
VO
PR3427 PC3410
1 2 1 2
13
14
15
16266A_DROOP 16
17
18
19
20
21
22
23
24
1
97K6R2F-GP SC270P50V2KX-1GP PR3428
1KR2F-3-GP 6266A_ISEN1
1 1KR2F-3-GP
6266A_VDIFF
3K48R2F-GP
6266A_VSUM
6266A_ISEN2
B B
6266A_VSEN
6266A_VDD
6266A_ISEN1 35
6266A_RTN
6266A_DFB
6266A_VIN
6266A_VO
2
PR3429 PC3411 PC3412
2
1 2 1 2 SCD22U10V2KX-1GP
1
100R2F-L1-GP-U SC2200P50V2KX-2GP 6266A_VO
6266A_VO 35
2
PR3431
PR3430 PR3440 +PWR_SRC PC3413 6266A_VSUM
35 6266A_VSUM
1 2 1 2 SCD22U10V2KX-1GP
1
0R2J-2-GP
10R3F-GP
1 SCD01U50V2KX-1GP
6266A_ISEN2 35
2
1KR2F-3-GP PR3435
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
1
PR3432
6266A_SOFT 2K61R2F-1-GP
11KR2F-L-GP
SCD047U10V2KX-2GP
1 2
DY
PR3434
PR3403 1KR2J-1-GP
1
1
PC3414
PC3417
PC3415
1 2
PC3416 +5V_RUN
2
2
PR3433
SC330P50V2KX-3GP PR3436
2
2
1 2 PR3437
SC180P50V2JN-1GP
NTC-10K-26-GP
10R3F-GP
1
PR3438
2
1 2 PC3421 6266A_VO
9 VCC_SENSE
SC1U10V3KX-3GP
2
2
1
PC3420
0R2J-2-GP Place close to 1st Choke
PC3419
PC3418
PR3439 SC330P50V2KX-3GP
2
9 VSS_SENSE 1 2
GAP-CLOSE-PWR-3-GP
0R2J-2-GP
PG3401
1
A PC3422 A
1 2 <Core Design>
SCD01U50V2KX-1GP
2
Wistron Corporation
6266AGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU VCORE POWER(1/2)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 34 of 59
5 4 3 2 1
5 4 3 2 1
+PWR_SRC
SSID = CPU.Regulator
1
+PWR_SRC_CPU1 TC3502 TC3501
DY SE100U25VM-10GP DY SE100U25VM-10GP
2
+PWR_SRC +PWR_SRC_CPU1
PC3507
1 2 CPU noise
PC3501
PC3505
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
D GAP-CLOSE-PWR D
5
6
7
8
5
6
7
8
1
PC3502
PC3503
PC3504
PG3511 PU3502
D
D
D
D
D
D
D
D
SI7686DP-T1-GP
1 2 PU3501
SI7686DP-T1-GP
2
GAP-CLOSE-PWR
PG3505
1 2 Thermal Design Current = 34A(IMVP6+ Rev:1.35 )
G
S
S
S
G
S
S
S
GAP-CLOSE-PWR PeakCurrent = 47A
4
3
2
1
4
3
2
1
PG3506 56.4<OCP<66A
1 2
GAP-CLOSE-PWR +VCC_CORE
PG3508 6266A_UGATE1
34 6266A_UGATE1
1 2
PL3501
GAP-CLOSE-PWR
6266A_PHASE1 1 2
34 6266A_PHASE1
L-D36UH-1-GP
GAP-CLOSE-PWR-3-GP
1
1
2D2R5F-2-GP
PR3513 PTC3503 PTC3504 PTC3505
GAP-CLOSE-PWR-3-GP
8
7
6
5
8
7
6
5
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
DY
1
D
D
D
D
D
D
D
D
PU3504 PU3503
DY
2
1
PG3510
SI7636DP
SI7636DP
PG3509
2
2
2
1
SC330P50V3KX-GP
G
S
S
S
G
S
S
S
4
3
2
1
4
3
2
1
PC3514
C DY C
2
6266A_ LGATE1
34 6266A_ LGATE1
6266A_VSUM PR3563 1 2 3K65R2F-1-GP
34 6266A_VSUM
6266A_ISEN1 PR3501 1 2 10KR2F-2-GP
34 6266A_ISEN1
6266A_VO PR3502 1 2 1R2F-GP
34 6266A_VO
+PWR_SRC +PWR_SRC_CPU2 6266A_ISEN2 PR3503 1 2 10KR2F-2-GP
34 6266A_ISEN2
PG3503 +PWR_SRC_CPU2
1 2
GAP-CLOSE-PWR
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC3508
PC3509
PC3510
PC3513
PG3502
1
PC3511
PC3512
1 2
5
6
7
8
5
6
7
8
PU3506
D
D
D
D
D
D
D
D
SI7686DP-T1-GP
GAP-CLOSE-PWR PU3505
2
SI7686DP-T1-GP
PG3501
1 2
GAP-CLOSE-PWR
G
S
S
S
G
S
S
S
B PG3514 B
1 2
4
3
2
1
4
3
2
1
GAP-CLOSE-PWR
PG3504
1 2 +VCC_CORE
6266A_UGATE2
34 6266A_UGATE2
GAP-CLOSE-PWR
PL3502
6266A_PHASE2 1 2
34 6266A_PHASE2
L-D36UH-1-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
PTC3506
PTC3507
8
7
6
5
8
7
6
5
1
PU3508
1
D
D
D
D
D
D
2D2R5F-2-GP
D
PU3507 PR3514
2
SI7636DP
SI7636DP
DY
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
2
G
S
S
S
G
S
S
S
1
4
3
2
1
4
3
2
1
1
SC330P50V3KX-GP
PG3512
PG3513
PC3515
DY
2
2
6266A_LGATE2
34 6266A_LGATE2
6266A_VSUM PR3504 1 2 3K65R2F-1-GP
A 6266A_ISEN2 PR3505 1 A
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L 2 10KR2F-2-GP <Core Design>
Inductor: 0.36UH ETQP4LR36WFC PANASONIC 1.1mohm
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01 6266A_VO PR3506 1 2 1R2F-GP
Wistron Corporation
H/S: SI7686DP/ POWERPAK-8/ 14mOhm/ 4.5Vgs/ 84.07686.037 6266A_ISEN1 PR3507 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2 10KR2F-2-GP
L/S: SI7636ADP/ POWERPAK-8/ 4.8mOhm/ 4.5Vgs/ 84.07636.037 Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU VCORE POWER(2/2)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 35 of 59
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p05v
+1.05V_RUNP +1.05V_VCCP
PG3601
2 1
GAP-CLOSE-PWR
PG3602
2 1
D GAP-CLOSE-PWR D
PG3603
2 1
GAP-CLOSE-PWR
PG3604
2 1
GAP-CLOSE-PWR
PG3605
2 1
GAP-CLOSE-PWR
PG3606
2 1
GAP-CLOSE-PWR
+PWR_SRC +PWR_SRC_1.05V PG3608
2 1
PG3607
1 2 GAP-CLOSE-PWR
PG3610
GAP-CLOSE-PWR 2 1
PG3609
1 2 GAP-CLOSE-PWR
PG3612
GAP-CLOSE-PWR +PWR_SRC_1.05V 1 2
PG3611 +5V_ALW
1 2 GAP-CLOSE-PWR
SC2200P50V2KX-2GP
PG3614
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
C C
PC3601
PC3602
PC3604
PC3605
GAP-CLOSE-PWR 1 2
1
PG3613
1
1 2 DY GAP-CLOSE-PWR
1
PR3603
2
GAP-CLOSE-PWR PC3603 300R3-GP
5
6
7
8
PG3615 SC1U10V3KX-3GP
2
D
D
D
D
1 2 PU3601
2
FDS8880-NL-GP
GAP-CLOSE-PWR
1
+5V_ALW PC3606 Design Current = 9.46A
SC1U10V3KX-3GP
G
S
S
S
PR3604 PC3607
Peak Current = 11.82A
2
2 1 +1.05V_LL1 1 2
A
4
3
2
1
0R3-0-U-GP 13A<OCP<15.37A
PD3601 PU3602 SCD1U25V3KX-GP
B0530WS-7-F-GP +1.05V_V5FILT 4 13 +1.05V_DRVH
V5FILT DRVH +1.05V_DRVL +1.05V_RUNP
10 V5DRV DRVL 9 PL3601
K
+1.05V_VFB 5 12 +1.05V_LL 1 2
+1.05V_VBST 14 VFB LL IND-2D2UH-124-GP
K A VBST
1
PD3602 SDMK0340L-7-F-GP 3 +1.05V_VOUT
GAP-CLOSE-PWR-3-GP
VOUT
5
6
7
8
5
6
7
8
1
PC3608
PR3605 PTC3601 PTC3602
SCD1U10V2KX-4GP
PGOOD 6 RUNPWROK 26,30,37,38,39
ST330U2D5VDM-13GP
ST330U2D5VDM-13GP
1 2 100KR2J-1-GP +1.05V_EN 1 7 PR3607 PG3616 DY
D
D
D
D
D
D
D
D
20,26,28,30,37,38,39,50 PM_SLP_S3# EN_PSV GND DY
1
1 2 200KR2J-L1-GP +1.05V_TON 2 8 PR3606 PU3603 PU3604 2D2R5F-2-GP
2
PR3608 +1.05V_TRIP 11 TON PGND FDS8672S-GP FDS8672S-GP
15 1 2 +3.3V_RUN DY
2
TRIP GND
PC3609
SCD01U50V2KX-1GP
1
+PWR_SRC_1.05V
PR3601 TPS51117RGYR-GP 100KR2J-1-GP
7K68R2F-GP
2
1
1
PR3609
G
S
S
S
G
S
S
S
1 2
RT: Non_ASM DY PR3602 PC3610
4
3
2
1
4
3
2
1
TI: ASM 1M1R2J-GP DY 17K4R2F-GP PD3603 SC330P50V3KX-GP
B
DY B
2
2
2 +5V_RUN
2
+1.05V_LL 3
+1.05V_VOUT
1 PM_SLP_S3# Vout=0.75V*(R1+R2)/R2
1
BAW56-2-GP PR3610
12KR2F-L-GP PC3612
DY SC18P50V2JN-1-GP
GM 20090311
2
RT: Non_ASM TI: Non_ASM
2
TI: ASM RT :ASM +1.05V_VFB
TI: Non_ASM
1
RT :ASM
PR3611
30KR2F-GP
2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2UH FDVE1040-2R2M=P3 TOKO DCR:6.8mohm Isat =14.5Arms 68.2R21B.10M
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: FDS8880 SO-8/ 9.6mOhm/12mOhm @4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/[email protected]/ 84.08672.A37
A A
Switching freq-->350KHz <Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC 1.05V
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 36 of 59
5 4 3 2 1
5 4 3 2 1
RUNPWROK
26,30,36,38,39 RUNPWROK
SSID = PWR.Plane.Regulator_1p5v/1p1v
+1.8V_SUS +1.8V_LDOIN_1D5
PG3705
2 1
GAP-CLOSE-PWR
PG3706
2 1
GAP-CLOSE-PWR
D PG3704
VOUT = 0.5 *(1+Rtop/Rbot) D
PU3702
2 1
5
4
3
2
1
Vendor PIN6 PIN11 PIN20 GAP-CLOSE-PWR
Design current = 2.85A
PGOOD
NC#4
NC#3
GND
NC#1
PR3711
peak current = 3.65A
L6935 VBIAS N.C. SS
0R2J-2-GP 0R3-0-U-GP L6935TR-GP GND 21
PR3702 1 2 6 20 +1D5V_RUN_P +1.5V_RUN
VBIAS SS PG3710
20,26,28,30,36,38,39,50 PM_SLP_S3# 1 2 7 EN ADJ 19
RTXX35 N.C. VBIAS N.C. 8 VIN VOUT 18 2 1
9 VIN VOUT 17
10 16 GAP-CLOSE-PWR
VIN VOUT
1
PR3706 PC3711 PC3712 PG3712
1
PC3708 DY 2 1
NC#11
NC#12
NC#13
NC#14
NC#15
SCD1U10V2KX-4GP
20KR2F-L-GP
PC3702DY PTC20
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
Vendor PR3712 PR3711 PR3706 PR3704 PC3704 ST220U2D5VBM-2GP GAP-CLOSE-PWR
2
2
1
PC3706 PG3711
SC100P50V2JN-3GP
2
SC10U10V5KX-2GP
2 1
11
12
13
14
15
L6935 DY ASM 20K 10K
2
+5V_ALW GAP-CLOSE-PWR
2
RTXX35 ASM DY 1K 1.13K PR3704
10KR2F-2-GP
PR3712
0R3-0-U-GP
1
1.5V DY
1
C C
+3.3V_ALW
X01 20090112
1
R3703
10KR2F-2-GP
2
3
Q3702
2N7002SPT
+1.1V_RUN
+1.8V_SUS +1.8V_LDOIN_1D1
4
R3702
1 2 PG3703
2 1
B 10R3F-GP B
GAP-CLOSE-PWR RUNPWROK
1.1V_RUN_EN PG3702
2 1
GAP-CLOSE-PWR
PG3701
VOUT = 0.5 *(1+Rtop/Rbot)
PU3701
2 1 5
4
3
2
1
Vendor PIN6 PIN11 PIN20 0R2J-2-GP GAP-CLOSE-PWR
Design current = 2.9A
PGOOD
NC#4
NC#3
GND
NC#1
PR3707
26 1.1V_RUN_EN 1 2
PR3709
peak current = 2.9A
L6935 VBIAS N.C. SS
0R2J-2-GP 0R3-0-U-GP L6935TR-GP GND 21
PR3701 1 2 6 20 +1D1V_RUN_P +1.1V_RUN
PM_SLP_S3# VBIAS SS PG3709
1 2 7 19
RTXX35 N.C. VBIAS N.C. DY 8
EN ADJ
18 2 1
VIN VOUT
9 VIN VOUT 17
10 16 GAP-CLOSE-PWR
VIN VOUT PC3710 PC3709 PG3708
1
1
PC3707 PR3705 DY 2 1
NC#11
NC#12
NC#13
NC#14
NC#15
SCD1U10V2KX-4GP
12KR2F-L-GP
PR3708 PR3709 PR3705 PR3703 PC3701DY PTC19
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U10V2KX-4GP
Vendor PC3703 ST220U2D5VBM-2GP GAP-CLOSE-PWR
2
2
2
1
PC3705 PG3707
SC100P50V2JN-3GP
SC10U10V5KX-2GP
2 1
11
12
13
14
15
2
L6935 DY ASM 20K 10K
1
2
+5V_ALW GAP-CLOSE-PWR
2
RTXX35 ASM DY 1.02K 2.67K PR3703
2
10KR2F-2-GP
A A
<Core Design>
PR3708
0R3-0-U-GP DY
1
1.1V Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DC to DC L6935_1.5V / L6935_1.1VRev
www.vinafix.vn
Size Document Number
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 37 of 59
5 4 3 2 1
5 4 3 2 1
+PW R_SRC +PW R_SRC_1.8V
SSID = PWR.Plane.Regulator_gfx 1
PG3803
2
+1.8V_SUS
GAP-CLOSE-PW R
PG3805
1 2 X01 20090130
GAP-CLOSE-PW R +1.8V_SUS_P +1.8V_SUS
PG3807 PG3801
1 2 1 2
SE330U2VDM-L-GP
D D
SC4D7U6D3V5KX-3GP
GAP-CLOSE-PW R GAP-CLOSE-PW R
PG3809 +PW R_SRC_1.8V PG3802
PTC3801
PC3818
1
1
+5V_ALW 1 2 1 2
GAP-CLOSE-PW R GAP-CLOSE-PW R
2
PG3811 PG3804
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
PC3820
PC3807
PC3808
PC3809
PC3810
1 2 1 2
1
1
PR3804 GAP-CLOSE-PW R GAP-CLOSE-PW R
PC3801 300R3-GP PG3806
2
5
6
7
8
SC1U10V3KX-3GP 1 2
2
D
D
D
D
PU3802
SI7686DP-T1-GP
GAP-CLOSE-PW R
PC3802 PG3808
1
SC1U10V3KX-3GP PR3805 PC3806 1 2
+5V_ALW 2 1 +1.8V_LL1 1 2 Design Current = 15.799A
G
S
S
S
0R3-0-U-GP GAP-CLOSE-PW R
2
SCD1U25V3KX-GP Peak Current = 22.57A PG3810
X01 20090130
4
3
2
1
A
24.8A<OCP<29.34A 1 2
PD3801 PU3801
B0530W S-7-F-GP +1.8V_V5FILT 4 13 +1.8_DRVH PL3801 GAP-CLOSE-PW R
V5FILT DRVH +1.8V_DRVL IND-D88UH-3-GP +1.8V_SUS_P PG3817
10 V5DRV DRVL 9
1 2
K
+1.8V_FB 5 12 +1.8V_LL 1 2
+1.8V_BST VFB LL GAP-CLOSE-PW R
20,26,28,30,36,37,39,50 PM_SLP_S3# 14 VBST
PR3803 1 2 0R2J-2-GP +1.8V_VOUT PG3813
DY 3
SE330U2VDM-L-GP
SC4D7U6D3V5KX-3GP
GAP-CLOSE-PWR-3-GP
PM_SLP_S4#_1 PR3806 1 VOUT
2 0R2J-2-GP PGOOD 6 RUNPW ROK 26,30,36,37,39 1 2
1
+1.8V_EN
PTC3802
PC3816
X01 20090130 1 EN_PSV GND 7
8
7
6
5
8
7
6
5
1
C PR3807 1 2 280KR2F-GP +1.8V_TON 2 8 GAP-CLOSE-PW R C
TON PGND
D
D
D
D
D
D
D
D
+1.8_TRIP PU3804 PU3803 PR3812 PG3812
PG3821
11 TRIP GND 15
DY 2D2R5F-2-GP
+PWR_SRC_1.8V
1 2
5K11R2F-L1-GP
2
1
SI7636DP
SI7636DP
PR3801 TPS51117RGYR-GP
PR3809
1
1
GAP-CLOSE-PW R
RT: Non_ASM
1
DY 2
PR3802 PG3814
TI: ASM
G
S
S
S
G
S
S
S
1M1R2J-GP DY 17K4R3F-GP 1 2
1
DY
2
4
3
2
1
4
3
2
1
PC3817 GAP-CLOSE-PW R
X01 20090130
2
1
+1.8V_LL SC330P50V3KX-GP PG3815
2
PC3804
SC4700P50V2KX-1GP DY 1 2
2
GAP-CLOSE-PW R
X01 20090105 +1.8V_VOUT PG3824
1 2
1
RT: Non_ASM TI: Non_ASM GAP-CLOSE-PW R
TI: ASM RT :ASM PG3820
TI: Non_ASM PR3813 1 2
RT :ASM 42K2R2F-L-GP
GAP-CLOSE-PW R
2
PG3819
+1.8V_FB 1 2
D3802
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L GAP-CLOSE-PW R
DY
A K
1
PG3822
SDMK0340L-7-F-GP Inductor: 1UH FDUE1040D-1R0M=P3 TOKO 2.35mohm 1 2
20,26,50 PM_SLP_S4#
PM_SLP_S4#_1 O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms Panasonic/79.33719.L01 PR3814
30KR2F-GP GAP-CLOSE-PW R
B R3802
H/S: SI7686DP/ POWERPAK-8/ 14mOhm/ 4.5Vgs/ 84.07686.037 PG3823 B
SCD047U10V2KX-2GP
2
1 2 L/S: SI7636ADP/ POWERPAK-8/ 4.8mOhm/ 4.5Vgs/ 84.07636.037 1 2
Switching freq-->300KHz
0R2J-2-GP GAP-CLOSE-PW R
C3802
1
DY
2
X01 20090112
+5V_ALW +1.8V_SUS
1
2
1
PC3805 PC3803
PC3813 SC10U10V5KX-2GP SCD1U10V2KX-4GP
2
SC1U10V2KX-1GP
2
+0D9V_DDR_P +0.9V_DDR_VTT
PG3816
PU3805 1 2
10 1 GAP-CLOSE-PW R
PM_SLP_S4#_1 VIN VDDQSNS
2 1 MCH_REF_ON 9 S5 VLDOIN 2 PG3818
A PR3825 0R0402-PAD 8 3 1 2 <Core Design> A
PM_SLP_S3# GND VTT
2 1 0.9V_RUN_ON 7 S3 PGND 4
+V_DDR_MCH_REF PR3826 0R0402-PAD 6 5 GAP-CLOSE-PW R
VTTREF VTTSNS
Wistron Corporation
GND
1
SB:70131
1
PC3814 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SCD1U10V2KX-4GP TPS51100DGQR-GP PC3811 PC3812 Taipei Hsien 221, Taiwan, R.O.C.
2
11
SC10U10V5KX-2GP SC10U10V5KX-2GP
2
Title
DC to DC 1.8V/0.9V
Size Document Number Rev
www.vinafix.vn
A3
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 38 of 59
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_gfx
+PW R_SRC +PW R_SRC_GFX_CORE_
PG3901
1 2
D GAP-CLOSE-PW R D
PG3902
1 2 +PW R_SRC_GFX_CORE_
+5V_ALW
GAP-CLOSE-PW R
PG3903
SC2200P50V2KX-2GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
PC3904
1 2
1
PC3912
PC3902
PC3903
1
GAP-CLOSE-PW R DY
1
PG3904 PR3904
2
1 2 PC3901 300R3-GP
5
6
7
8
SC1U10V3KX-3GP
Vout=0.75V*(R1+R2)/R2
2
D
D
D
D
GAP-CLOSE-PW R PU3901
2
PG3905 FDS8880-NL-GP
1 2 PC3905 Design Current = 11.76A
1
SC1U10V3KX-3GP PR3905 PC3906
GAP-CLOSE-PW R +5V_ALW 2 1 +GFX_CORE_LL1 1 2
Peak Current = 11.76A
OCP min = 12.93~15.29A
G
S
S
S
2 0R3-0-U-GP
SCD1U25V3KX-GP
4
3
2
1
A
PD3901 PU3902 +VCC_GFX_COREP +VCC_GFX_CORE
B0530W S-7-F-GP +GFX_CORE_V5FILT 4 13 +GFX_CORE_DRVH
V5FILT DRVH +GFX_CORE_DRVL
10 V5DRV DRVL 9 PL3901
PG3906
K
+GFX_CORE_FB 5 12 +GFX_CORE_LL 1 2 2 1
PR3903 1 VFB LL
26 GFX_CORE_EN 2 0R2J-2-GP +GFX_CORE_BST 14
VBST
IND-2D2UH-124-GP
1
3 +GFX_CORE_VOUT GAP-CLOSE-PW R
SCD1U10V2KX-4GP
GAP-CLOSE-PWR-3-GP
VOUT
1
PR3906 1 2 100KR2J-1-GP PG3908
DY 6
ST330U2D5VDM-13GP
ST330U2D5VDM-13GP
ST330U2D5VDM-13GP
20,26,28,30,36,37,38,50 PM_SLP_S3# PGOOD RUNPW ROK 26,30,36,37,38
+GFX_CORE_EN PR3909
1 EN_PSV GND 7
DY DY 2 1
5
6
7
8
1
PR3907 1 2 200KR2J-L1-GP +GFX_CORE_TON 2 2D2R5F-2-GP
PG3907
C C
PTC3901
PTC3902
PTC3903
8
2
+GFX_CORE_TRIP 11 TON PGND GAP-CLOSE-PW R
PC3908
15
D
D
D
D
1 2
TRIP GND
+PWR_SRC_GFX_CORE_
PU3903 PG3909
1
PR3901 TPS51117RGYR-GP FDS8672S-GP
PR3908
2 1
9K31R2F-GP
2
1
PC3909
RT: Non_ASM
1
DY 2
PR3902 SC330P50V3KX-GP GAP-CLOSE-PW R
DY
2
TI: ASM
G
S
S
S
1M1R2J-GP DY 17K4R3F-GP PG3910
1 2
2
4
3
2
1
2
1
+GFX_CORE_LL GAP-CLOSE-PW R
PC3907 PG3911
SC4700P50V2KX-1GP DY +GFX_CORE_VOUT 1 2
2
GAP-CLOSE-PW R
1
PG3912
PR3911 1 2
RT: Non_ASM TI: Non_ASM 10KR2F-2-GP
TI: ASM RT :ASM GAP-CLOSE-PW R
TI: Non_ASM PG3913
2
RT :ASM +GFX_CORE_FB 1 2
1
GAP-CLOSE-PW R
1
PR3914 PG3914
110KR2F-GP PR3912 PR3913 1 2
49K9R2F-L-GP 56KR2F-GP
GAP-CLOSE-PW R
X01 20081229
2
PG3915
2
PWRCNTL_0#
1 2
B +3.3V_DELAY GAP-CLOSE-PW R B
PG3916
X01 20090130 K
PD3902
A 1 2 1 2
1
B0530W S-7-F-GP PR3910 GAP-CLOSE-PW R
R3921 12KR2F-L-GP PG3917
10KR2F-2-GP 2N7002-7F-GP 1 2
PWRCNTL_1#
Q3301 GAP-CLOSE-PW R
2
R3927 PG3918
54 PW RCNTL_0 2 1 PW RCNTL_0_R G 1 2
PWRCNTL_0 PWRCNTL_1 +VCC_GFX_CORE 10KR2F-2-GP
PC3915
SCD047U16V2KX-1-GP
2
+3.3V_DELAY GAP-CLOSE-PW R
100KR2J-1-GP
S
R3920
H H 1.1V
DY
2
1
L H 1V
R3922 2N7002-7F-GP
D
1
H L 0.95V 10KR2F-2-GP
Q3302
L L 0.9V R3928
2
2 1 PW RCNTL_1_R G
PC3916
SCD047U16V2KX-1-GP
54 PW RCNTL_1
2
10KR2F-2-GP
100KR2J-1-GP
S
R3923
X01 20090130 DY
2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
1
PD3903
Inductor: 2.2UH FDVE1040-2R2M=P3 TOKO DCR:6.8mohm Isat =14.5Arms 68.2R21B.10M K A 1 2
A <Core Design> A
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
B0530W S-7-F-GP PR3915
H/S: FDS8880 SO-8/ 9.6mOhm/12mOhm @4.5Vgs/ 84.08880.037 12KR2F-L-GP
L/S: FDS8672S SO-8/ 5.3mOhm/[email protected]/ 84.08672.A37 X01 20081229 Wistron Corporation
Switching freq-->350KHz 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA_CORE
Size Document Number Rev
www.vinafix.vn
A3
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 39 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 40 of 59
5 4 3 2 1
SSID = VIDEO SSID = Inverter
LVDS CONNECTOR X01 20081218 INVERTER POWER
LCD1 GFX_PWR_SRC +LCDVDD GFX_PWR_SRC +PWR_SRC
SCD1U10V2KX-4GP
48
F4101
41 50 Removed 2 1
1
+3.3V_RUN
C4133
1
2
FUSE-3A32V-7-GP
2 C4101 C4102
1
3 SC1KP50V2KX-1GP SCD1U50V3KX-GP
1
4
5
DYR4102
10KR2J-3-GP
42 6 R4105 33R2J-2-GP
7 +3.3V_DELAY_EEPROM 1 2 +3.3V_DELAY D4101
2
8 LCD_BRIGHTNESS K A
9
DY LBKLT_CTL 53
10 B0530WS-7-F-GP
LCD_CBL_DET# 26
11
12 R4106 100R2J-2-GP 2 1 BRIGHTNESS 26
43 13 BLON_OUT_R 1 2 BLON_OUT 26 R4103 33R2J-2-GP
14 LCD_TST LCD_TST 26
15 LDDC_CLK LDDC_CLK 54 R4101
16 LDDC_DATA LDDC_DATA 54
17 LCD_DET_G 1 2
18 VGA_TXBOUT0- VGA_TXBOUT0- 53
19 VGA_TXBOUT0+ VGA_TXBOUT0+ 53 100R2J-2-GP
44 20 BLON_OUT_R
21
22
VGA_TXBOUT1-
VGA_TXBOUT1+
VGA_TXBOUT1- 53
VGA_TXBOUT1+ 53
SSID = VIDEO
1
23
24 VGA_TXBOUT2- VGA_TXBOUT2- 53 R4108
25 VGA_TXBOUT2+ VGA_TXBOUT2+ 53 100KR2J-1-GP
26
45 27 VGA_TXBCLK- VGA_TXBCLK- 53
2
28 VGA_TXBCLK+ VGA_TXBCLK+ 53
29
30 VGA_TXAOUT0- VGA_TXAOUT0- 53
VGA_TXAOUT0+
31
32
VGA_TXAOUT0+ 53 X02 20090219
33 VGA_TXAOUT1- VGA_TXAOUT1- 53
46 34 VGA_TXAOUT1+ VGA_TXAOUT1+ 53
35
36 VGA_TXAOUT2- VGA_TXAOUT2- 53
37 VGA_TXAOUT2+ +3.3V_RUN
VGA_TXAOUT2+ 53
38
39 VGA_TXACLK- VGA_TXACLK- 53 LCD_BRIGHTNESS LCD POWER
40 VGA_TXACLK+ VGA_TXACLK+ 53 Q4101
47 51 LCD_TST 1 D D 6 +LCDVDD
2 D D 5
SC33P50V2JN-3GP
SC33P50V2JN-3GP
EC4119
EC4101
49 3 G S 4
1
1
IPEX-CONN40-2R-GP 2 1 SI3456BDV-T1-GP
20.F1093.040
DY DY +15V_ALW
R4104 330KR2J-L1-GP R4109
2
1
1 2 FPVCC_CTL1 120R3J-2-GP C4103 C4105
C4106 SCD1U50V3KX-GP SC10U6D3V5KX-1GP SCD1U10V2KX-4GP
2
1 2
R4107 DY 100KR2J-1-GP Q4102
For EMI request
4 3 LCDVDD_1
5 2
6 1
2N7002SPT
+3.3V_ALW 1 2
R4110 47KR2J-2-GP
53 LCDVDD_EN 1
3 OUT FPVCC_CTL3
3 ENVDD_D 2 R1
IN 1 GND
2 R2
26 LCD_TST_EN
Q4103
D4102 DDTC144EUA-7F-GP
BAT54C-7-F-GP
X01 20081218
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size Document Number
LCD/Inverter Connector Rev
www.vinafix.vn
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 41 of 59
5 4 3 2 1
SSID = LOM 1.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
2.No vias, No 90 degree bends.
10/100M Lan Transformer
3.pairs must be equal lengths.
4.6mil trace width,12mil separation.
RJ45 Connector
XF4201
5.36mil between pairs and any other trace.
25 LAN_TX/RX#
25 MDI0+ 12 1 RJ45-3 6.Must not cross ground moat,except
2 1 LAN_TX/RX#
RJ-45 moat. RJ45
2 RJ45-6 C4219 +3.3V_LAN 10
D SC1KP50V2KX-1GP D
B2
R4201 2 1 470R2J-2-GP LAN_LED_POWER B1
11 3 XFR_RXC RJ45-4 RJ45-7 8
25 MDI0-
10 RJ45-7 7
9 4 XFR_CMT RJ45-2 6
8 5 RJ45-1 RJ45-4 5
25 MDI1+
4
RJ45-1 3
RJ45-6 2
1
C4202 C4201 +3.3V_LAN C4221 25 LAN_LINK100# RJ45-3 1
SCD01U16V2KX-3GP SCD01U16V2KX-3GP SC1KP50V2KX-1GP
7 6 RJ45-2 2 1 LAN_LINK100# A3
25 MDI1-
2
1
2
3
4
R4206 2 1 470R2J-2-GP LAN_LED_POWER_2 A2
XFORM-285-GP RN4202 2 1 LAN_LINK10# A1
SRN75J-1-GP C4220 9
SC1KP50V2KX-1GP 25 LAN_LINK10#
RJ45-138-GP-U1
C4205 22.10277.091
8
7
6
5
LAN_TERMINAL 2 1
SC1500P2KV8KX-3GP AFTP4220 1
AFTP4206 1 +3.3V_LAN
AFTP4207 1 LAN_LINK10#
AFTP4209 LAN_LINK100#
AFTP4208
1
1 RJ45-1
X02 20090224
AFTP4202 1 RJ45-2
AFTP4203 1 RJ45-3
AFTP4204 1 RJ45-4
AFTP4201 1 RJ45-6
C
AFTP4217 1 RJ45-7 C
AFTP4218 1 LAN_LED_POWER
AFTP4216 1 LAN_TX/RX#
Layout Note:
SSID = VIDEO +5V_CRT_RUN
*Pi-filter & 150 Ohm pull-down
2
1
resistors should be as close +5V_CRT_RUN
RN4201
as to CRT CONN. SRN2K2J-1-GP CRT1
NP1
* RGB signal will hit 75 Ohm 9
NP1
NP2
3
4
VCC_CRT NP2
first, then pi-filter, finally 11
NC#11
CRT CONN. 54 DDC_DATA_CON
DDC_DATA_CON
DDC_CLK_CON
12
15
DDCDATA_ID1 NC#4 4
54 DDC_CLK_CON DDCCLK_ID3
L4203
54 M_RED 1 2 CRT_R CRT_R 1 5
CRT_R GND
1
1
BLM18BA220SN1D-GP CRT_G 2 6
C4215 C4208 CRT_B CRT_G GND
3 CRT_B GND 7
L4204 SC22P50V2JN-4GP SC22P50V2JN-4GP 8
2
2
CRT_G JVGA_HS GND
54 M_GREEN 1 2 13 JVGA_HS GND 10
BLM18BA220SN1D-GP JVGA_VS 14 16
JVGA_VS GND
GND 17
L4205
B 54 M_BLUE 1 2 CRT_B VIDEO-15-84-GP-U1 B
BLM18BA220SN1D-GP AFTP4211 +5V_CRT_RUN 20.20735.015
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
SC8P250V2CC-GP
1
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
AFTP4212 DDC_DATA_CON
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
1
1
1
C4209
C4210
C4211
C4212
C4213
C4214
C4207
C4206
AFTP4210 1 DDC_CLK_CON
DY DY
R4205
R4202
R4203
AFTP4215 1 CRT_R
2
AFTP4214 1 CRT_G AFTP4221 1
2
AFTP4213 1 CRT_B
2
AFTP4222 1 JVGA_HS
AFTP4223 1 JVGA_VS
+5V_CRT_RUN
+5V_RUN
D4201
2
+5V_CRT_RUN +5V_RUN
14
10
+5V_RUN CRT_R 3
DY D4204
1 9 8 K A
1
1
B0530WS-7-F-GP
C4217 BAV99-4-GP U4201C C4216
7
SCD1U16V2KX-3GP TSAHCT125PW-GP SCD01U16V2KX-3GP
Hsync & Vsync level shift D4202
2
2
2
CRT_G 3
DY
14
U4201A 1
+5V_RUN
A HSYNC_5 A
54,56 VGA_HSYNC 2 3 BAV99-4-GP <Core Design>
14
13
D4203
TSAHCT125PW-GP
Wistron Corporation
14
7
4
U4201B RN4203 2
4 1 JVGA_HS 12 11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5 6 VSYNC_5 3 2 JVGA_VS CRT_B 3 Taipei Hsien 221, Taiwan, R.O.C.
54,56 VGA_VSYNC DY
SRN33J-5-GP-U 1 7 U4201D Title
TSAHCT125PW-GP TSAHCT125PW-GP
LAN/CRT Connector
7
www.vinafix.vn
BAV99-4-GP Size Document Number Rev
Custom SB
Alba Discrete
Date: Monday, March 23, 2009 Sheet 42 of 59
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
Mini Card Connector(802.11a/b/g/n)
D D
+1.5V_RUN +3.3V_RUN
WLAN
53
NP1
1 2
+5V_ALW +3.3V_RUN 3 4
45 WLAN_ACT
45 BT_ACT 5 6
7 MINI1_CLKREQ# 7 8 LPC_LFRAME#_IN LPC_LFRAME#_IN 18
1
9 10 LPC_LAD3_IN
LPC_LAD3_IN 18
C4304 C4305 R4328 1 2 0R2J-2-GP LPC_LAD2_IN
SCD1U16V2KX-3GP DY SCD1U16V2KX-3GP
11,19,25,26,50 PLT_RST# DY 7 CLK_PCIE_MINI1#
7 CLK_PCIE_MINI1
11
13
12
14 LPC_LAD1_IN
LPC_LAD2_IN 18
LPC_LAD1_IN 18
2
R4329 1 2 0R2J-2-GP LPC_LAD0_IN
7 PCLK_FWH DY 15 16 LPC_LAD0_IN 18
R4323 1 2 0R2J-2-GP E51_RXD_R
+3.3V_RUN +1.5V_RUN
26 E51_RXD
R4322 1 DY 2 0R2J-2-GP E51_TXD_R
17 18
26 E51_TXD DY 19
21
20
22 PLT_RST#
WIFI_RF_EN 26
R4330
PLT_RST# 11,19,25,26,50 0R3-0-U-GP
23 24
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
19 PCIE_IRXN2_MTXN2 +3.3V_RUN
19 PCIE_IRXP2_MTXP2 25 26 USB_P4- 1 2 USB_PN4
USB_PN4 19
1
1
C4301
C4302
C4303
C4306
27 28
ICH_SMBCLK
DY DY DY 19 PCIE_ITXN2_MRXN2
29
31
30
32 ICH_SMBDATA
ICH_SMBCLK 7,16,17,20
ICH_SMBDATA 7,16,17,20
2
19 PCIE_ITXP2_MRXP2 33 34
3
35 36 USB_P4-
37 38 USB_P4+
39 40
+3.3V_RUN
41 42 DY
43 44 DLW21SN900SQ2LUGP
C WLAN_ACT 45 46 L4301 C
47 48
2
1
R4321 49 50
EC4301 +5V_MINI_DEBUG
SC220P50V2KX-3GP
+5V_ALW 1
DY 2 51 52
NP2
2
0R3-0-U-GP 54 USB_P4+ 1 2 USB_PP4
USB_PP4 19
SKT-MINI52P-6-GP-U R4331
62.10043.261 0R3-0-U-GP
SSID = User.Interface
ITP Connector
B +1.05V_VCCP B
H_CPURST# use pull-up Resistor close
1
1
51R2F-2-GP
51R2F-2-GP
56R2F-1-GP
150R2F-1-GP
ITP connector 500 mil ( max ),
R4312
R4306
R4311
R4319
R4315
39R2F-GP
DY DY others place near CPU side.
2
ITP1
29
ITP_TDI 1
8 ITP_TDI
ITP_TMS 2
8 ITP_TMS ITP_TRST#
8 ITP_TRST#
3 +1.05V_VCCP use Decoupling Capacitor close
4
ITP_TCK 5
ITP connector 100 mil ( max )
8 ITP_TCK
6
ITP_TDO R4301 2 22D6R2F-L1-GP ITP_TDO_1
8 ITP_TDO
7 CLK_CPU_ITP#
CLK_CPU_ITP#
1
DY 7
8 CPU ITP Connector
CLK_CPU_ITP 9
7 CLK_CPU_ITP
10 TCK(PIN 5)
11 TCK(PIN AC5)
R4320 1 2 124R2F-U-GP ITP_CPURST#
8,10 H_CPURST#
ITP_BPM#5 DY 12
13 FBO(PIN 11)
8 ITP_BPM#5
14
ITP_BPM#4
8 ITP_BPM#4 15
16
DY
ITP_BPM#3 17
8 ITP_BPM#3
18
ITP_BPM#2 19
8 ITP_BPM#2
20
A ITP_BPM#1 21 A
8 ITP_BPM#1
22
ITP_BPM#0 23 <Core Design>
8 ITP_BPM#0
24
ITP_DBRESET# 25
8,20 ITP_DBRESET#
26
Wistron Corporation
1
R4326 +1.05V_VCCP 27
R4317 R4308 1 2 28 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+3.3V_ALW
649R2F-GP 27R2F-GP 30 Taipei Hsien 221, Taiwan, R.O.C.
150R2F-1-GP
MLX-CON28-3-GP Title
2
20.K0116.028 MINICARD(WLAN)/ITP CONN
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 43 of 59
5 4 3 2 1
SSID = SATA SSID = SATA
ODD Connector
SATA HDD Connector
+5V_RUN
HDD1
16
NP1
1
S1
C4407 C4406
SC10U6D3V5MX-3GP SCD1U10V2KX-4GP 18 SATA_ITXP0_HRXP0 S2
2
18 SATA_ITXN0_HRXN0 S3
ODD1 S4
18 SATA_IRXN0_HTXN0_C SCD01U50V2KX-1GP 1 2 C4402 SATA_IRXN0_HTXN0 S5
P2 P1 18 SATA_IRXP0_HTXP0_C SCD01U50V2KX-1GP 1 2 C4403 SATA_IRXP0_HTXP0 S6
+5V DP ODD_MD AFTP4411
SATA_RX- and SATA_RX+ Trace P3 +5V MD P4 1 S7
Length match within 20 mil
18 SATA_ITXP1_ORXP1 S2 A+ GND S1 +3.3V_RUN 1
18 SATA_ITXN1_ORXN1 S3 A- GND S4 2
1
18 SATA_IRXP1_OTXP1_C C4408 2 1 SCD01U50V2KX-1GP SATA_IRXP1_OTXP1 S6 S7 3
C4409 B+ GND
2 1 SCD01U50V2KX-1GP SATA_IRXN1_OTXN1 S5 P5 C4411 C4410 4
18 SATA_IRXN1_OTXN1_C B- GND
P6 SC10U6D3V5MX-3GP DY DY SCD1U16V2KX-3GP 5
2
GND
NP1 NP1 GND 8 6
NP2 NP2 GND 9 +5V_RUN 7
1 AFTP4412 8
1
9
SKT-SATA7P+6P-22-GP-U1 C4405 C4404 10
62.10065.351 SC10U6D3V5MX-3GP SCD1U16V2KX-3GP 11
2
12
13
14
15
AFTP4403 1 SATA_ITXP0_HRXP0 NP2
AFTP4402 1 SATA_ITXN0_HRXN0 AFTP4401 1 17
AFTP4407 1 SATA_ITXP1_ORXP1 AFTP4405 1 SATA_IRXN0_HTXN0
AFTP4410 1 SATA_ITXN1_ORXN1 AFTP4406 1 SATA_IRXP0_HTXP0 SKT-SATA7P+15P-27-GP
AFTP4413 1 SATA_IRXN1_OTXN1 AFTP4404 1 +3.3V_RUN 22.10300.551
AFTP4414 1 SATA_IRXP1_OTXP1 AFTP4408 1 +5V_RUN
AFTP4415 1 +5V_RUN
X01 20090108
SSID = AUDIO SSID = AUDIO
AFTP4416 1 AUD_SPK_L-_C
AFTP4419 1 AUD_SPK_L+_C
AFTP4418 1 AUD_SPK_R-_C
AFTP4417 1 AUD_SPK_R+_C
Speaker Connector Internal MIC
5
SPK1
AUD_SPK_L- R4402 1 2 0R3-0-U-GP AUD_SPK_L-_C 1
22 AUD_SPK_L- INT_MIC_L_R MIC1
22 INT_MIC_L_R
1
AUD_SPK_L+ R4401 1 2 0R3-0-U-GP AUD_SPK_L+_C 2 MICROPHONE-38-GP-U1
22 AUD_SPK_L+ AUD_SPK_R- R4403 1 2 0R3-0-U-GP AUD_SPK_R-_C 3
2
22 AUD_SPK_R-
1
AUD_SPK_R+ R4404 1 2 0R3-0-U-GP AUD_SPK_R+_C 4
22 AUD_SPK_R+ EC4405
SC1KP50V2KX-1GP
2
MLX-CON4-16-GP-U
MLVG0402220NV05-GP
MLVG0402220NV05-GP
MLVG0402220NV05-GP
MLVG0402220NV05-GP
6
1
20.F0711.004
EC4401
EC4402
EC4403
EC4404
2
AFTP4424 1
X01 20081215
X02 20090219
SSID = Thermal
AFTP4409 1 EMC2102_FAN_TACH_1
Fan Connector
AFTP4421 1 EMC2102_FAN_DRIVE
FAN1
5
1
28 EMC2102_FAN_TACH_1 EMC2102_FAN_TACH_1 2 <Core Design>
3
28 EMC2102_FAN_DRIVE EMC2102_FAN_DRIVE 4
*Layout* 15 mil AFTP4423 1
6
Wistron Corporation
K
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
D4401 FOX-CON4-15-GP Taipei Hsien 221, Taiwan, R.O.C.
C4401 SDMK0340L-7-F-GP 20.D0241.104
SC22U6D3V5MX-2GP Title
2
HDD/ODD/FAN/SPEAKER/MICRev
www.vinafix.vn
A
Size Document Number
Custom
X02 20090219 Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 44 of 59
5 4 3 2 1
SSID = KBC SSID = Touch.Pad
+5V_RUN +5V_RUN
SCD1U16V2KX-3GP
Internal KeyBoard Connector
2
1
1
D D
C4503
RN4501
TouchPad Connector
2
KB1 1 AFTP4531 SRN10KJ-5-GP
31 TPAD1
1 KB_DET# 26 5
3
4
1
2 KROW7 1 AFTP4502
3 KROW6 1 AFTP4501 26 TPCLK 2
4 KROW4 1 AFTP4505 26 TPDATA 3
5 KROW2 1 AFTP4504 4
1
1
6 KROW5 1 AFTP4503 AFTP4535 1 +5V_RUN 6
7 KROW1 1 AFTP4506 AFTP4534 1 TPCLK C4505 C4502 AFTP4533 1
8 KROW3 1 AFTP4508 AFTP4536 1 TPDATA SC33P50V2JN-3GP SC33P50V2JN-3GP
2
2
9 KROW0 1 AFTP4507 FOX-CON4-12-GP-U
10 KCOL5 1 AFTP4511 20.K0179.004
11 KCOL4 1 AFTP4510 KROW[0..7] 26
12 KCOL7 1 AFTP4509
13 KCOL6 1 AFTP4512
KCOL8 AFTP4514
14
15 KCOL3
1
1 AFTP4513
KCOL[0..16] 26 X01 20090109
16 KCOL1 1 AFTP4517
17 KCOL2 1 AFTP4516
18 KCOL0 1 AFTP4515
19 KCOL12 1 AFTP4518
20 KCOL16 1 AFTP4520
21 KCOL15 1 AFTP4519
22 KCOL13 1 AFTP4523
23 KCOL14 1 AFTP4522
C 24 KCOL9 1 AFTP4521 C
25 KCOL11 1 AFTP4524
26 KCOL10 1 AFTP4526
27
28
29
30 1 AFTP4532
SSID = User.Interface
32
HRS-CON30-1-GP-U
20.K0259.030
Bluetooth Module conn.
BT1
15
NP1
AFTP4537 1 BLUETOOTH_DET# 1 2 BT_ACT +3.3V_RUN
WLAN_ACT 3 4
AFTP4538 BDC_ON USB_PP6
SC2D2U10V3KX-1GP
1 5 6
BLUETOOTH_EN 7 8 USB_PN6
AFTP4539 1 BT_LED 9 10
1
C4501
AFTP4540 1 BLUETOOTH_GPIO3 11 12
AFTP4541 1 BLUETOOTH_GPIO5 13 14
NP2
2
16
1 AFTP4542
HRS-CONN14D-GP
20.F0987.014
B B
AFTP4528 1 WLAN_ACT
19 USB_PP6 USB_PP6 AFTP4527 1 BLUETOOTH_EN
19 USB_PN6 USB_PN6 AFTP4544 1 BT_ACT
43 BT_ACT BT_ACT AFTP4543 1 +3.3V_RUN
26 BLUETOOTH_EN BLUETOOTH_EN AFTP4546 1 USB_PP6
43 WLAN_ACT WLAN_ACT AFTP4545 1 USB_PN6
SC220P50V2KX-3GP
100KR2J-1-GP
10KR2J-3-GP
1
1
1
R4501
R4502
EC4502
DY DY
2
2
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
KeyBoard/TouchPad/BT
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 45 of 59
5 4 3 2 1
5 4 3 2 1
D D
Remove Modem
X01 20081208
C C
+5V_ALW
USB Power
U4601 +5V_USB1
at least 80 mil 1 GND OC1# 8 at least 80 mil
2 IN OUT1 7
SC1U10V3KX-3GP
ST100U6D3VBM-7GP
SCD1U10V2KX-4GP
3 EN1# OUT2 6
TC4601
C4601
SCD1U10V2KX-4GP
100KR2J-1-GP
26,51 USB_PWR_EN#
4 EN2# OC2# 5
1
R4603
C4602
DY
1
C4608
TPS2062AD-GP
DY
2
2
USB_OC#0 19
2
USB_OC#1 19
R4602
1 2
B USB_PN0 0R3-0-U-GP USB_P0- B
19 USB_PN0
+5V_USB1
D4601
4
1 4 +5V_USB1 +5V_USB1
TR4601
DY L-63UH-GP USB1 USB2
6 6
1 1
1
USB_P0+ 2 3 USB_P0- USB_P0- 2 USB_P1- 2
USB_P0+ 3 USB_P1+ 3
USB_PP0 USB_P0+ PRTR5V0U2X-GP 4 4
19 USB_PP0
R4601 5 5
1 2 AFTP4603 1 AFTP4604 1
SKT-1394-4P-27-GP-U SKT-1394-4P-27-GP-U
0R3-0-U-GP 22.10218.T51 22.10218.T51
R4604
1 2 +5V_USB1
AFTP4609 1 +5V_USB1 AFTP4610 1 +5V_USB1
19 USB_PN1 USB_PN1 0R3-0-U-GP USB_P1- D4602 AFTP4602 1 USB_P0- AFTP4612 1 USB_P1-
1 4 AFTP4601 1 USB_P0+ AFTP4611 1 USB_P1+
4
TR4602
X01 20081208
A L-63UH-GP A
DY USB_P1- 2 3 USB_P1+
<Core Design>
PRTR5V0U2X-GP
Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
USB_PP1 USB_P1+ Taipei Hsien 221, Taiwan, R.O.C.
19 USB_PP1
R4606
1 2
X01 20081222 Title
0R3-0-U-GP MDC CONN
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 46 of 59
5 4 3 2 1
5 4 3 2 1
Camera Connector SSID = User.Interface
SSID = Flash.ROM R4705
1 2
0R3-0-U-GP
USB_PP11 19
SPI FLASH ROM (16M bits) 10
CON3
3
1
D D
2 CAMERA_USB1+ L2
3 CAMERA_USB1- DY DLW21SN900SQ2LUGP
4 +3.3V_CAMERA R4702
+3.3V_RTC_LDO +3.3V_RTC_LDO 5 AUD_DMIC_IN0_R 1 2 33R2J-2-GP AUD_DMIC_IN0 22
6
2
7 AUD_DMIC_CLK_G_R 1 2 R4701 AUD_DMIC_CLK_G 22
0R3-0-U-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
8 CAMERA_DET# 26
9 USB_PN11 19
3
4
1
C4705
C4706
1 AFTP4705
R4711 RN4701 C4704 C4701
100KR2J-1-GP SRN100KJ-6-GP SC10U6D3V5MX-3GP DY MLX-CON8-6-GP-U DY SC4D7P50V2CN-1GP R4704
2
20.F0693.008 1 2
2
0R3-0-U-GP
2
1
EC_SPI_HOLD#
AUD_DMIC_IN0_R
U4701 +3.3V_RTC_LDO AFTP4703 1 CAMERA_DET#
AFTP4704 1 AUD_DMIC_CLK_G_R AUD_DMIC_CLK_G_R
26 EC_SPI_CS# EC_SPI_CS# 1 8 AFTP4707 1 AUD_DMIC_IN0_R
CS# VCC
1
26 EC_SPI_DI R4710 1 2 0R2J-2-GP 2 7 EC_SPI_HOLD# AFTP4706 1 +3.3V_CAMERA EC4701 EC4702
R4712 1 DO HOLD#
26 EC_SPI_WP#_R 2 0R2J-2-GP EC_SPI_WP# 3 W P# CLK 6 EC_SPI_CLK 26 AFTP4709 1 CAMERA_USB1-
4 5 R4709 1 2 EC_SPI_DO 26 AFTP4708 1 CAMERA_USB1+
GND DIO 33R2J-2-GP MLVG0402220NV05-GP MLVG0402220NV05-GP
1
1
EC4711 W25X16AVSSIG-GP
2
SC4D7P50V2CN-1GP EC4709 EC4710
C X01 20081215 C
2
SC4D7P50V2CN-1GP SC4D7P50V2CN-1GP
2
Digital Mic Power
+3.3V_RUN +3.3V_CAMERA
R4703
1 2
0R3-0-U-GP
SSID = User.Interface
1
EC4703 C4702
SCD1U16V2KX-3GP DY SC4D7U6D3V3KX-GP
2
Power Button LED +5V_ALW
Q4703
R2
E
PWR_BTN_LED# B
26 PWR_BTN_LED# R1
POWER_SW_LED_R
C 2 1
DDTA144VCA-7-F-GP
R4788
330R2J-3-GP
POWER_SW_LED_B 51
SSID = RBATT
B B
RTC Connector
1
EC4704
MLVG0402220NV05-GP +3.3V_RTC_LDO
2
+RTC_CELL D4702
1
Power/Battery LED 3
R4706
+RTC_VCC
RTC1
X01 20081215 2 RTC_PWR 1 2 1 PW R
1
2 GND
Q4702 R4713 C4707 BAT54CW-1-GP 1KR2J-1-GP NP1
LED_PWR# PWR_LED_B# SC1U10V3KX-3GP NP1
C 1 2 PWR_LED_B# 50 NP2
2
R1 AFTP4702 NP2
26 PWRLED B 1
E 330R2J-3-GP
1
R2 Width=20mils BAT-CON2-1-GP-U
BAT_LED_B# 50
PDTC124EU-1-GP EC4708 62.70001.011
DY SC220P50V2KX-3GP
2
AFTP4701 1 +RTC_VCC
Q4701 R4714
C LED_BAT# 1 2 BAT_LED_B#
A R1 A
26 BATLOW_LED B <Core Design>
E 270R2J-L
1
R2
PDTC124EU-1-GP
DY EC4707
SC220P50V2KX-3GP Wistron Corporation
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SPI Flash/LED/Camera/RTC
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 47 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 48 of 59
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blank)
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
(Reserve)
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 49 of 59
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard
D D
New Card Connector
Lay out close to Chip
CON2
NP2
54 53 +3.3V_ALW +1.5V_RUN +3.3V_RUN +3.3V_CARD +1.5V_CARD +3.3V_CARDAUX
50 49
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC4D7U6D3V5KX-3GP
22 AUD_HP1_JACK_L
48 47 AUD_VREFOUT_B 22
+5V_ALW 46 45
22 AUD_HP1_JACK_R AUD_EXT_MIC_L 22
1
C5007
C5009
C5005
C5001
C5003
C5004
C5002
C5008
C5010
44 43 AUD_EXT_MIC_R 22
42 41
22 EXT_MIC_JD#
22 AUD_HP1_JD# 40 39
DY
2
BAT_LED_B# 47
38 37 PWR_LED_B# 47
C 36 35 C
AFTP5002 1 CPPE# 34 33 PCIE_ITXP5_NRXP5 19
CPUSB# 32 31 PCIE_ITXN5_NRXN5 19
+3.3V_CARD 30 29
28 27 PCIE_IRXP5_NTXP5 19
PERST# 26 25 PCIE_IRXN5_NTXN5 19
+3.3V_CARDAUX 24 23
20,25 PCIE_WAKE# 22 21 USB_PP7 19 NEWCARD_OC#
TP5001
+1.5V_CARD 20 19 USB_PN7 19 PM_SLP_S3# 20,26,28,30,36,37,38,39
18 17
7 NEWCARD_CLKREQ# NEWCARD_CLKREQ# 16 15 CLK_PCIE_NEW 7
14 13
21
19
18
CLK_PCIE_NEW# 7
1
12 11 U5001
7 CLK_48M_CARD
10 9
GND
THERMAL_PAD
OC#
RCLKEN
STBY#
SMB_DATA 20
8 7 SMB_CLK 20
19 USB_PN10 6 5
+3.3V_RUN 4 3 PLT_RST_CARDREADER# For 2nd Source 74.05538.073
19 USB_PP10
R5002
2 1 16 NC#16 SHDN# 20 PM_SLP_S4# 20,26,38
52 51 1 AFTP5001 1 2 14 8 PERST# RN5001
NP1
DY PLT_RST# 11,19,25,26,43 +1.5V_RUN
13
NC#14 PERST#
9 CPUSB# 4 1
+1.5V_CARD NC#13 CPUSB# +3.3V_ALW
2K2R2J-2-GP 5 10 CPPE# 3 2
FOX-CONN50A-2-GP
+3.3V_CARD
4
NC#5 CPPE#
6 NRST DY
+3.3V_RUN NC#4 SYSRST#
1
20.F1400.050 SRN100KJ-6-GP
C5011
DY
AUXOUT
1.5VOUT
3.3VOUT
SC1U10V2KX-1GP R5001 2 1 0R2J-2-GP PLT_RST# 11,19,25,26,43
2
AUXIN
1.5VIN
3.3VIN
C5006 2 SC22P50V2JN-4GP
DY1
X01 20081229 TPS2231RGP-GP-U
15
17
11
12
3
2
B B
AFTP5029 1 PWR_LED_B#
AFTP5032 1 BAT_LED_B#
+3.3V_CARDAUX +3.3V_RUN
AFTP5031 1 +5V_ALW
+3.3V_ALW +3.3V_CARD
AFTP5030 1 PLT_RST_CARDREADER#
+1.5V_CARD +1.5V_RUN
AFTP5020 1 PCIE_ITXP5_NRXP5
AFTP5025 1 PCIE_ITXN5_NRXN5 +1.5V_CARD Max. 650mA, Average 500mA.
AFTP5023 1 PCIE_IRXP5_NTXP5
AFTP5024 1 PCIE_IRXN5_NTXN5 +3.3V_CARD Max. 1300mA, Average 1000mA
AFTP5026 1 AUD_VREFOUT_B +3.3V_CARDAUX Max. 275mA
AFTP5004 1 AUD_HP1_JACK_L
AFTP5006 1 AUD_HP1_JACK_R
AFTP5007 1 +3.3V_RUN
AFTP5009 1 CPUSB#
AFTP5005 1 USB_PP7
AFTP5008 1 USB_PN7
AFTP5011 1 AUD_EXT_MIC_L
AFTP5010 1 AUD_EXT_MIC_R
AFTP5017 1 EXT_MIC_JD#
AFTP5013 1 AUD_HP1_JD#
AFTP5014 1 CLK_48M_CARD
AFTP5012 1 NEWCARD_CLKREQ#
AFTP5019 1 +3.3V_CARD
AFTP5015 1 PERST#
AFTP5022 1 +3.3V_CARDAUX
AFTP5021 1 PCIE_WAKE#
AFTP5016 1 +1.5V_CARD
AFTP5018 1 SMB_DATA
AFTP5003 1 SMB_CLK
AFTP5027 1 USB_PN10
A AFTP5028 USB_PP10 A
1 <Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Express Card Board CONN
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 50 of 59
5 4 3 2 1
5 4 3 2 1
SSID = USB
+5V_USB2
CON4
R5102 7
D D
1 2 1
19 USB_PN2 USB_PN2 0R3-0-U-GP USB_P2- 2
USB_P2- 3
USB_P2+ 4
USB Power
2
5
6
+5V_ALW U5101 +5V_USB2 8
L-63UH-GP AFTP5101 1
at least 80 mil 1 8 at least 80 mil DY TR5102 JST-CON6-17-GP
GND OC1#
2 IN OUT1 7 21.D0220.106
SC1U10V3KX-3GP
ST100U6D3VBM-7GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3 6
3
EN1# OUT2
100KR2J-1-GP
26,46 USB_PWR_EN# 4 EN2# OC2# 5
TC5101
R5105
C5102
C5101
19 USB_PP2 USB_PP2 USB_P2+
1
C5105
R5104
TPS2062AD-GP DY
DY 1 2 X01 20081208
2
2
2
0R3-0-U-GP
USB_OC#2 19
AFTP5104 1 +5V_USB2
+5V_USB2 AFTP5105 1 USB_P2-
AFTP5108 1 USB_P2+
D5101
1 4
C C
USB_PN2 2 3 USB_PP2
PRTR5V0U2X-GP
X01 20081222
SSID = User.Interface
AFTP5111 1 +3.3V_ALW
AFTP5109 1 LID_CLOSE#_1 +3.3V_ALW
Hall Sensor Connector
Power Button Board CONN
1
B +3.3V_ALW C5103 B
SCD1U16V2KX-3GP
X01 20090130
CON5
2
1
CON1
R5106 5 R5108 NP1
1 2 KBC_PWRBTN#_IN 1 100KR2J-1-GP 10 1
26 KBC_PWRBTN#
33R2J-2-GP 2 9 2
2
3 26 LID_CLOSE# LID_CLOSE# 1 2 LID_CLOSE#_1 8 3
1
EC5101 4 R5107 10R2J-2-GP 7 4
47 POWER_SW_LED_B
1
6 6 5
C5104 AFTP5110 1 NP2
MLVG0402220NV05-GP SCD047U10V2KX-2GP
2
AFTP5103 1 FOX-CON4-12-GP-U FOX-CONN10C-GP
20.K0179.004 20.F1474.010
2
X01 20090109
AFTP5102 1 KBC_PWRBTN#_IN
AFTP5112 1 POWER_SW_LED_B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Power Button/Hall Sensor/USB Board
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 51 of 59
5 4 3 2 1
5 4 3 2 1
SSID = Mechanical
D D
H12 H9 H10 H1 H4
HOLE
HOLE
HOLE
HOLE
HOLE
1
1
+PWR_SRC
+1.8V_SUS +1.8V_SUS +1.8V_SUS_P +1.8V_SUS_P
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
H13 H2 H3 H19 H20
1
1
EC5201
EC5202
EC5203
EC5204
EC5205
EC5206
EC5207
EC5208
EC5209
EC5210
EC5212
EC5213
EC5211
HOLE
HOLE
HOLE
HOLE
HOLE
DY DY DY DY DY DY DY
2
2
Removed
1
X01 20081208
EMI Request X02 20090305 H11 H14 H5 H17 H18
C C
HOLE
HOLE
HOLE
HOLE
HOLE
1
1
+PWR_SRC
H16
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
HOLE
1
1
C5209
C5210
C5211
C5212
C5213
DY DY
2
1
X01 20081215
Roger Request
Thermal Bluetooth MINI CARD
H8
H6 STF237R115H123-GP H7
B B
STF237R117H83-1-GP STF256R89H178-GP
Removed
1
X01 20081208
1
SPR5201
1 SPR5206
SPRING-62-GP
1
DY 34.4CK01.001 34.4A902.001 34.4B417.001
SPRING-63-GP
SPR5202 SPR5207
1 1
DY DY
SPRING-63-GP SPRING-63-GP
SPR5208
SPR5203
1
X01 20090105 1
DY
DY SPRING-24-GP
SPRING-63-GP
SPR5209
1
SPR5204 DY
1 SPRING-71-GP
DY
SPRING-57-GP
A A
<Core Design>
SPR5205
1
DY Wistron Corporation
SPRING-57-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
X02 20090304
Title
Miscellaneous Components
www.vinafix.vn
Size Document Number Rev
Custom
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 52 of 59
5 4 3 2 1
5 4 3 2 1
U5301A 1 OF 7
SSID = VIDEO PCIE_MTX_GRX_P[0..15]
PCIE_MTX_GRX_P[0..15] 13
PCIE_MTX_GRX_N[0..15]
PCIE_MTX_GRX_N[0..15] 13
PCIE_MTX_GRX_P0 AF30 AH30 PCIE_MRX_GTX_R_P0 C5302 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P0
PCIE_MTX_GRX_N0 PCIE_RX0P PCIE_TX0P
AE31 PCIE_RX0N PCIE_TX0N AG31 PCIE_MRX_GTX_R_N0 1 2 PCIE_MRX_GTX_N0
C5304 SCD1U16V2KX-3GP PCIE_MRX_GTX_P[0..15]
PCIE_MRX_GTX_P[0..15] 13
PCIE_MTX_GRX_P1 AE29 AG29 PCIE_MRX_GTX_R_P1 C5301 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P1
PCIE_MTX_GRX_N1 PCIE_RX1P PCIE_TX1P PCIE_MRX_GTX_N[0..15]
AD28 PCIE_RX1N PCIE_TX1N AF28 PCIE_MRX_GTX_R_N1 1 2 PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N[0..15] 13
D C5305 SCD1U16V2KX-3GP D
PCIE_MTX_GRX_P2 AD30 AF27 PCIE_MRX_GTX_R_P2 C5303 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P2
PCIE_MTX_GRX_N2 PCIE_RX2P PCIE_TX2P
AC31 PCIE_RX2N PCIE_TX2N AF26 PCIE_MRX_GTX_R_N2 1 2 PCIE_MRX_GTX_N2
C5306 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P3 AC29 AD27 PCIE_MRX_GTX_R_P3 C5314 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P3
PCIE_MTX_GRX_N3 PCIE_RX3P PCIE_TX3P
AB28 PCIE_RX3N PCIE_TX3N AD26 PCIE_MRX_GTX_R_N3 1 2 PCIE_MRX_GTX_N3
C5316 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P4 AB30 AC25 PCIE_MRX_GTX_R_P4 C5317 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P4
PCIE_RX4P PCIE_TX4P
PCI EXPRESS INTERFACE
PCIE_MTX_GRX_N4 AA31 AB25 PCIE_MRX_GTX_R_N4 1 2 PCIE_MRX_GTX_N4
PCIE_RX4N PCIE_TX4N C5318 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P5 AA29 Y23 PCIE_MRX_GTX_R_P5 C5321 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P5
PCIE_MTX_GRX_N5 PCIE_RX5P PCIE_TX5P PCIE_MRX_GTX_R_N5 PCIE_MRX_GTX_N5
Y28 PCIE_RX5N PCIE_TX5N Y24 1 2
C5322 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P6 Y30 AB27 PCIE_MRX_GTX_R_P6 C5325 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P6
PCIE_MTX_GRX_N6 PCIE_RX6P PCIE_TX6P PCIE_MRX_GTX_R_N6 PCIE_MRX_GTX_N6
W 31 PCIE_RX6N PCIE_TX6N AB26 1 2
C5326 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P7 W 29 Y27 PCIE_MRX_GTX_R_P7 C5329 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P7
PCIE_MTX_GRX_N7 PCIE_RX7P PCIE_TX7P PCIE_MRX_GTX_R_N7 PCIE_MRX_GTX_N7
V28 PCIE_RX7N PCIE_TX7N Y26 1 2
C5330 SCD1U16V2KX-3GP
PCIE_MTX_GRX_P8 V30 W 24 PCIE_MRX_GTX_R_P8 C5331 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P8
PCIE_MTX_GRX_N8 PCIE_RX8P PCIE_TX8P PCIE_MRX_GTX_R_N8 PCIE_MRX_GTX_N8 U5301F 6 OF 7
U31 PCIE_RX8N PCIE_TX8N W 23 1 2
C5332 SCD1U16V2KX-3GP
C C
PCIE_MTX_GRX_P9 U29 V27 PCIE_MRX_GTX_R_P9 C5307 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P9
PCIE_MTX_GRX_N9 PCIE_RX9P PCIE_TX9P PCIE_MRX_GTX_R_N9 PCIE_MRX_GTX_N9 LVDS CONTROL
T28 PCIE_RX9N PCIE_TX9N U26 1 2 VARY_BL AB11 LBKLT_CTL 41
C5308 SCD1U16V2KX-3GP AB12
DIGON LCDVDD_EN 41
PCIE_MTX_GRX_P10 T30 U24 PCIE_MRX_GTX_R_P10 C5309 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P10
PCIE_MTX_GRX_N10 PCIE_RX10P PCIE_TX10P PCIE_MRX_GTX_R_N10 PCIE_MRX_GTX_N10
R31 PCIE_RX10N PCIE_TX10N U23 1 2
1
C5310 SCD1U16V2KX-3GP
AH20 VGA_TXBCLK+ VGA_TXBCLK+ 41 R5304 R5301
PCIE_MTX_GRX_P11 PCIE_MRX_GTX_R_P11 C5311 1 TXCLK_UP_DPF3P
2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P11 VGA_TXBCLK-
10KR2J-3-GP
10KR2J-3-GP
R29 PCIE_RX11P PCIE_TX11P T26 TXCLK_UN_DPF3N AJ19 VGA_TXBCLK- 41
PCIE_MTX_GRX_N11 P28 T27 PCIE_MRX_GTX_R_N11 1 2 PCIE_MRX_GTX_N11
PCIE_RX11N PCIE_TX11N C5312 SCD1U16V2KX-3GP VGA_TXBOUT0+
AL21 VGA_TXBOUT0+ 41
2
TXOUT_U0P_DPF2P VGA_TXBOUT0-
TXOUT_U0N_DPF2N AK20 VGA_TXBOUT0- 41
PCIE_MTX_GRX_P12 P30 T24 PCIE_MRX_GTX_R_P12 C5313 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P12
PCIE_MTX_GRX_N12 PCIE_RX12P PCIE_TX12P PCIE_MRX_GTX_R_N12 PCIE_MRX_GTX_N12 VGA_TXBOUT1+
N31 PCIE_RX12N PCIE_TX12N T23 1 2 TXOUT_U1P_DPF1P AH22 VGA_TXBOUT1+ 41
C5315 SCD1U16V2KX-3GP AJ21 VGA_TXBOUT1- VGA_TXBOUT1- 41
TXOUT_U1N_DPF1N
PCIE_MTX_GRX_P13 N29 P27 PCIE_MRX_GTX_R_P13 C5319 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P13 AL23 VGA_TXBOUT2+ VGA_TXBOUT2+ 41
PCIE_MTX_GRX_N13 PCIE_RX13P PCIE_TX13P PCIE_MRX_GTX_R_N13 PCIE_MRX_GTX_N13 TXOUT_U2P_DPF0P VGA_TXBOUT2-
M28 PCIE_RX13N PCIE_TX13N P26 1 2 TXOUT_U2N_DPF0N AK22 VGA_TXBOUT2- 41
C5320 SCD1U16V2KX-3GP
TXOUT_U3P AK24
PCIE_MTX_GRX_P14 M30 P24 PCIE_MRX_GTX_R_P14 C5323 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P14 AJ23
PCIE_MTX_GRX_N14 PCIE_RX14P PCIE_TX14P PCIE_MRX_GTX_R_N14 PCIE_MRX_GTX_N14 TXOUT_U3N
L31 PCIE_RX14N PCIE_TX14N P23 1 2
C5324 SCD1U16V2KX-3GP
LVTMDP
PCIE_MTX_GRX_P15 L29 M27 PCIE_MRX_GTX_R_P15 C5327 1 2 SCD1U16V2KX-3GP PCIE_MRX_GTX_P15
PCIE_MTX_GRX_N15 PCIE_RX15P PCIE_TX15P PCIE_MRX_GTX_R_N15 PCIE_MRX_GTX_N15 VGA_TXACLK+
K30 PCIE_RX15N PCIE_TX15N N26 1 2 TXCLK_LP_DPE3P AL15 VGA_TXACLK+ 41
C5328 SCD1U16V2KX-3GP AK14 VGA_TXACLK- VGA_TXACLK- 41
TXCLK_LN_DPE3N
AH16 VGA_TXAOUT0+ VGA_TXAOUT0+ 41
CLOCK TXOUT_L0P_DPE2P VGA_TXAOUT0-
B
TXOUT_L0N_DPE2N AJ15 VGA_TXAOUT0- 41 B
CLK_PCIE_VGA AK30
7 CLK_PCIE_VGA PCIE_REFCLKP
CLK_PCIE_VGA# AK32 AL17 VGA_TXAOUT1+ VGA_TXAOUT1+ 41
7 CLK_PCIE_VGA# PCIE_REFCLKN TXOUT_L1P_DPE1P
AK16 VGA_TXAOUT1- VGA_TXAOUT1- 41
TXOUT_L1N_DPE1N
CALIBRATION AH18 VGA_TXAOUT2+
TXOUT_L2P_DPE0P VGA_TXAOUT2+ 41
L9 Y22 PCIE_CALRP R5302 1 2 1K27R2F-L-GP AJ17 VGA_TXAOUT2- VGA_TXAOUT2- 41
NC#L9 PCIE_CALRP TXOUT_L2N_DPE0N
N9 NC#N9
N10 AA22 PCIE_CALRN R5303 1 2 2KR2F-3-GP +1.1V_RUN AL19
NC_PW RGOOD PCIE_CALRN TXOUT_L3P
TXOUT_L3N AK18
PLTRST_DELAY# AL27
20,26 PLTRST_DELAY# PERSTB
M92-S2-GP M92-S2-GP
R5305 1 2
19 PLTRST_ICH_DELAY# DY
0R2J-2-GP
X01 20081208
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA-PCIE/LVDS(1/4)
www.vinafix.vn
Size Document Number Rev
Custom
ALBA Discrete SB
Date: Monday, March 23, 2009 Sheet 53 of 59
5 4 3 2 1
5 4 3 2 1
U5301B 2 OF 7
SSID = VIDEO
AF2
TXCAP_DPA3P
AF4
TXCAM_DPA3N
+DPLL_PVDD AG3
L5405 MUTI GFX TX0P_DPA2P
AG5
DPA TX0M_DPA2N
+1.8V_RUN 1 2
AH3
BLM15BD121SN1D-GP TX1P_DPA1P
AH1
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
TX1M_DPA1N
C5401
C5406
C5418
C5419
SCD01U16V2KX-3GP
1
1
AA1 AK3
DVPCNTL_MVP_0 TX2P_DPA0P
Y4 AK1
DVPCNTL_MVP_1 TX2M_DPA0N
AC7
2
DVPCNTL_0
Y2 AK5
D DVPCNTL_1 TXCBP_DPB3P D
U5 AM3
DVPCNTL_2 TXCBM_DPB3N
U1
DVPCLK
Y7 AK6
DVPDATA_0 TX3P_DPB2P
V2 AM5
DVPDATA_1 DPB TX3M_DPB2N
Y8
+DPLL_VDDC DVPDATA_2
L5403 V4 AJ7
DVPDATA_3 TX4P_DPB1P
AB7 AH6
DVPDATA_4 TX4M_DPB1N
+1.1V_RUN 1 2 W1
DVPDATA_5
AB8 AK8
BLM15BD121SN1D-GP DVPDATA_6 TX5P_DPB0P +DAC1_AVDD +1.8V_RUN
W3 AL7
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
DVPDATA_7 TX5M_DPB0N
C5407
C5408
C5409
AB9
SCD01U16V2KX-3GP
DVPDATA_8
1
L5401 1
C5424
W5 2
DVPDATA_9 BLM15BD121SN1D-GP
C5423
C5403
C5402
C5417
AC6
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
SC4D7U6D3V5KX-3GP
DVPDATA_10
1
2 W6
2
DVPDATA_11
AD7
DVPDATA_12
AA3
2
DVPDATA_13
AC8
DVPDATA_14
AA5
DVPDATA_15
AE8
DVPDATA_16
AA6
DVPDATA_17
AE9
DVPDATA_18
AB4
DVPDATA_19 +DAC1_VDD1DI +1.8V_RUN
56 DVPDATA20 AD9
DVPDATA_20
56 DVPDATA21 AB2
DVPDATA_21 L5404 1
56 DVPDATA22 AC10 2
+3.3V_DELAY DVPDATA_22 BLM15BD121SN1D-GP
C5422
C5421
C5420
AC5
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
56 DVPDATA23 DVPDATA_23
1
2
2
2
R5404
4K7R2F-GP DY DYR5403
4K7R2F-GP
I2C
0R2J-2-GP
1
R5419 1
41 LDDC_CLK
R5420 1 DY 2
2
R1
R3
SCL
41 LDDC_DATA DY SDA
C 0R2J-2-GP AM26 M_RED M_RED 42 C
GENERAL PURPOSE I/O R R5422
AK26 1 2 150R2F-1-GP
RB
+3.3V_DELAY 2 1 R5412 VGA_CLK_REQ#
56 GPIO_VGA_00 U6
10KR2J-3-GP GPIO_0 M_GREEN
56 GPIO_VGA_01 U10 AL25 M_GREEN 42
GPIO_1 G R5423
56 GPIO_VGA_02 T10 AJ25 1 2 150R2F-1-GP
GPIO_2 GB
U8
GPIO_3_SMBDATA M_BLUE
U7 AH24 M_BLUE 42
GPIO_4_SMBCLK B R5424
56 GPIO_VGA_05 T9 AG25 1 2 150R2F-1-GP
TP5406 GPIO_5_AC_BATT DAC1 BB
1 T8
PANEL_BKEN GPIO_6
26 PANEL_BKEN 1 2 R5417 T7 AH26 VGA_HSYNC 42,56
0R2J-2-GP GPIO_7_BLON HSYNC
56 GPIO_VGA_08 P10 AJ27 VGA_VSYNC 42,56
GPIO_8_ROMSO VSYNC
56 GPIO_VGA_09 P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK (Placed between this pin and AVSSQ)
N6 AD22 VGA_RSET 1 2
56 GPIO_VGA_11 GPIO_11 RSET
N5 R5421 499R2F-2-GP
56 GPIO_VGA_12 GPIO_12
6
56 GPIO_VGA_13 N3 70mA AG24 +DAC1_AVDD
GPIO_13 AVDD
1
+DAC2_VDD2DI +1.8V_RUN
Q5402 R5427
GM 20090310 Y9
GPIO_14_HPD2 AVSSQ
AE22
DY 39 PWRCNTL_0 N1
GPIO_15_PWRCNTL_0 40mA
2N7002SPT 10KR2J-3-GP TP5414 1CLK_VGA_27M_SS M4 45mA AE23 +DAC1_VDD1DI 1 2
GPIO_16_SSIN VDD1DI
1 VGA_THERM#
C5427
C5426
C5425
R6 AD23
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
GPIO_17_THERMAL_INT VSS1DI
1
TP5402 TP5401 R5414 0R2J-2-GP
1 W10
DY DY DY
2
THERMTRIP_VGA GPIO_18_HPD3
M2
1
GPIO_19_CTF
39 PWRCNTL_1 P8 AM12
2
R5405 1 GPIO_20_PWRCNTL_1 R2
2 P7 AK12
10KR2J-3-GP GPIO_21_BB_EN R2B
56 GPIO_VGA_22 N8
VGA_CLK_REQ# GPIO_22_ROMCSB
N7 AL11
GPIO_23_CLKREQB G2 +3.3V_DELAY
8,11,18,26,30 H_THRMTRIP# T11 AJ11
GPIO_29_DRM_0 G2B
GPIO_30_DRM_1 GND
26 THERMTRIP_VGA# R11
AK10
JTAG_TRSTB B2
26 THERMTRIP_VGA_GATE L6 AL9
JTAG_TRSTB B2B +DAC2_A2VDD
1 L5
TP5408 JTAG_TDI
1 L3 65mA
1KR2J-1-GP
D
JTAG_TCK
1
TP5407 1 L1 AH12 1 2
Q5401 TP5409 JTAG_TMS C
R5411
C5413
C5411
C5410
C5412
1 K4 AM10
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
SC4D7U6D3V5KX-3GP
JTAG_TDO Y
1
2N7002-7F-GP JTAG_TESTEN TP5410 AF24 AJ9 R5415 0R2J-2-GP
TESTEN COMP DY DY DY DY
X01 20081215 G
TP5411 1 AB13 DAC2
2
2
TP5413 GENERICA
1 W8 AL13 DAC2_HSYNC 56
S
B GENERICB H2SYNC B
W9 AJ13 DAC2_VSYNC 56
+1.8V_RUN GENERICC V2SYNC
W7
1KR2J-1-GP
GENERICD
1
1 AD10
TP5412 GENERICE_HPD4
R5410
40mA AD19 +DAC2_VDD2DI
VDD2DI
1
1 AC14 AC19
R5408 TP5403 HPD1 VSS2DI
499R2F-2-GP +DAC2_A2VDDQ +1.8V_RUN
2
VREFG VOLTAGE DIVIDER IS AE20 1mA
(VREFG = VDDR4,5(1.8V) / 3 = .6V)
65mA A2VDD +DAC2_A2VDD
L5406 1 2
2
+3.3V_DELAY BLM15BD121SN1D-GP
C5415
C5414
1mA AE17 +DAC2_A2VDDQ
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
A2VDDQ
1
VGA_VREFG AC16
VREFG
AE19
A2VSSQ
1
2
2
2
R5409 C5405
2K2R2J-2-GP
249R2F-GP SCD1U16V2KX-3GP VGA_R2SET
R5402
AG13 1 2
2
R2SET R5406 715R2F-GP R5401
2K2R2J-2-GP
2
GM 20090318
1
+DPLL_PVDD DDC/AUX AE6 R5416 1 2 0R2J-2-GP
DDC1CLK LDDC_CLK 41
PLL/CLOCK AE5 R5418 1 2 0R2J-2-GP
DDC1DATA LDDC_DATA 41
X5401 AF14 120mA
DPLL_PVDD
1
+DPLL_VDDC AE14 AD2
R5426 R5428 DPLL_PVSS AUX1P
1 2 GPU_XTALIN 3 2
GM AUX1N
AD4
R5413 0R2J-2-GP
7 CLK_VGA_27M_NSS PM 1MR2J-1-GP
M92CRT_DDCCLK DDC_CLK_CON
AD14
DPLL_VDDC 300mA DDC2CLK
AC11 1
DY 2
1
124R2F-U-GP AC13 M92CRT_DDCDATA 1 2 DDC_DATA_CON
DY
2
R5425 DDC2DATA
PM 150R2F-1-GP R5407 0R2J-2-GP
4
GM 1
1 2 GPU_XTALOUT_1
AM28
AK28
XTALIN AUX2P
AD13
AD11
R5429 GM 0R2J-2-GP XTALOUT AUX2N
2
XTAL-25MHZ-130-GP C5429
SC12P50V3JN-GP GM GM C5428
SC12P50V3JN-GP AB22
NC#AB22
AC22
2
NC#AC22 +3.3V_DELAY
GPU_XTALOUT T4
DPLUS THERMAL
28 VGA_THERMDA T2
DMINUS RN5401
A
Crystal Main 82.30034.651 28 VGA_THERMDC DDCAUX5P
AE16
AD16 3 2 A
L5402 DDCAUX5N
Second 82.30034.641 TP5405 1 FAN_PWM
+TSVDD
R5
TS_FDO +3.3V_DELAY
4 1
+1.8V_RUN 1 2 AD17 20mA AC1
TSVDD DDC6CLK SRN2K2J-1-GP
AC17 AC3
BLM15BD121SN1D-GP TSVSS DDC6DATA
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
<Core Design>
C5404
AD20
NC_DDCAUX7P
1
U5401
C5416
AC20
NC_DDCAUX7N
M92CRT_DDCDATA 4 3 DDC_DATA_CON
DDC_DATA_CON 42
Wistron Corporation
2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M92-S2-GP Taipei Hsien 221, Taiwan, R.O.C.
5 2
DDC_CLK_CON 6 1 M92CRT_DDCCLK Title
42 DDC_CLK_CON
VGA-TV/CRT/DP PORT
www.vinafix.vn
2N7002SPT
5V @ CRT side Size Document Number Rev
C SB
ALBA Discrete
Date: Monday, March 23, 2009 Sheet 54 of 59
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO U5301E 5 OF 7
+1.8V_RUN +1.8V_RUN
AA27 A3
PCIE_VSS GND
AB24 A30
PCIE_VSS GND
AB32 AA13
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U16V2KX-3GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
PCIE_VSS GND
C5513
C5514
C5515
C5517
AC24 AA16
SC10U10V5KX-2GP
SC22U6D3V5MX-2GP
1
PCIE_VSS GND
C5511
C5512
C5516
C55024
C55025
C55026
C55016
AC26 AB10
PCIE_VSS GND
1
AC27
AD25
PCIE_VSS GND
AB15
AB6
DY DY
2
PCIE_VSS GND +1.8V_RUN
AD32 AC9
2
PCIE_VSS GND
AE27 AD6
PCIE_VSS GND
AF32 AD8
PCIE_VSS GND
AG27 AE7
PCIE_VSS GND
AH32 AG12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
PCIE_VSS GND
C5540
C5539
C5538
C5541
C5542
C5543
C5506
K28 AH10
1
PCIE_VSS GND U5301D 4 OF 7
K32 AH28
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PCIE_VSS GND
D L27 B10 D
PCIE_VSS GND
1
MEM I/O
C55017
C55018
C55019
C55020
C55021
C55022
C55023
M32 B12
2
PCIE_VSS GND PCIE
N25 B14
PCIE_VSS GND
N27 B16 H13 AB23
2
PCIE_VSS GND VDDR1 PCIE_VDDR
P25 B18 H16 AC23
PCIE_VSS GND VDDR1 PCIE_VDDR
P32 B20 H19 AD24
PCIE_VSS GND VDDR1 PCIE_VDDR
R27 B22 J10 AE24
500mA
PCIE_VSS GND VDDR1 PCIE_VDDR
T25 B24 J23 AE25
PCIE_VSS GND VDDR1 PCIE_VDDR
T32 B26 J24 AE26
PCIE_VSS GND VDDR1 PCIE_VDDR
U25 B6 J9 AF25
PCIE_VSS GND VDDR1 PCIE_VDDR +1.1V_RUN
U27 B8 K10 AG26
PCIE_VSS GND VDDR1 PCIE_VDDR
2.2A
C5503
C5504
C5505
C5518
C5519
V32 C1 K23
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
1
PCIE_VSS GND VDDR1
W25 C32 K24
PCIE_VSS GND VDDR1
W26 E28 K9 L23
PCIE_VSS GND VDDR1 PCIE_VDDC
W27 F10 L11 L24
2
PCIE_VSS GND VDDR1 PCIE_VDDC
Y25 F12 L12 L25
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
PCIE_VSS GND VDDR1 PCIE_VDDC
C5552
C5551
C5548
C5547
C5544
C5545
C5549
C5550
C5546
Y32 F14 L13 L26
1
PCIE_VSS GND VDDR1 PCIE_VDDC
F16 L20 M22
GND
F18 L21
VDDR1 PCIE_VDDC
N22
DY DY
GND VDDR1 2A PCIE_VDDC
F2 L22 N23
2
GND +1.8V_RUN VDDR1 PCIE_VDDC
F20 L5504 N24
GND PCIE_VDDC
M6 F22 R22
GND GND +VDD_CT PCIE_VDDC
N11 F24 1 2 T22
GND GND BLM15BD121SN1D-GP LEVEL PCIE_VDDC
N12 F26 U22
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
GND GND TRANSLATION PCIE_VDDC
N13 F6 300mA V22
1
GND GND PCIE_VDDC
C5522
C5520
C5521
C5509
C5510
N16 F8 AA20
N18
GND
GND GND
G10 AA21
VDD_CT
136mA
GND GND VDD_CT
N21 G27 AB20 AA15
2
GND GND VDD_CT CORE VDDC
P6 G31 AB21 N15
GND GND VDD_CT VDDC +VCC_GFX_CORE
P9 G8 N17
GND GND VDDC
R12 H14 R13
GND GND I/O VDDC
R15 H17 R16
GND GND VDDC
R17 H2 AA17 R18
GND GND +3.3V_DELAY VDDR3 VDDC
R20 H20 AA18 R21
60mA
GND GND VDDR3 VDDC
T13 H6 AB17 T12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GND GND VDDR3 VDDC
C5555
C5554
C5553
C5576
C5577
C5563
C5561
C5562
C5565
C5564
C5558
C5556
C5557
C5559
C5560
T16 J27 AB18 T15
GND GND VDDR3 VDDC
1
T18 J31 T17
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
GND GND VDDC
T21 K11 T20
GND GND VDDC
1
C5523
C5524
C5525
C5526
T6 K2 U11 U13
2
GND GND VDDR5 VDDC
U15 K22 U12 U16
170mA
GND GND VDDR5 VDDC
U17 K6 V11 U18
2
GND GND VDDR5 VDDC
C U20 V12 U21 C
GND VDDR5 VDDC
POWER
U3 V15
GND VDDC
U9 V17
GND VDDC
V13 AA11 V20
GND +1.8V_RUN VDDR4 VDDC
V16 AA12 V21
170mA
GND VDDR4 VDDC
V18 Y11 Y13
GND VDDR4 VDDC
V6 Y12 Y16
GND VDDR4 VDDC +VCC_GFX_CORE
Y10 A32 Y18
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
GND VSS_MECH +1.8V_RUN VDDC
C5527
Y15 AM1 Y21
1
GND VSS_MECH MEM CLK VDDC
C5528
C5529
C5530
Y17 AM32 L5506
GND VSS_MECH +VDDRHA
Y20 1 2 L17
GND BLM15BD121SN1D-GP VDDRHA
Y6
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2
2
GND
300mA L16 ISOLATED
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
1
1
VSSRHA CORE I/O
C5531
C5532
C5569
C5566
C5567
C5570
C5571
C5568
1
1
M13
M92-S2-GP PLL VDDCI
M15
2
VDDCI
+PCIE_PVDD AM30 68mA M16
2
PCIE_PVDD VDDCI
M17
VDDCI
M18
+1.8V_RUN +PCIE_PVDD VDDCI
L5503 L8 M20
NC_MPV18 VDDCI
M21
VDDCI
1 2 N20
BLM15BD121SN1D-GP VDDCI
H7
NC_SPV18
300mA
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SCD1U16V2KX-3GP
C5501
C5533
C5507
C5508
H8
SCD01U16V2KX-3GP
+SPV10 SPV10 35mA
1
1
+VCC_GFX_CORE
J7
SPVSS
2
2
+VCC_GFX_CORE
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
BACK BIAS
C5574
C5575
C5573
C5572
M11
BBP#1
1
144mA
M12
BBP#2 DY DY
2
M92-S2-GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
B +1.8V_RUN B
+1.8V_RUN
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
L5510 R5506
1 2 +DPE_VDD18_R 1 2 U5301G 7 of 7 1 2
R5501 0R3-0-U-GP BLM15BD121SN1D-GP DY +VCC_GFX_CORE +SPV10
C55013
C55012
C55014
C5585
C5583
C5584
L5507
1
1
300mA DP E/F POWER DP A/B POWER
DY DY DY 0R2J-2-GP
1 2
+DPE_VDD18 AG15 AE11 +DPA_VDD18 BLM15BD121SN1D-GP
200mA
2
2
DPE_VDD18 NC_DPA_VDD18
AG16 AF11 300mA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
DPE_VDD18 NC_DPA_VDD18
C5534
C5536
C5535
C5537
SCD01U16V2KX-3GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
1
+1.1V_RUN +1.1V_RUN
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R5507
L5502
2 1 +DPE_VDD10 AG20 AF6 +DPA_VDD10 1 2
170mA
200mA
2
DPE_VDD10 DPA_VDD10
C5595
C5596
C5597
C5588
C5586
C5587
BLM18PG300SN-GP AG21 AF7
DPE_VDD10 DPA_VDD10
1
1
1A DY DY DY 0R2J-2-GP
AG14 AE1
2
2
DPE_VSSR DPA_VSSR
AH14 AE3
DPE_VSSR DPA_VSSR +1.8V_RUN
L5508 AM14 AG1 R5508
DPE_VSSR DPA_VSSR
AM16 AG6
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
DPE_VSSR DPA_VSSR
1 2 AM18 AH5 1 2
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
BLM15BD121SN1D-GP DPE_VSSR DPA_VSSR
C55003
C55002
C55004
C5591
C5589
C5590
1
1
300mA DY DY DY 0R2J-2-GP
+DPF_VDD18 AF16 AE13 +DPB_VDD18
200mA
2
2
DPF_VDD18 NC_DPB_VDD18
AG17 AF13
DPF_VDD18 NC_DPB_VDD18
+1.1V_RUN +1.1V_RUN
R5509
L5501
2 1 +DPF_VDD10 AF22 AF8 +DPB_VDD10 1 2
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
170mA
200mA
DPF_VDD10 DPB_VDD10
C5594
C5592
C5593
BLM18PG300SN-GP
C55010
C55008
C55011
AG22 AF9
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
DPF_VDD10 DPB_VDD10
1
1
1A DY DY DY 0R2J-2-GP
AF23 AF10
2
2
DPF_VSSR DPB_VSSR
AG23 AG9
DPF_VSSR DPB_VSSR
AM20 AH8
DPF_VSSR DPB_VSSR
AM22 AM6
DPF_VSSR DPB_VSSR
AM24 AM8
DPF_VSSR DPB_VSSR
+1.8V_RUN +1.8V_RUN
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
A L5505 R5510 A
M92 Version 1 2 2 R5505 1 AF17 AE10 1 R5504 2 1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DPEF_CALR DPAB_CALR
C5599
C5598
C5579
C5578
C5502
BLM15BD121SN1D-GP
C55001
1
Part A11 A12 300mA 150R2F-1-GP 150R2F-1-GP
20mA 20mA DY DY DY 0R2J-2-GP
R5401 No staff Staff +DPE_PVDD AG18 DP PLL POWER AG8 +DPA_PVDD
2
DPE_PVDD DPA_PVDD <Core Design>
AF19 AG7
Q5106 Staff No staff DPE_PVSS DPA_PVSS
+1.8V_RUN +1.8V_RUN
R5402 Staff No staff
L5509
+DPF_PVDD
20mA
+DPB_PVDD
R5511
Wistron Corporation
1 2 AG19 AG10 1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
NC_DPF_PVDD DPB_PVDD
R5403 No staff No staff
C5582
C5580
C5581
BLM15BD121SN1D-GP
C55006
C55005
C55007
AF20 AG11 Taipei Hsien 221, Taiwan, R.O.C.
1
NC_DPF_PVSS DPB_PVSS
300mA DY DY DY 0R2J-2-GP
Q5107 Staff No staff Title
2
C5384 No staff No staff M92-S2-GP
VGA-POWER/GND(3/4)
Size Document Number Rev
www.vinafix.vn
A2 ALBA Discrete SB
Date: Monday, March 23, 2009 Sheet 55 of 59
5 4 3 2 1
5 4 3 2 1
U5301C 3 OF 7 +3.3V_DELAY
SSID = VIDEO 57,58 MDA[0..63]
MAA[0..12] 57,58
ATI RESERVED CONFIGURATION STRAPS
MDA0 K27 K17 MAA0 R5617 1 2 10KR2J-3-GP ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
MDA1 J29
DQA_0 MAA_0
J20 MAA1
54 GPIO_VGA_00 DY THEY MUST NOT CONFLICT DURING RESE
MDA2 DQA_1 MAA_1 MAA2
H30 H23
MDA3 DQA_2 MAA_2 MAA3 R5602 1 2 10KR2J-3-GP
MDA4
H32
G29
DQA_3 MAA_3
G23
G24 MAA4 54 GPIO_VGA_01 DY GPIO3 , H2SYNC , V2SYNC
MEMORY INTERFACE
MDA5 DQA_4 MAA_4 MAA5
F28 H24
MDA6 DQA_5 MAA_5 MAA6 R5601 1 PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
2 10KR2J-3-GP
MDA7
F32
F30
DQA_6 MAA_6
J19
K19 MAA7
54 GPIO_VGA_02 DY THEY MUST NOT CONFLICT DURING RESET
MDA8 DQA_7 MAA_7 MAA8
C30 J14
MDA9 DQA_8 MAA_8 MAA9 R5604 1
F27 K14 2 10KR2J-3-GP
MDA10 A28
DQA_9 MAA_9
J11 MAA10 54 GPIO_VGA_05 DY
MDA11 DQA_10 MAA_10 MAA11
C28
DQA_11 MAA_11
J13 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDA12 E27 H11 MAA12 R5603 1 2 10KR2J-3-GP
MDA13 G26
DQA_12 MAA_12
G11 BA2
54 GPIO_VGA_08 DY Size of the primary
DQA_13 MAA_13/BA2 BA2 57,58
MDA14 D26 J16 BA0 GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
MDA15 DQA_14 MAA_14/BA0 BA1 BA0 57,58
R5605
memory apertures
F25 L15 1 2 10KR2J-3-GP
D
MDA16 A25
DQA_15 MAA_15/BA1 BA1 57,58 54 GPIO_VGA_09 DY D
MDA17 DQA_16 DQMA#0
C25
DQA_17 DQMA_0
E32 DQMA#0 57 128MB x000 M25P05A 0100
MDA18 E25 E30 DQMA#1 R5606 1 2 10KR2J-3-GP ST
MDA19 D24
DQA_18 DQMA_1
A21 DQMA#2 DQMA#1 57 54 GPIO_VGA_11 V 256MB x001 M25P10A 0101
MDA20 DQA_19 DQMA_2 DQMA#3
DQMA#2 57 64MB x010 Microelectronics M25P20 0101
E23 C21 DQMA#3 57
MDA21 DQA_20 DQMA_3 DQMA#4 R5607 2 10KR2J-3-GP 32MB x M25P40 0101
MDA22
F23
D22
DQA_21 DQMA_4
E13
D12 DQMA#5
DQMA#4 58 54 GPIO_VGA_12 1
DY
MDA23 F21
DQA_22 DQMA_5
E3 DQMA#6 DQMA#5 58 512MB x M25P80 0101
DQA_23 DQMA_6 DQMA#6 58 1GB x
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) MDA24 E21 F4 DQMA#7 R5608 1 2 10KR2J-3-GP
( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) MDA25 D20
DQA_24 DQMA_7 DQMA#7 58 54 GPIO_VGA_13 DY 2GB x Chingis Pm25LV512A 0100
MDA26 DQA_25 QSA0
F19 H28 QSA0 57 (formerly PMC)
MDA27 A19
DQA_26 RDQSA_0
C27 QSA1 R5609 1 2 10KR2J-3-GP
4GB x Pm25LV010A 0101
MDA28 D18
DQA_27 RDQSA_1
A23 QSA2
QSA1 57 54 GPIO_VGA_22 DY
DQA_28 RDQSA_2 QSA2 57
DIVIDER RESISTORS DDR2 DDR3 MDA29 F17 E19 QSA3
DQA_29 RDQSA_3 QSA3 57
MDA30 A17 E15 QSA4 CLKA0 R5612 1 2 10KR2J-3-GP
MDA31 C17
DQA_30 RDQSA_4
D10 QSA5
QSA4 58 54 DAC2_VSYNC DY
DQA_31 RDQSA_5 QSA5 58
MVREF TO 1.8V 100R 40.2R MDA32 E17 D6 QSA6 CLKA0#
DQA_32 RDQSA_6 QSA6 58
MDA33 QSA7 R5613 2 10KR2J-3-GP STRAPS PIN DESCRIPTION
MDA34
D16
F15
DQA_33 RDQSA_7
G5 QSA7 58 54 DAC2_HSYNC 1
DY
2
MDA35 DQA_34 QSA#0
MVREF TO GND 100R 100R A15
DQA_35 WDQSA_0
H27 QSA#0 57 Tansmitter Power Savings Enable
MDA36 D14 A27 QSA#1 R5625 R5618 TX_PWRS_ENB GPIO0 V 0= 50% Tx output swing
MDA37 DQA_36 WDQSA_1 QSA#2 QSA#1 57
F13 C23 QSA#2 57 56R2J-4-GP 56R2J-4-GP 1= Full Tx output swing
MDA38 DQA_37 WDQSA_2 QSA#3
A13
DQA_38 WDQSA_3
C19 QSA#3 57 (Internal PD)
MDA39 C13 C15 QSA#4
QSA#4 58
1
MDA40 DQA_39 WDQSA_4 QSA#5
E11
DQA_40 WDQSA_5
E9 QSA#5 58 Transmitter De-emphasis Enable
MDA41 A11 C5 QSA#6 TX_DEEMPH_EN GPIO1 V 0= Tx de-emphasis disabled
QSA#6 58
1
MDA42 DQA_41 WDQSA_6 QSA#7
C11 H4 QSA#7 58 1= Tx de-emphasis enabled
MDA43 DQA_42 WDQSA_7
F11
DQA_43
C5603 (Internal PD)
MDA44 A9 L18 ODTA0 SC470P50V2KX-3GP
ODTA0 57
2
MDA45 DQA_44 ODTA0 ODTA1
C9
DQA_45 ODTA1
K16 ODTA1 58 V 0 = Advertises the PCI-E device
MDA46 F9 R5610 1 2 10KR2J-3-GP BIF_GEN2_EN_A GPIO2 as 2.5GT/s
+1.8V_RUN DQA_46 42,54 VGA_VSYNC
MDA47 D8 H26 CLKA0
MDA48 DQA_47 CLKA0 CLKA0#
CLKA0 57
R5611
1 = Advertises the PCI-E device
E7 H25 CLKA0# 57 42,54 VGA_HSYNC 1 2 10KR2J-3-GP
MDA49 DQA_48 CLKA0B as 5GT/s
MDA50
A7
C7
DQA_49
G9 CLKA1
Close to VRAM U5701 side
DQA_50 CLKA1 CLKA1 58
1
R5619 MDA51 F7 H9 CLKA1#
DQA_51 CLKA1B CLKA1# 58
100R2F-L1-GP-U MDA52 A5
MDA53 DQA_52 RASA0#
E5
DQA_53 RASA0B
G22 RASA0# 57 BIF_CLK_PM_EN GPIO8 V 0= Disable CLKREQ#power management capability
MDA54 C3 G17 RASA1# 1= Enable CLKREQ# power management capability
DQA_54 RASA1B RASA1# 58
MDA55 E1 CLKA1
2
MDA56 DQA_55 CASA0#
C G7 G19 CASA0# 57
C
MDA57 DQA_56 CASA0B CASA1# CLKA1#
G6 G16 CASA1# 58
DQA_57 CASA1B
MDA58 ROMIDCFG[3:0] if BIOS_ROM_EN=1,then Config[3:0]
C5605
C5602
G1
SCD1U16V2KX-3GP
SCD01U16V2KX-3GP
MDA59 DQA_58 CSA0_0#
G3 H22 CSA0_0# 57 GPIO[13,12,11] defines the ROM type
1
MDA60 DQA_59 CSA0B_0 CSA0_1#_R
R5620 J6
DQA_60 CSA0B_1
J22 (Internal PD) if BIOS_ROM_EN=0,then Config[3:0]
2
+1.8V_RUN 100R2F-L1-GP-U MDA61 J1 TP5602
MDA62 DQA_61 CSA1_0# R5626 R5627 defines the primary memory apeture size
J3 G13 CSA1_0# 58
2
MDA63 DQA_62 CSA1B_0 CSA1_1#_R
J5 K13 56R2J-4-GP 56R2J-4-GP
DQA_63 CSA1B_1 TP5603
2
1
R5621 MVREFD K26 K20 CKEA0 Enable external BIOS ROM device
CKEA0 57
1
MVREFS MVREFDA CKEA0 CKEA1
100R2F-L1-GP-U J26
MVREFSA CKEA1
J17 CKEA1 58 BIOS_ROM_EN GPIO_22_ROMCSB V 0= Disable external BIOS ROM device
1= Enable external BIOS ROM device
1
+1.8V_RUN R5628 1 2 243R2F-2-GP WEA0# (Internal PD)
R5632 1 DY 2 243R2F-2-GP
J25
K7
NC_MEM_CALRN0 WEA0B
G25
H10 WEA1#
WEA0# 57
C5606
DY WEA1# 58
2
NC_MEM_CALRN1 WEA1B SC470P50V2KX-3GP AUD[1:0]
2
R5649 1 2 243R2F-2-GP J8
MEM_CALRP1 RSVD#1
AB16 AUD[1] VGA_HSYNC V 00:No audio function
C5604
C5601
R5643 1 2 243R2F-2-GP K25 G14
DY
SCD01U16V2KX-3GP
SCD1U16V2KX-3GP
NC_MEM_CALRP0 RSVD#2 AUD[0] 01:Audio for DisplayPort and HDMI
1
RSVD#3
G20 VGA_VSYNC
R5622 L10 ( if adapter is detected)
DRAM_RST 10:Audio for DisplayPort only
100R2F-L1-GP-U (Internal PD)
2
K8
L7
CLKTESTA Close to VRAM U5801 side 11:Audio for both DisplayPort and HDMI
2
CLKTESTB
1
1
R5624
R5623
4K7R2J-2-GP
4K7R2J-2-GP
M92-S2-GP
STRAPS PIN DESCRIPTION
2
MEM_TYPE DVPDATA(23:20) MEMORY TYPE,MAKE AND SIZE INFO
+1.8V_RUN
0000 - gDDR2 ---- ----
(Internal PD) 0001 - gDDR2 64Mx16 HYNIX
V 0010 - gDDR2 64Mx16 SAMSUNG
0011 - gDDR2 32Mx16 HYNIX
R5648 1 10KR2J-3-GP
54 DVPDATA20 VRAM2 0100 - gDDR2 32Mx16 SAMSUNG
R5614 1 2 10KR2J-3-GP
54 DVPDATA21
R5615 10KR2J-3-GP
B 54 DVPDATA22 1
DY 2
B
R5616 1 2 10KR2J-3-GP
54 DVPDATA23 DY
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VGA-MEMORY/STRAPS(4/4)
Size Document Number Rev
www.vinafix.vn
A2 ALBA Discrete SB
Date: Monday, March 23, 2009 Sheet 56 of 60
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
MDA[0..63] 56,58 MDA[0..63] 56,58
U5701 U5702
56,58 BA0 56,58 BA0
BA0 L2 B9 MDA12 BA0 L2 B9 MDA3
56,58 BA1 BA0 DQ15 56,58 BA1 BA0 DQ15
BA1 L3 B1 MDA14 BA1 L3 B1 MDA0
56,58 MAA[0..12] BA1 DQ14 MDA11 56,58 MAA[0..12] BA1 DQ14 MDA2
DQ13 D9 DQ13 D9
D MAA12 MDA15 MAA12 MDA7 D
R2 A12 DQ12 D1 R2 A12 DQ12 D1
MAA11 P7 D3 MDA9 MAA11 P7 D3 MDA1
MAA10 A11 DQ11 MDA10 MAA10 A11 DQ11 MDA4
M2 A10/AP DQ10 D7 M2 A10/AP DQ10 D7
MAA9 P3 C2 MDA13 MAA9 P3 C2 MDA6
A9 DQ9 MDA[0..63] 56,58 A9 DQ9 MDA[0..63] 56,58
MAA8 P8 C8 MDA8 MAA8 P8 C8 MDA5
MAA7 A8 DQ8 MDA31 MAA7 A8 DQ8 MDA16
P2 A7 DQ7 F9 P2 A7 DQ7 F9
MAA6 N7 F1 MDA24 MAA6 N7 F1 MDA21
MAA5 A6 DQ6 MDA29 MAA5 A6 DQ6 MDA18
N3 A5 DQ5 H9 N3 A5 DQ5 H9
MAA4 N8 H1 MDA25 MAA4 N8 H1 MDA23
MAA3 A4 DQ4 MDA27 MAA3 A4 DQ4 MDA20
N2 A3 DQ3 H3 N2 A3 DQ3 H3
MAA2 M7 H7 MDA30 MAA2 M7 H7 MDA19
MAA1 A2 DQ2 MDA26 MAA1 A2 DQ2 MDA22
M3 A1 DQ1 G2 M3 A1 DQ1 G2
MAA0 M8 G8 MDA28 MAA0 M8 G8 MDA17
A0 DQ0 +1.8V_RUN A0 DQ0 +1.8V_RUN
CLKA0# K8 A9 CLKA0# K8 A9
56 CLKA0# CK# VDDQ 56 CLKA0# CK# VDDQ
CLKA0 J8 C1 CLKA0 J8 C1
56 CLKA0 CK VDDQ 56 CLKA0 CK VDDQ
VDDQ C3 VDDQ C3
CKEA0 K2 C7 CKEA0 K2 C7
56 CKEA0 CKE VDDQ 56 CKEA0 CKE VDDQ
VDDQ C9 VDDQ C9
VDDQ E9 VDDQ E9
VDDQ G1 VDDQ G1
CSA0_0# L8 G3 CSA0_0# L8 G3
56 CSA0_0# CS# VDDQ 56 CSA0_0# CS# VDDQ
VDDQ G7 VDDQ G7
WEA0# K3 G9 WEA0# K3 G9
56 WEA0# W E# VDDQ 56 WEA0# W E# VDDQ
RASA0# K7 A1 RASA0# K7 A1
56 RASA0# RAS# VDD 56 RASA0# RAS# VDD
VDD E1 VDD E1
CASA0# L7 J9 CASA0# L7 J9 +1.8V_RUN
56 CASA0# CAS# VDD +1.8V_RUN 56 CASA0# CAS# VDD
C VDD M9 VDD M9 C
DQMA#3 F3 R1 DQMA#2 F3 R1
56 DQMA#3 LDM VDD 56 DQMA#2 LDM VDD
DQMA#1 B3 L5701 DQMA#0 B3 L5702
56 DQMA#1 UDM 56 DQMA#0 UDM
VDDLA1 VDDLA2
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDDL J1 2 1 VDDL J1 2 1
J7 BLM15BD121SN1D-GP J7 BLM15BD121SN1D-GP
VSSDL VSSDL
1
C5701
C5753
C5703
C5702
ODTA0 K9 ODTA0 K9
56 ODTA0 ODT 56 ODTA0 ODT
2
+1.8V_RUN QSA3 F7 +1.8V_RUN QSA2 F7
56 QSA3 LDQS 56 QSA2 LDQS
QSA#3 E8 A7 QSA#2 E8 A7
56 QSA#3 LDQS# VSSQ 56 QSA#2 LDQS# VSSQ
VSSQ B2 VSSQ B2
1
1
VSSQ B8 VSSQ B8
R5703 D2 R5705 D2
4K99R2F-L-GP QSA1 VSSQ 4K99R2F-L-GP QSA0 VSSQ
56 QSA1 B7 UDQS VSSQ D8 56 QSA0 B7 UDQS VSSQ D8
QSA#1 A8 E7 QSA#0 A8 E7
56 QSA#1 UDQS# VSSQ 56 QSA#0 UDQS# VSSQ
F2 F2
2
2
VSSQ VSSQ
VSSQ F8 VSSQ F8
VREFA1 J2 H2 VREFA2 J2 H2
VREF VSSQ VREF VSSQ
VSSQ H8 VSSQ H8
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
A2 NC#A2 A2 NC#A2
1
1
C5751
C5704
E2 NC#E2 VSS A3 E2 NC#E2 VSS A3
1
1
R5704 BA2 L1 E3 R5706 BA2 L1 E3
4K99R2F-L-GP 56,58 BA2 BA2 VSS 4K99R2F-L-GP 56,58 BA2 BA2 VSS
R3 NC#R3 VSS J3 R3 NC#R3 VSS J3
R7 N1 R7 N1
2
2
NC#R7 VSS NC#R7 VSS
R8 P9 R8 P9
2
2
NC#R8 VSS NC#R8 VSS
K4N1G164QE-HC20-GP K4N1G164QE-HC20-GP
+1.8V_RUN
B SC10U6D3V5KX-1GP B
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
64X16 SAMSUNG 72.41164.G0U
C5752
C5716
C5754
C5717
1
1
64X16 HYNIX 72.51G63.A0U
2
2
32X16 SAMSUNG 72.45116.G0U
32X16 HYNIX 72.55162.B0U
+1.8V_RUN
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1
1
C5705
C5706
C5707
C5708
C5709
C5710
C5711
C5712
C5713
C5714
2
+1.8V_RUN
A A
<Core Design>
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Wistron Corporation
1
1
C5715
C5720
C5721
C5722
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
Title
VRAM(1/2)
www.vinafix.vn
Size Document Number Rev
Custom
ALBA Discrete SB
Date: Monday, March 23, 2009 Sheet 57 of 60
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO
MDA[0..63] 56,57
MDA[0..63] 56,57
U5802
56,57 BA0
U5801 BA0 L2 B9 MDA61
56,57 BA0 56,57 BA1 BA0 DQ15
BA0 L2 B9 MDA41 BA1 L3 B1 MDA60
56,57 BA1 BA0 DQ15 56,57 MAA[0..12] BA1 DQ14
BA1 L3 B1 MDA45 D9 MDA62
D 56,57 MAA[0..12] BA1 DQ14 MDA43 MAA12 DQ13 MDA56 D
DQ13 D9 R2 A12 DQ12 D1
MAA12 R2 D1 MDA46 MAA11 P7 D3 MDA63
MAA11 A12 DQ12 MDA47 MAA10 A11 DQ11 MDA58
P7 A11 DQ11 D3 M2 A10/AP DQ10 D7
MAA10 M2 D7 MDA40 MAA9 P3 C2 MDA57
A10/AP DQ10 A9 DQ9 MDA[0..63] 56,57
MAA9 P3 C2 MDA44 MAA8 P8 C8 MDA59
A9 DQ9 MDA[0..63] 56,57 A8 DQ8
MAA8 P8 C8 MDA42 MAA7 P2 F9 MDA33
MAA7 A8 DQ8 MDA49 MAA6 A7 DQ7 MDA38
P2 A7 DQ7 F9 N7 A6 DQ6 F1
MAA6 N7 F1 MDA54 MAA5 N3 H9 MDA32
MAA5 A6 DQ6 MDA51 MAA4 A5 DQ5 MDA37
N3 A5 DQ5 H9 N8 A4 DQ4 H1
MAA4 N8 H1 MDA53 MAA3 N2 H3 MDA36
MAA3 A4 DQ4 MDA52 MAA2 A3 DQ3 MDA35
N2 A3 DQ3 H3 M7 A2 DQ2 H7
MAA2 M7 H7 MDA50 MAA1 M3 G2 MDA39
MAA1 A2 DQ2 MDA55 MAA0 A1 DQ1 MDA34
M3 A1 DQ1 G2 M8 A0 DQ0 G8
MAA0 M8 G8 MDA48 +1.8V_RUN
A0 DQ0 +1.8V_RUN
CLKA1# K8 A9
56 CLKA1# CK# VDDQ
CLKA1# K8 A9 CLKA1 J8 C1
56 CLKA1# CK# VDDQ 56 CLKA1 CK VDDQ
CLKA1 J8 C1 C3
56 CLKA1 CK VDDQ VDDQ
C3 CKEA1 K2 C7
VDDQ 56 CKEA1 CKE VDDQ
CKEA1 K2 C7 C9
56 CKEA1 CKE VDDQ VDDQ
VDDQ C9 VDDQ E9
VDDQ E9 VDDQ G1
G1 CSA1_0# L8 G3
VDDQ 56 CSA1_0# CS# VDDQ
CSA1_0# L8 G3 G7
56 CSA1_0# CS# VDDQ VDDQ
G7 WEA1# K3 G9
VDDQ 56 WEA1# W E# VDDQ
WEA1# K3 G9
56 WEA1# W E# VDDQ RASA1# K7 A1
56 RASA1# RAS# VDD
RASA1# K7 A1 E1
56 RASA1# RAS# VDD VDD +1.8V_RUN
E1 CASA1# L7 J9
VDD +1.8V_RUN 56 CASA1# CAS# VDD
C
CASA1# L7 J9 M9 C
56 CASA1# CAS# VDD VDD
M9 DQMA#4 F3 R1
VDD 56 DQMA#4 LDM VDD
DQMA#6 F3 R1 DQMA#7 B3 L5802
56 DQMA#6 LDM VDD 56 DQMA#7 UDM
DQMA#5 L5801 VDDLA4
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
56 DQMA#5 B3 UDM VDDL J1 2 1
VDDLA3 BLM15BD121SN1D-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
VDDL J1 2 1 VSSDL J7
1
C5804
C5805
J7 BLM15BD121SN1D-GP ODTA1 K9
VSSDL 56 ODTA1 ODT
1
C5802
C5801
ODTA1 K9
56 ODTA1 ODT
2
+1.8V_RUN QSA4 F7
56 QSA4
2
+1.8V_RUN QSA6 QSA#4 LDQS
56 QSA6 F7 LDQS 56 QSA#4 E8 LDQS# VSSQ A7
QSA#6 E8 A7 B2
56 QSA#6 LDQS# VSSQ VSSQ
1
VSSQ B2 VSSQ B8
1
B8 R5805 D2
R5803 VSSQ 4K99R2F-L-GP QSA7 VSSQ
VSSQ D2 56 QSA7 B7 UDQS VSSQ D8
4K99R2F-L-GP QSA5 B7 D8 QSA#7 A8 E7
56 QSA5 UDQS VSSQ 56 QSA#7 UDQS# VSSQ
QSA#5 A8 E7 F2
56 QSA#5
2
UDQS# VSSQ VSSQ
F2 F8
2
VSSQ VREFA4 VSSQ
VSSQ F8 J2 VREF VSSQ H2
VREFA3 J2 H2 H8
VREF VSSQ VSSQ
SCD1U16V2KX-3GP
VSSQ H8 A2 NC#A2
C5806
SCD1U16V2KX-3GP
A2 NC#A2 E2 NC#E2 VSS A3
1
1
C5803
E2 A3 R5806 BA2 L1 E3
NC#E2 VSS 56,57 BA2 BA2 VSS
1
R5804 BA2 L1 E3 4K99R2F-L-GP R3 J3
4K99R2F-L-GP 56,57 BA2 BA2 VSS NC#R3 VSS
R3 J3 R7 N1
2
NC#R3 VSS NC#R7 VSS
R7 N1 R8 P9
2
2
NC#R7 VSS NC#R8 VSS
R8 P9
2
NC#R8 VSS
K4N1G164QE-HC20-GP
K4N1G164QE-HC20-GP
+1.8V_RUN
B B
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C5849
C5853
C5850
C5855
1
1
2
2
+1.8V_RUN
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1
1
C5807
C5808
C5809
C5810
C5811
C5812
C5813
C5814
C5815
C5816
2
+1.8V_RUN
A A
<Core Design>
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Wistron Corporation
1
1
C5817
C5818
C5819
C5820
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2
Title
VRAM
www.vinafix.vn
Size Document Number Rev
Custom
ALBA Discrete SB
Date: Monday, March 23, 2009 Sheet 58 of 60
5 4 3 2 1
5 4 3 2 1
Item Page# Date Request By Issue description Solution Description Rev.
18,46
1 2008/12/08 DELL Remove Modem function. Remove MDC schematics,holding,stand off. X01
52,42
2 19,53 2008/12/08 Wistron Reserve PLT_RST# for GPU PCIE reset. Add R1913(DY),R5305(DY). X01
D D
3 25 2008/11/26 Realtek Power down sequence issue, request by vendor. Change R2506 to 1K ohm. X01
4 25 2008/12/18 KDS Follow crystal vendor test report. Change C2501 to 18pF. C2502 to 15pF. X01
5 26 2008/12/08 Wistron MB version ID change. Pop R2609,depop R2608. X01
6 38 2008/12/08 Wistron AMD power regulator issue. Change 1.8V,0.9V power regulator. X01
7 42 2008/12/08 Wistron Follow ME connector list for touch pad connector. Change TPAD1. X01
8 46,51 2008/12/08 Wistron Follow ME connector list for USB connector. Change USB1, USB2 and CON4. X01
Add +15V_ALW power circuits. And modify
9 30,33 2008/12/15 Wistron MOSFET can not fully trun on issue. X01
3.3V_RUN, 5V_RUN enable circuits.
C C
Thermal sensor order changed because DTS still Change EMC2102 first channel to CPU internal
10 8,28 2008/12/15 Wistron X01
have accuracy problem. diode. Change channel to GPU inernal diode.
11 15 2008/12/15 Wistron Cantiga power rating issue. Add R1507. X01
12 26,54 2008/12/15 Wistron AMD CTF glitch issue. Reserve KBC GPIO27, Add R2639. X01
13 40 2008/12/15 Wistron Add panel self test for factory. Add D4002,Pop R2638. X01
Change PR3203 pull high from +3.3V_ALW to
14 32 2008/12/15 Wistron Prevent leakage from KBC. X01
+3.3V_RTC_LDO.
POP EC5203 C5212 EC5202 C5211 C5213 EC5206
44,52
B 15 2008/12/15 Wistron Modify based on EMI test result. EC5201 EC5208 and POP EC4701 EC4702 EC4401 X01 B
51,47
EC4402 EC4403 EC4404 EC5101 with 22P-Varistor
16 41 2008/12/18 Wistron LCD power sequence issue. Change +LCD_VDD power produce solution. X01
17 41 2008/12/19 Wistron CMO LCD white screen issue. Add R4108(DY). X01
18 46,51 2008/12/19 Wistron Add ESD diode for USB Port. Add D4601,D4602,D5101. X01
Add PD3902,PD3903,PR3910,PR3915. Change
19 39 2008/12/29 Wistron GFX CORE glitch issue. X01
PC3915,PC3916 to 0.047uF.
20 50 2008/12/29 Wistron Follow ME connector list for Express card board. Change CON2 to 20.F1400.050. X01
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Change List
Size Document Number Rev
www.vinafix.vn
A3
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 59 of 60
5 4 3 2 1
A B C D E
Item Page# Date Request By Issue description Solution Description Rev.
21 9 2009/01/06 Wistron Power team request for CPU core measurement. Add PG901,PG902. Pop C901 and depot C902. X01
22 26 2009/01/08 Wistron Keyboard detect issue. Pop R2625. X01
4
23 44,51 2009/01/08 Wistron Change new connector. Change HDD1 and CON5. X01 4
24 8 2009/01/12 Wistron For better GTL reference voltage. Pop C802. X01
30,36 Add R3016,Q3006,R3015,Q3003,Q3702,R3702
25 2009/01/12 Wistron Add discharge circuit for GPU powers. X01
37,38 R3703,D3802,R3802,C3802.
26 22,26 2009/01/13 IDT For pop noise on YC version codec. Add Q2201,Q2202,R2219. Add GPIO33 for HP_MUTE. X01
27 33 2009/01/13 Wistron For +15V_ALW issue. Prevent higher than 20V. Add PD3303,PC3301. X01
28 51 2009/01/30 Wistron ESD protection concern. Change R5106 to 33ohm. X01
29 39 2009/01/30 Wistron For GFX_CORE overshoot and undershoot issue. Pop R3921,R3922. Depop R3920,R3923. X01
3 3
30 18,26 2009/02/19 Wistron Prevent 32768Hz crystal no oscillation from flux. Change C1807,C1806,C2607,C2608 to 0603 size. X02
Change C2204 to 2.2uf. Add Q2201,Q2202,Q2203,
31 22 2009/02/26 IDT For codec pop noise issue. X02
Q2204,Q2205. Move R2218,R2220 to main board.
32 26 2009/02/26 Wistron Change Board ID and add VRAM type select pin. Change board ID to 010,Add GPIO5 for VRAM type. X02
33 30 2009/03/02 Wistron +3.3V_ALW drop issue. Add C3005. X02
31,42,
34 2009/02/19 Wistron Connector change request by ME. Change RJ45,DCIN,FAN,SPEAKER connectors. X02
44,45
35 41 2009/02/19 Wistron LCD white screen issue. Pop R4108. X02
2 2
Change PD3107 to 1SMB22AT3G. Change PC3208,
36 31,32 2009/03/02 Wistron Power team request. X02
PC3209 to X7R.
Add location for SPR5206~SPR5209 and
37 52 2009/03/05 Wistron Reserve capacitors and springs for EMI. X02
EC5210~EC5213.
38 26 2009/03/09 Wistron No need to support keyboard detect function. Depop R2625. X02
39 22 2009/03/09 Wistron For PC_BEEP sound volume issue. Modify R2203 to 120Kohm. X02
40 33 2009/03/10 Wistron +15V_ALW issue. Depop PD3303. X02
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Change List
Size Document Number Rev
www.vinafix.vn
A3
Alba Discrete SB
Date: Monday, March 23, 2009 Sheet 60 of 60
A B C D E
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