5

P1/P15 Block Diagram

DDRII Slot 0
8
667/800

DDRII 667/800 MHz Channel A

Project code
PCB Number
Revision
Part Number

Thermal
& Fan
G792 23

AMD S1G2 CPU

DDRII Slot 1
9
667/800

638-Pin uFCPGA
DDRII 667/800 MHz Channel B

:91.4H701.001
: 07254
: -1
: 48.4H701.011

17

DVI
HDMI

HDMI CONN
17
(discrete)
C

CRT CONN
(discrete)

CRT

LVDS

LCD CONN 15
(discrete/UMA)

VRAMx4 GDDR2
256MB

PCIE X16

DDRII
(32MB)

12

SYSTEM DC/DC

New Card

PCIE x 1 & USB 2.0 x 1

ATi RS780M

24

PCIE

INPUTS

Mini-Card
PCIE x 1 & USB 2.0 x 1

LVDS/TVOUT/TMDS

802.11a/b/g/n

CRT MUX

5V_S5
24

DCBATOUT
3D3V_S5
C

1 X 16 PCIE I/F

SYSTEM DC/DC

1 X 4 PCIE I/F WITH SB

LVDS MUX

LDO
RealTek 10/100/1000

USB 2.0 x 1

CAMERA

USB 2.0

USB 2.0 x 3

0D9V_S3
1D5V_S0

INPUTS

15

SATA

PCI/PCI BRIDGE

1D2V_S5

3D3V_S0

2D5V_S0

e-SATA Combo
(USBx1)

STAT & USB 2.0 x 1

40

TPS51125

29

INPUTS

ACPI 1.1

OUTPUTS
5V_AUX_S5

SATA

DCBATOUT

HDD

PATA

18,19,20,21,22

3D3V_AUX_S5
30

31

OP AMP
G1412

SATA

MAXIM CHARGER

ODD

LPC Bus

32

G1432Q

32

AD+
BT+

Hyper Flash

KBC
Winbond WPC773L

OP AMP

46

BQ24745

30

INPUTS

OUTPUTS

3D3V_S5

SYSTEM DC/DC

ATA 66/100

LPC I/F

2CH
SPEAKER

44

29

High Definition Audio

LINE IN

5V_S5
3D3V_S0

USB Port x2

ETHERNET (10/100/1000Mb)

AZALIA

OUTPUTS

LDO

USB 2.0/1.1 ports

ALC888

INPUTS

SYSTEM DC/DC

Ati SB700

Digital Array Mic (discrete)

MIC IN

26

South Bridge

28

Azalia
CODEC

RJ45 CONN

25

PCIE
4X4

PCIE

44

10,11,12,13

6 X 1 PCIE I/F

JMB380(discrete)
JMB385(UMA)

Analog Array Mic (UMA)

OUTPUTS

Side Port Memory

1394
card reader

SD/MMC
MS/MS Pro/xD
28

40

TPS51125

HyperTransport LINK0 CPU I/F

DX10 IGP

48,49,50,51,52,53,54

1D8V_S3
DCBATOUT
1D2V_S0

North Bridge

ATi M82ME-XT

41

OUTPUTS

24

G577

IN

OUT

16X16

PCIE x 1

28

LINE OUT/ HP OUT

W/SPDIF

SYSTEM DC/DC
INPUTS

Power SW

RTL8111C/8101E

VCC_CORE

DISPLY PORT X2

16

1394
(discrete)

OUTPUTS

DCBATOUT

TPS51124

ICS9LPRS480

Side Port
CRT

INPUTS

CLK GEN
HyperTransport

38,39

ISL6265

4,5,6,7

DVI CONN
(UMA)

CPU V_CORE

OUTPUTS
DCBATOUT

27

34,35

<Variant Name>

LPC
DEBUG
CONN 36

SPI

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Touch
Pad 36

Int.
KB36

System Block Diagram

Flash ROM
2MB
35

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

-1
Sheet
1

of

56

SB700 Functional Strap Definitions

DESTINATION

USB PORT#

Note:1 VIP3 MUST NOT BE PULLED HIGH ON M82-M

Combo(ESATA/USB)

USB1

USB2

CAMERA

NC

Note:2 GPIO8 MUST NOT BE PULLED HIGH ON M86-M or M7X

PCI EXPRESS

CONFIGURATION STRAPS
Lane 0
Lane 1

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

Lane 3

NC

LAN
CARD READER
&1394
NC

WLAN

PIN

Lane 5

NC

NC

10

NC

NC

VIP1

MESSAGE SIGNAL INTERRUPT ENABLED

NA

VIP3

ENABLE HD AUDIO

BIF_64BAR_EN_A

VIP5

64 BIT BARS DISABLED

NA

12

NC

13

NC

GPIO0

PCIE FULL TX OUTPUT SWING

PCIE TRANSMITTER DE-EMPHASIS ENABLED

BIF_DEBUG_ACCESS

GPIO4

DEBUG SIGNALS MUXED OUT

BIF_AUDIO_EN

GPIO8

ENABLE HD AUDIO

RSVD

BIF_GEN2_EN_A

GPIO5

VGA

Display

Audio

GPIO[13:11,9]

1394a
------------------Card Reader

DISABLE EXTERNAL BIOS ROM

NA

X X X X

VSYNC

IGNORE VIP DEVICE STRAPS

VGA ENABLED

BIF_HDMI_EN

HSYNC

HDMI ENABLE (SEE NOTE 2)

DEBUG_ I2C_ENABLE

GPIO6

Internal use only

ANY UNUSED
GPIO OR DVP
THAT ARE NOT
CONFIG STRAPS
FOR EXAMPLE
DVPDATA20:23
IN THIS DESIGN

X X X X

MEMORY TYPE,MAKE AND SIZE INFO

XX X X

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

PSYNC

MEM_TYPE

LAN

( M82M ONLY) Note:2

Allows either PCIe 2.5GT/s or 5.0GT/s operation

GPIO_22_ROMCSB

BIF_VGA DIS

GPIO1

ROMIDCFG(3:0)

1.1

(M7XM and M86M ONLY) Note:1

TX_DEEMPH_EN

VIP_DEVICE_STRAP_ENA

NC

M7x

BIF_AUDIO_EN

BIOS_ROM_EN

11

M8x

DESCRIPTION OF DEFAULT SETTINGS

BIF_MSI_DIS

TX_PWRS_ENB

Lane 4

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RSVD = ATI RESERVED
(DO NOT INSTALL)

WLAN

NEW CARD

2.0

SB700

NEW CARD

STRAPS

Lane 2

DESTINATION

X X X X

BT

LED

ATI RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

P15

M82-ME XT

HDMI/CRT

Digital
Array Mic

YES
--------------JMB380

Giga LAN
RTL 8111C

N/A

Power Button with

white LED-Backlight

VHAD0

VIP0

VIP2

VIP4

VIP6

VIP7

GPIO2

GPIO3

H2SYNC

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

P1

DVI-I

RS780M

Analog
Array Mic

LAN(10/100)
RTL 8101E

N/A
--------------JMB385

N/A

GPIO_28_TDO

NO Backlight

GENERICC

GPIO21_BB_EN

NOTE 1: HD AUDIO MUST ONLY BE ENABLED

ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT
A

NOTE 2: HDMI MUST ONLY BE ENABLED

ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Table of Content
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

of

56

SC
3D3V_S0

3D3V_CLK_VDD
R219
1

3D3V_S0

1
VDDCPU
VDDCPU_IO

16
17
11

VDDSRC
VDDSRC_IO
VDDSRC_IO

35
34

VDDSB_SRC
VDDSB_SRC_IO

40
4
55
56
63

VDDSATA
VDDDOT
VDDHTT
VDDREF
VDD48

LAN(100MHz)
25 CLK_PCIE_LAN
25 CLK_PCIE_LAN#

SRN33J-5-GP-U
RN24

WLAN(100MHz)
24 CLK_PCIE_WLAN

SRN33J-5-GP-U
RN25

24 CLK_PCIE_WLAN#

4
3

1
2

CLK_PCIE_NEW_R
CLK_PCIE_NEW#_R

4
3

1
2

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

4
3

1 CLK_PCIE_WLAN_R
2 CLK_PCIE_WLAN#_R

4
3

1
2

CLOCK_EN#

51

PD#

CARD READER
28 CLK_PCIE_CARD
28 CLK_PCIE_CARD#

NB ALINK(100MHz)

SC

27M_SS_R
27M_NS_R

SC

11 CLK_NB_GPPSB
11 CLK_NB_GPPSB#

2
1

18 CLK_PCIE_SB
18 CLK_PCIE_SB#

2
1

SB PCIE(100MHz)
11 CLK_NBHT_CLK
11 CLK_NBHT_CLK#

CLK_NB_GPPSB_R
3
CLK_NB_GPPSB#_R
4 RN35
SRN22-3-GP
CLK_PCIE_SB_R
3
RN32
CLK_PCIE_SB#_R
4
SRN0J-6-GP
RN31
CLK_NBHT_CLK_R
2
3
CLK_NBHT_CLK#_R
1
4
SRN0J-6-GP

SEL_SATA
FS1

1
CLKREQ0#
CLKREQ1#
CLKREQ2#
CLKREQ3#
CLKREQ4#

23
45
44
39
38

CPUK8_0T
CPUK8_0C

50
49

48MZ_0

64

CLK_PCIE_VGA_R
CLK_PCIE_VGA#_R
CLK_NB_GFX_R
CLK_NB_GFX#_R

RN29
3
4

2
1
SRN0J-6-GP

261R2F-GP

SRC0T
SRC0C
SRC1T
SRC1C
SRC2T
SRC2C
SRC3T
SRC3C
SRC4T
SRC4C
SRC6T/SATAT
SRC6C/SATAC
SRC7T/27M_SS
SRC7C/27M_NS

37
36
32
31

SB_SRC0T
SB_SRC0C
SB_SRC1T
SB_SRC1C

54
53

HTT0T/66M
HTT0C/66M

SEL_HTT66/REF0
SEL_SATA/REF1
SEL_27/REF2

59
58
57

CPU_CLK_R
CPU_CLK#_R
CLK_48

3
4
1
2

FS0
FS1
FS2

CLK_NB_GFX 11
CLK_NB_GFX# 11

48 CLK_PCIE_VGA#
48 CLK_PCIE_VGA

DY
1 R221

43
24
7
52
60
46
1

GNDSRC
GNDSRC

10
18

GNDSB_SRC

33

GND

65

4
3

CLK_NB_14M 11,55

R205

FAE suggest

3D3V_S0

R202
8K2R2J-3-GP

CLK_PCIE_VGA#_R
CLK_PCIE_VGA_R

RN30

2
CPU_CLK
6
1
CPU_CLK# 6
SRN0J-6-GP
R201
2
CLK48_USB
19
33R2J-2-GP
SB700_USB(48MHz)
EC10
DY1SC4D7P50V2CN-1GP
2
1
158R2F-GP
R204
90D9R3F-GP

GNDSATA
GNDATIG
GNDDOT
GNDHTT
GNDREF
GNDCPU
GND48

SRN0J-6-GP1
2

CLK_NB_14M
RS780M 1.1V=(90.9/(90.9+158))*3.3V
R208
8K2R2J-3-GP

DY

66 MHz 3.3V single ended HTT clock

0*

100 MHz differential HTT clock

R203
8K2R2J-3-GP

100 MHz non-spreading differential SATA clock

*

R200

1 *

100 MHz spreading differential SRC clock

27MHz non-spreading singled clock on pin 13 and
27MHz spread clock on pin 14

100MHz differential spreading SRC clock

27M_NS_R
27M_SS_R

1
1

DY 33R2J-2-GP

2
2
R199

RTM880N-796-GRT-GP

0
SEL_27
FS2

30
29
28
27

RN34

22
21
20
19
15
14
13
12
9
8
42
41
6
5

* default
SEL_HTT66
FS0

ATIG0T
ATIG0C
ATIG1T
ATIG1C

SC27P50V2JN-2-GP

SMBCLK0_SB 8,9,19
SMBDAT0_SB 8,9,19

27M_NS
27M_SS

49
49

R207

DY 8K2R2J-3-GP
2

SRN33J-5-GP-U
RN26

CLK_PCIE_CARD_R
CLK_PCIE_CARD#_R

2
3

SRN33J-5-GP-U
RN27

24 CLK_PCIE_NEW#

CL=20pF0.2pF

SMBCLK
SMBDAT

EXPRESS
CARD(100MHz)
24 CLK_PCIE_NEW

1
2

VDD_REF
3D3V_48MPWR_S0

X1
X2

VDDATIG
VDDATIG_IO

48
47

1
2

DY
4
3

X-14D31818M-44GP
X3
C468
2
1

82.30005.951
CLK_X1
CLK_X2

61
62

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

10MR2J-L-GP

CLOCK_EN#

SRN0J-6-GP
RN28

SC33P50V2JN-3GP
C475
1
2

U33

10KR2J-3-GP

11 CLK_NBGPP_CLK
11 CLK_NBGPP_CLK#

DY

1D1V_CLK_VDDIO

1:NORMAL
0:POWER DOWN
R220

CLK_SRC0T_LPRS
CLK_SRC0C_LPRS

3D3V_CLK_VDD

3D3V_S0

SB
R206

26
25

C455
SC1U10V2KX-1GP

C472

C464

C457

C490
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C494

C766
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C767

DY

1D1V_CLK_VDDIO

R456
1
2
0R3-0-U-GP

3000mA.80ohm

2
0R3-0-U-GP

SC1U10V2KX-1GP

SC10U10V5ZY-1GP

R455

C476

C452

DY

VDD_REF

2
0R3-0-U-GP
C483

1D1V_S0

3D3V_48MPWR_S0

2
2D2R3J-2-GP

R218

3D3V_S0
1

R197

SC4D7U6D3V3KX-GP
2
1

3D3V_CLK_VDD

C458
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C456

C473
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C480

C495
SCD1U10V2KX-4GP

C491
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

C493

C489

SC10U10V5ZY-1GP

C488

0R0603-PAD

2
1

DY 33R2J-2-GP
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock Gen-ICS 9LPR480

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

of

56

CPU / HT3.0
SSID = CPU
D

1D2V_S0

C625

(1.2V)1.5A for VLDT

1
2

1
2

1
2

1
2

1
2

C629

SC180P50V2JN-1GP

C364

SC180P50V2JN-1GP

C365

SCD22U6D3V2KX-1GP

C619

SCD22U6D3V2KX-1GP

C394

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

Place close to socket

C382

U60A
D1
D2
D3
D4

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

HT LINK

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

AE2
AE3
AE4
AE5

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

10
10
10
10

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

J3
J2
J5
K5

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

Y1
W1
Y4
Y3

HT_CPU_NB_CLK_H0 10
HT_CPU_NB_CLK_L0 10
HT_CPU_NB_CLK_H1 10
HT_CPU_NB_CLK_L1 10

10
10
10
10

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

N1
P1
P3
P4

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

R2
R3
T5
R5

HT_CPU_NB_CTL_H0 10
HT_CPU_NB_CTL_L0 10
HT_CPU_NB_CTL_H1 10
HT_CPU_NB_CTL_L1 10

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

SKT-CPU638P-GP-U

62.10055.111

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_HT_LINK I/F_(1/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

of

56

CPU / DDR2

U60C
MEM:DATA

0D9V_S3

Place near to CPU

0D9V_S3

1
2

C168

C180

C386

1
2

1
2

1
2

1
2

C376

SC180P50V2JN-1GP

C147

SC180P50V2JN-1GP

C149

SC180P50V2JN-1GP

C408

SC180P50V2JN-1GP

C402

SC1000P50V3JN-GP

C392

SC1000P50V3JN-GP

C196

SC1000P50V3JN-GP

DY
C160

SC1000P50V3JN-GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

C154

SCD22U6D3V2KX-1GP

C427

SCD22U6D3V2KX-1GP

C421

SCD22U6D3V2KX-1GP

C145

SCD22U6D3V2KX-1GP

C413

DY

1D8V_S3

U60B

2
0D9V_S3_VREF
CPU_VTT_SUS_FB 1

TP4

B18
W26
W23
Y26

MEM_MB0_ODT0 9
MEM_MB0_ODT1 9

8 MEM_MA0_CS#0
8 MEM_MA0_CS#1

T20
U19
U20
V20

MB0_ODT0
MB0_ODT1
MB1_ODT0

MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

V26
W25
U22

MEM_MB0_CS#0 9
MEM_MB0_CS#1 9

8 MEM_MA_CKE0
8 MEM_MA_CKE1

J22
J20

MA_CKE0
MA_CKE1

MB_CKE0
MB_CKE1

J25
H26

MEM_MB_CKE0 9
MEM_MB_CKE1 9

MEM_RSVD_M2 1

TP71

8
8
8
8

MEM_MA_CLK0_P
MEM_MA_CLK0_N
MEM_MA_CLK1_P
MEM_MA_CLK1_N

N19
N20
E16
F16
Y16
AA16
P19
P20

MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4

MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4

P22
R22
A17
A18
AF18
AF17
R26
R25

MEM_MB_CLK0_P
MEM_MB_CLK0_N
MEM_MB_CLK1_P
MEM_MB_CLK1_N

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24

MEM_MB_ADD0 9
MEM_MB_ADD1 9
MEM_MB_ADD2 9
MEM_MB_ADD3 9
MEM_MB_ADD4 9
MEM_MB_ADD5 9
MEM_MB_ADD6 9
MEM_MB_ADD7 9
MEM_MB_ADD8 9
MEM_MB_ADD9 9
MEM_MB_ADD10 9
MEM_MB_ADD11 9
MEM_MB_ADD12 9
MEM_MB_ADD13 9
MEM_MB_ADD14 9
MEM_MB_ADD15 9

8 MEM_MA_BANK0
8 MEM_MA_BANK1
8 MEM_MA_BANK2

R20
R23
J21

MA_BANK0
MA_BANK1
MA_BANK2

MB_BANK0
MB_BANK1
MB_BANK2

R24
U26
J26

MEM_MB_BANK0 9
MEM_MB_BANK1 9
MEM_MB_BANK2 9

8 MEM_MA_RAS#
8 MEM_MA_CAS#
8 MEM_MA_WE#

R19
T22
T24

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

U25
U24
U23

MEM_MB_RAS# 9
MEM_MB_CAS# 9
MEM_MB_WE# 9

C157

C148

1KR3F-GP

W17

RSVD_M2

SCD1U10V2KX-4GP

MEMVREF

MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1

SC1000P50V3JN-GP

RSVD_M1

T19
V22
U21
V19

Y10

R118

VTT_SENSE

MEMZP
MEMZN

R121
1KR3F-GP

MEM_RSVD_M1

AF10
AE10

C171
SCD1U10V2KX-4GP

W10
AC10
AB10
AA10
A10

H16

8 MEM_MA0_ODT0
8 MEM_MA0_ODT1

MEMZP
MEMZN

MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
VTT8
VTT9

R347
39D2R2F-L-GP
1
2
1
2
R350
39D2R2F-L-GPTP14

1D8V_S3

VTT1
VTT2
VTT3
VTT4

D10
C10
B10
AD10

(0.9V)750mA for VTT

9
9
9
9

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

8
8
8
8
8
8
8
8

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

E12
C15
E19
F24
AC24
Y19
AB16
Y13

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

MEM_MA_DQS0_P
MEM_MA_DQS0_N
MEM_MA_DQS1_P
MEM_MA_DQS1_N
MEM_MA_DQS2_P
MEM_MA_DQS2_N
MEM_MA_DQS3_P
MEM_MA_DQS3_N
MEM_MA_DQS4_P
MEM_MA_DQS4_N
MEM_MA_DQS5_P
MEM_MA_DQS5_N
MEM_MA_DQS6_P
MEM_MA_DQS6_N
MEM_MA_DQS7_P
MEM_MA_DQS7_N

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13

MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11

MEM_MB_DATA0 9
MEM_MB_DATA1 9
MEM_MB_DATA2 9
MEM_MB_DATA3 9
MEM_MB_DATA4 9
MEM_MB_DATA5 9
MEM_MB_DATA6 9
MEM_MB_DATA7 9
MEM_MB_DATA8 9
MEM_MB_DATA9 9
MEM_MB_DATA10 9
MEM_MB_DATA11 9
MEM_MB_DATA12 9
MEM_MB_DATA13 9
MEM_MB_DATA14 9
MEM_MB_DATA15 9
MEM_MB_DATA16 9
MEM_MB_DATA17 9
MEM_MB_DATA18 9
MEM_MB_DATA19 9
MEM_MB_DATA20 9
MEM_MB_DATA21 9
MEM_MB_DATA22 9
MEM_MB_DATA23 9
MEM_MB_DATA24 9
MEM_MB_DATA25 9
MEM_MB_DATA26 9
MEM_MB_DATA27 9
MEM_MB_DATA28 9
MEM_MB_DATA29 9
MEM_MB_DATA30 9
MEM_MB_DATA31 9
MEM_MB_DATA32 9
MEM_MB_DATA33 9
MEM_MB_DATA34 9
MEM_MB_DATA35 9
MEM_MB_DATA36 9
MEM_MB_DATA37 9
MEM_MB_DATA38 9
MEM_MB_DATA39 9
MEM_MB_DATA40 9
MEM_MB_DATA41 9
MEM_MB_DATA42 9
MEM_MB_DATA43 9
MEM_MB_DATA44 9
MEM_MB_DATA45 9
MEM_MB_DATA46 9
MEM_MB_DATA47 9
MEM_MB_DATA48 9
MEM_MB_DATA49 9
MEM_MB_DATA50 9
MEM_MB_DATA51 9
MEM_MB_DATA52 9
MEM_MB_DATA53 9
MEM_MB_DATA54 9
MEM_MB_DATA55 9
MEM_MB_DATA56 9
MEM_MB_DATA57 9
MEM_MB_DATA58 9
MEM_MB_DATA59 9
MEM_MB_DATA60 9
MEM_MB_DATA61 9
MEM_MB_DATA62 9
MEM_MB_DATA63 9

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

A12
B16
A22
E25
AB26
AE22
AC16
AD12

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

MEM_MB_DQS0_P
MEM_MB_DQS0_N
MEM_MB_DQS1_P
MEM_MB_DQS1_N
MEM_MB_DQS2_P
MEM_MB_DQS2_N
MEM_MB_DQS3_P
MEM_MB_DQS3_N
MEM_MB_DQS4_P
MEM_MB_DQS4_N
MEM_MB_DQS5_P
MEM_MB_DQS5_N
MEM_MB_DQS6_P
MEM_MB_DQS6_N
MEM_MB_DQS7_P
MEM_MB_DQS7_N

9
9
9
9
9
9
9
9

9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9

SKT-CPU638P-GP-U
SKT-CPU638P-GP-U

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_DDR_(2/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

of

56

1.8V_S3?

LYAOUT:ROUTE VDDA TRACE APPROX.

50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.

8
7
6
5

1D8V_S0

1D8V_S3

CPU_CLK(200MHz)
3
3

CPU_CLK
CPU_CLK#

1D8V_S3

1
2
CLKCPU_IN
R432
169R2F-GP
1
2
CLKCPU#_IN
C7381
2SC3900P50V2KX-2GP
C739
SC3900P50V2KX-2GP
LDT_RST#_CPU
LDT_PWROK
LDT_STP#_CPU
HDT_RST# 1
CPU_LDT_REQ#_CPU
2
R440
CPU_SIC
0R2J-2-GP
CPU_SID
CPU_ALERT#
1D2V_S0

ph

LDT_PWROK
R353
390R2J-1-GP

C615
SCD1U10V2KX-4GP

CPU_SIC

R652
CPU_SID

CPU_TEST21

300R2J-4-GP

R6
P6

HT_REF0
HT_REF1

38 CPU_VDD0_RUN_FB_H
38 CPU_VDD0_RUN_FB_L

F6
E6

VDD0_FB_H
VDD0_FB_L

38 CPU_VDD1_RUN_FB_H
38 CPU_VDD1_RUN_FB_L

Y6
AB6

VDD1_FB_H
VDD1_FB_L

G10
AA9
AC9
AD9
AF9

DBRDY
TMS
TCK
TRST_L
TDI

CPU_HTREF0
2
2 44D2R2F-GP CPU_HTREF1
44D2R2F-GP

CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

R654
CPU_TEST24

2
CPU_DBREQ#

300R2J-4-GP

TP53

CPU_TEST23

AD7

TEST23

TP15
TP18

1
1

CPU_TEST18
CPU_TEST19

H10
G9

TEST18
TEST19

TP20
TP16

1
1

CPU_TEST25_H
CPU_TEST25_L

TP3
TP57
TP55
TP52
TP2
TP56

1 CPU_TEST21
1 CPU_TEST20
1 CPU_TEST24
1 CPU_TEST22
1 CPU_TEST12
1 CPU_TEST27

1D8V_S3

R351
1KR2J-1-GP

DY

CPU_TEST9

2
R179
0R2J-2-GP

CPU temperature sensor

driver INT event to EC

CPU_ALERT#

E9
E8
AB8
AF7
AE7
AE8
AC8
AF8

KEY1
KEY2
SVC
SVD

THERMTRIP_L
PROCHOT_L
MEMHOT_L

A3
A5
B3
B5
C1

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

A6
A4

AF6
AC7
AA8

38
38

1
R342
2

CPU_PROCHOT#

1 R340

THERMDC
THERMDA

W7
W8

1D8V_S3

VDDIO_FB_H
VDDIO_FB_L

W9
Y9

VDDNB_FB_H
VDDNB_FB_L

H6
G6

DBREQ_L
TDO

H_THERMDC
H_THERMDA

1DY 2
C151
SC100P50V2JN-3GP
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L

1
1

CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L

23
23

The Processor has

reached a preset
maximum operating
temperature. 100
I=Active HTC
O=FAN

TP7
TP5

38
38

E10 CPU_DBREQ#

TEST28_H
TEST28_L

J7
H8

CPU_TEST28_H 1
CPU_TEST28_L 1

TP11
TP12

TEST17
TEST16
TEST15
TEST14

D7
E7
F7
C7

CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14

1
1
1
1

TP67
TP17
TP19
TP68

TEST7
TEST10

C3
K8

TEST8

C4

TEST29_H
TEST29_L

C9
C8

CPU_TEST29H
CPU_TEST29L

1
1

TP70
TP69

HDT Connectors
B

RSVD10
RSVD9
RSVD8
RSVD7
RSVD6

H18
H19
AA7
D5
C5

HDT1
1
3
5
7
9
11
13
15
17
19
21
23

1D8V_S3

2
D

DY

4
6
8
10
12
14
16
18
20
22
24
26

SMC-CONN26A-FP
20.F0357.025

38
HDT_RST#

H
Q28
FDV301N-NL-GP

<Variant Name>

Q27
FDV301N-NL-GP
S

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_Control&Debug_(3/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

LAYOUT: Route FBCLKOUT_H/L

differentially impedance 80

AE9 CPU_TDO

1
2
LDT_PWROK

18

CPU_PROCHOT#_L

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

CPU_PWRGD_SVID_REG

LDT_PWROK#

CPU_THERMTRIP#_L 19

2
0R2J-2-GP

CPU exceeds to 125

R448
10KR2J-3-GP

FDV301N, the Vgs is:

min = 0.65V
Typ = 0.85V
Max = 1.5V

10KR2J-3-GP

2
3
MMBT3904-7-F-GP
Q21

R348
1

3D3V_S0

R447
10KR2J-3-GP

2
SCD1U10V2KX-4GP

CPU_SVC
CPU_SVD

SKT-CPU638P-GP-U

5V_S5

C616

R435
1KR2J-1-GP

300R2J-4-GP

TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6

M11
W18

1
R434
1KR2J-1-GP

TEST25_H
TEST25_L

C2
AA6

1
SIC
SID
ALERT_L

Sideband temperature

CLKIN_H
CLKIN_L

AF4
AF5
AE6

R653
300R2J-4-GP

VDDA1
VDDA2

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

1D8V_S3

F8
F9

B7
A7
F10
C6

1
R1451
R176

R352
390R2J-1-GP

U60D

A9
A8

R338

1
2

1
2

1
2

1D8V_S3

For HDT DBG

near cpu

sc

C351

300R2J-4-GP

Cloce To CPU

C362

R349

300R2J-4-GP

11 CPU_LDT_REQ#

C418

SC3300P50V2KX-1GP

18 CPU_LDT_STOP#

LDT_RST#_CPU 11
0R2J-2-GP
LDT_PWROK
2
0R2J-2-GP
2
LDT_STP#_CPU 11
0R2J-2-GP
CPU_LDT_REQ#_CPU
2
0R2J-2-GP

SCD22U6D3V2KX-1GP

18 CPU_PWRGD

LDT_PWROK

(2.5V)250mA for VDDA

SC4D7U6D3V5KX-3GP

1
R439
1
R433
1
R437
1
R178

18 CPU_LDT_RST#

1
2
3
4
D

+2.5V_RUN_VDDA
L25
BLM18PG330SN1D-GP
1
2

2D5V_S0

RN33
SRN300J-1-GP

Rev

P1/P15

SA
Sheet
1

of

56

SSID = CPU

U60F
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

+VCC_CORE0

36A for VDD0&VDD1

Bottom Side Decoupling

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

2
1
2

1
2

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD22U6D3V2KX-1GP

SC22U6D3V5MX-2GP

C272 C257 C411 C239 C273 C299

SCD22U6D3V2KX-1GP

SKT-CPU638P-GP-U

C217 C401 C340 C343 C236 C218 C232 C207 C230 C310 C320

SCD22U6D3V2KX-1GP

(1.8V)2A for VDDIO

Bottom Side Decoupling

1D8V_S3

Place near to CPU

SCD22U6D3V2KX-1GP

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

SCD01U50V2KX-1GP

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

SCD01U50V2KX-1GP

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5

SC180P50V2JN-1GP

K16
M16
P16
T16
V16

C252 C163 C175 C235 C213 C212 C221

SC22U6D3V5MX-2GP

SC180P50V2JN-1GP

C241

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

SC22U6D3V5MX-2GP

SCD01U50V2KX-1GP

SC22U6D3V5MX-2GP

C259

VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26

SC22U6D3V5MX-2GP

SCD22U6D3V2KX-1GP

1D8V_S3

SC22U6D3V5MX-2GP

C277

VDD0_1
VDD0_2
VDD0_3
VDD0_4
VDD0_5
VDD0_6
VDD0_7
VDD0_8
VDD0_9
VDD0_10
VDD0_11
VDD0_12
VDD0_13
VDD0_14
VDD0_15
VDD0_16
VDD0_17
VDD0_18
VDD0_19
VDD0_20
VDD0_21
VDD0_22
VDD0_23

SCD22U6D3V2KX-1GP

SC22U6D3V5MX-2GP

(0.8~1.1V)3A for VDDNB

G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11

Bottom Side Decoupling

SCD01U50V2KX-1GP

SC22U6D3V5MX-2GP

CPU_VDDNB

+VCC_CORE1
U60E

SC180P50V2JN-1GP

C306 C307 C270 C269 C315 C301 C345

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

SC22U6D3V5MX-2GP

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

SC22U6D3V5MX-2GP

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

SKT-CPU638P-GP-U

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU_Power_(4/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

of

56

DIMM1 (A0)

SSID = MEMORY
A

0D9V_S3

DIMM2 (A4)

RN21

DIMM2

F26

G25

G26

H25

H26

J 24

J 25

J 26

K24

K25

K26

L24

L25

L26

M24

M25

M26

N24

N25

N26

G24
H24
P24

P25

P26

R24

R25

R26

T24

T25

T26

U25

V24

V25

V26

W25

W26

Y25

Y26

AA25

AA26

W24

U24

U26

Y24
AA24

AA21

AC24

AC25

AC26

AD24

AD25

AD26

AE24

AE25

AF24

AB24

AF23

AB26

AF22

AB25

AF21

AF17

AF19

AF20

AF18

AE23

AF16

AE22

AF15

AE21

AE17

AE18

AE19

AE20

AE16

AD21

AE15

AD19

AF6

AF5

AF7

AF4

AD22

AC20

AE6

AE4

AE5

AD20

AC19

AD18

AC18

AD17

AC17

AF14

AD16

AC16

AF12

AF13

AD15

AC15

AE14

AD23

AB20

AE13

AC21

AB19

AE12

AC23

AB18

AD12

AD13

AD14

AC22

AB17

AC14

AB22

AB16

AC13

AF11

AB23

AB15

AC12

AF10

AB21

AB14

AE8

AE10

AE11

AF9

AB13

AD10

AD11

AF8

AB12

AC11

TPAD60
TP50

SMBCLK0_SB 3,9,19

C115
SC2D2U6D3V3KX-GP

PARALLEL TERMINATION

(A0)

MEM_MA_ADD14 5
MEM_MA_CKE1 5
MEM_MA_ADD4 5
MEM_MA_ADD11 5

1
2
3
4

SRN47J-4-GP
RN15
8
7
6
5

MEM_MA_WE# 5
MEM_MA_ADD10 5
MEM_MA_BANK0 5
MEM_MA_ADD1 5

1
2
3
4

SRN47J-4-GP
RN23
8
7
6
5

MEM_MA_BANK2 5
MEM_MA_ADD15 5
MEM_MA_CKE0 5
MEM_MA_ADD12 5

1
2
3
4

SRN47J-4-GP
RN11
8
7
6
5

MEM_MA_BANK1 5
MEM_MA0_CS#1 5
MEM_MA_CAS# 5
MEM_MA0_ODT1 5

1
2
3
4

SRN47J-4-GP
RN13
8
7
6
5

MEM_MA0_CS#0 5
MEM_MA0_ODT0 5
MEM_MA_RAS# 5
MEM_MA_ADD13 5

1
2
3
4

SRN47J-4-GP
RN19
8
7
6
5

MEM_MA_ADD5
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD6

5
5
5
5

1
2
3
4

SRN47J-4-GP
RN17
8
7
6
5

MEM_MA_ADD7
MEM_MA_ADD3
MEM_MA_ADD0
MEM_MA_ADD2

5
5
5
5

C119
SCD1U10V2KX-4GP

2
210KR2J-3-GP
10KR2J-3-GP

1
R1071
R104

3D3V_S0

Put decap near power(0.9V) and pull-up resistor

1D8V_S3

PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH

SRN47J-4-GP

Do not share the Term resistor between

the DDR addess and Control Signals.

MEM_MA_CLK0_P

TP73

C431
SC1D5P50V2CN-1GP
MEM_MA_CLK0_N
MEM_MA_CLK1_P

TPAD60

C142
SC1D5P50V2CN-1GP
MEM_MA_CLK1_N

Decoupling Capacitor
Place these Caps near DM1
1D8V_S3

C200

1 DY2
C278
SCD1U10V2KX-4GP
1 DY2
C228
SCD1U10V2KX-4GP
1 DY2
C193
SCD1U10V2KX-4GP
1 DY2
C336
SCD1U10V2KX-4GP
1 DY2
C300
SCD1U10V2KX-4GP
1 DY2
C242
SCD1U10V2KX-4GP
1 DY2
C417
SCD1U10V2KX-4GP
1 DY2
C204
SCD1U10V2KX-4GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT

0D9V_S3

C450
SCD1U10V2KX-4GP
TP74

C285

1
2

1
2

1
2

1
2

1
2

C240
SCD1U16V2KX-3GP

C201
SCD1U10V2KX-4GP

C337
SCD1U10V2KX-4GP

DY

C296
SCD1U10V2KX-4GP

C262
SCD1U10V2KX-4GP

C211
SCD1U10V2KX-4GP

C176
SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

DY

C206

SCD1U10V2KX-4GP

C264

SCD1U10V2KX-4GP

C227

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

LAYOUT: Locate close to DIMM

C349

C308

C325

C443
SC1KP50V2KX-1GP

C451
SCD1U10V2KX-4GP

TPAD60
R190
1KR2F-3-GP

1D8V_S3

0D9V_S3

1
2

1
2

1
2

1
2

1
2

1
2

1
2

C735

VREF_DDR_MEM

1
2

C706

SC180P50V2JN-1GP

C734

SCD01U50V2KX-1GP

C373

SC180P50V2JN-1GP

R193
1KR2F-3-GP

C377

SCD01U50V2KX-1GP

C353

SC2D2U6D3V3KX-GP

C158

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

1D8V_S3

SC2D2U6D3V3KX-GP

DDR_VREF

C700

DY
SC2D2U6D3V3KX-GP

REVERSE TYPE

F25

AA22

AA18

AA17

AA16

AA20

AA19

AA23

AA15

Y23

Y16

Y22

Y20

Y21

Y19

Y18

Y15

Y17

W15

W22

W23

W16

W21

W17

W18

V19

V20

V21

V17

V18

V23

V16

V22

V15

U22

AA12

U23

U21

U20

U19

AA13

AA14

U18

Y13

Y14

U17

W14

U15

W12

W13

U16

V13

AC10

AE7

AB11

AE9

AE3

AB10

AD9

AE2

AD8

AD1

AD7

AD4

AD6

AD3

AD5

AD2

AC9

AC1

AC5

AC8

AC4

AC7

AC2

AC6

AC3

AB7

AB9

AB1

AB8

AB5

AB6

AB4

AB3

AB2

F24

T21

T17

T16

T22

T20

T19

T18

T15

T23

R19

R22

R20

R21

R18

R17

R23

R16

P22

P21

P20

P18

P17

P16

P23

P19

V12

V14

Y12

U14

AA11

U13

AA10

U12

Y11

AA8

AA9

AA5

AA6

AA4

AA3

AA2

AA7

AA1

Y10

Y9

W10

Y6

W11

Y4

Y5

V10

Y3

V11

Y1

Y2

U11

W6

U10

W5

W9

W4

W8

W3

W7

W1

W2

V8

V9

V3

V6

V4

V5

V1

V2

V7

U1

U9

U7

U8

U6

U4

U5

U3

U2

1
2
C731
SCD1U10V2KX-4GP

1
2
C733
SCD1U10V2KX-4GP

DY
B

1
2
C174
SCD1U10V2KX-4GP

1
2
C454
SCD1U10V2KX-4GP

DY

TP54

E24

E25

E26

D24

D25

D26

N20

N19

N21

N18

M21

N17

M20

C25

C24

N22

N23

M18

M19

C26

M22

M23

L20

M17

L19

T10

T11

T12

R11
T13

R10

T14

P11

T9

P10

T8

T3

T7

T5

T6

T4

T1

R9

T2

R7

R8

R3

R6

R2

R4

R1

P8

R5

P7

P6

P3

P4

P2

P5

P1

P9

SCD1U16V2KX-3GP

SC2D2U6D3V3KX-GP

B24

L22

L23

L18

L17

N16

L21

M16

K23

L16

K22

L15

K20

K21

K18

K19

K17

J 19

K16

J 22

J 23

K15

J 20

J 17

J 18

J 15

J 21

J 16

H20

H23

H19

H18

H22

H17

H21

H16

G22

H15

G21

G15

G17

G23

G16

G18

F16

F21

F23

F19

F20

F22

F17

F18

F15

E20

E21

E22

E19

E23

E17

E18

E16

D18

D19

E15

D17

D23

D16

D22

D15

D20

L14

D21

L12

L13

C18

K12

K13

K14

C23

J 14

C22

J 13

C20

J 12

C21

H14

C17

H13

C19

H12

C16

G13

C15

G12

N10

N11

G14

M11

F14

M10

F13

L10

L11

F12

K10

K11

E13

J 10

J 11

E12

H11

E14

H10

D14

G11

D13

G10

D12

F11

C14

F10

C12

E10

E11

C13

D11

C11

D10

C10

N9

SMBDAT0_SB 3,9,19

DIMM1_SA0
DIMM1_SA1

8
7
6
5

B25

A24

B22

B23

B19

B20

B21

B17

B16

B18

B15

A16

A23

A20

A19

A18

A22

B14

A21

A15

B12

B13

A17

A14

B10

B11

A13

A11

A12

A10

N8

N5

N6

N4

N7

N3

M9

N2

M8

N1

M6

M7

M5

L9

M3

L8

M2

L6

L7

M1

K9

M4

K8

L5

K7

L3

K6

K5

J7

J8

J9

J5

J6

H9

H5

H8

H6

H7

G5

G6

L4

F9

F5

L2

F7

F8

L1

E9

K1

E8

K3

E7

K4

E5

E6

K2

D9
G9

D8

F6

D5

D6

D7

MH2

C8

201

MH2

C7

GND

MH1

C6

GND

C5

202
MH1

C9

VREF
VSS

B8

1
2

B7

OTD0
OTD1

B6

114
119

B9

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

B5

BGA638_50_26SQ_S1G2_OEM

13
31
51
70
131
148
169
188

A9

J4

MEM_MA_DQS0_P
MEM_MA_DQS1_P
MEM_MA_DQS2_P
MEM_MA_DQS3_P
MEM_MA_DQS4_P
MEM_MA_DQS5_P
MEM_MA_DQS6_P
MEM_MA_DQS7_P

A8

J2

J3

5
5
5
5
5
5
5
5

A6

J1

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

A5

H4

H1

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

5
5
5
5
5
5
5
5

TPAD60
TP51

A7

H2

H3

81
82
87
88
95
96
103
104
111
112
117
118

11
29
49
68
129
146
167
186

C442

G2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

MEM_MA_DQS0_N
MEM_MA_DQS1_N
MEM_MA_DQS2_N
MEM_MA_DQS3_N
MEM_MA_DQS4_N
MEM_MA_DQS5_N
MEM_MA_DQS6_N
MEM_MA_DQS7_N

C441

G1

198
200
50
69
83
120
163

5
5
5
5
5
5
5
5

VREF_DDR_MEM

G4

SA0
SA1
NC#50
NC#69
NC#83
NC#120
NC#163/TEST

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

5 MEM_MA0_ODT0
5 MEM_MA0_ODT1

G3

199

F4

VDDSPD

F3

195
197

F2

SDA
SCL

F1

MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7

E1

10
26
52
67
130
147
170
185

E2

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

E4

MEM_MA_CLK1_P 5
MEM_MA_CLK1_N 5

E3

164
166

D3

MEM_MA_CLK0_P 5
MEM_MA_CLK0_N 5

CK1
CK1#

D4

CK0
CK0#

30
32

D2

MEM_MA_CKE0 5
MEM_MA_CKE1 5

D1

MEM_MA0_CS#0 5
MEM_MA0_CS#1 5

C3

110
115
79
80

C4

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

CS0#
CS1#
CKE0
CKE1

C2

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

1
2
3
4

A B

MEM_MA_RAS# 5
MEM_MA_WE# 5
MEM_MA_CAS# 5

C1

BA0
BA1

108
109
113

B3

MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63

107
106

RAS#
WE#
CAS#

B4

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

A4

5 MEM_MA_BANK2
5 MEM_MA_BANK0
5 MEM_MA_BANK1

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

A3

MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15

A1

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

TPAD60

DDR2-200P-22-GP-U2

HI 9.2mm
Place C2.2uF and 0.1uF <
500mils from DDR connector

62.10017.A61

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDR_DIMM1
Size
A2

Document Number

Rev

P1/P15

Date: Monday, March 10, 2008

5

SA
Sheet

of

56

SSID = MEMORY
DIMM1

SA0
SA1

198
200

VDD_SPD

199

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

202

1
2
3
4

SRN47J-4-GP
RN10
8
7
6
5

MEM_MB_ADD13
MEM_MB0_ODT0
MEM_MB0_CS#0
MEM_MB_BANK1

5
5
5
5

0D9V_S3
C253

C173

C274

C295

1
2

1
2

1
2

1
2

1
2

C663

DY Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT

1
2
C266
SCD1U10V2KX-4GP

DY
1
2
C317
SCD1U10V2KX-4GP

1
2
C318
SCD1U10V2KX-4GP

1
2
C311
SCD1U10V2KX-4GP

DY

C283

C304

C243

1
2

C222

C214

C186

1
2

C198

C234

C282

C331

1
2

C195

C229

C280

C312

0D9V_S3

1D8V_S3

1 DY2
C327
SCD1U10V2KX-4GP
1 DY2
C265
SCD1U10V2KX-4GP
1 DY2
C220
SCD1U10V2KX-4GP
1 DY2
C178
SCD1U10V2KX-4GP
1 DY2
C422
SCD1U10V2KX-4GP
1 DY2
C292
SCD1U10V2KX-4GP
1 DY2
C246
SCD1U10V2KX-4GP
1 DY2
C205
SCD1U10V2KX-4GP

DY

MEM_MB0_CS#1 5
MEM_MB0_ODT1 5
MEM_MB_CAS# 5
MEM_MB_WE# 5

SCD1U10V2KX-4GP

1
2
3
4

SCD1U10V2KX-4GP

GND

MEM_MB_ADD11 5
MEM_MB_ADD7 5
MEM_MB_ADD4 5
MEM_MB_ADD3 5

SRN47J-4-GP
RN12
8
7
6
5

SCD1U10V2KX-4GP

C446

C670

SCD1U10V2KX-4GP

SCD1U16V2KX-3GP

SC2D2U6D3V3KX-GP

C436

C675

SC180P50V2JN-1GP

VREF

C685

SCD1U10V2KX-4GP

1
201

C692

SCD01U50V2KX-1GP

VREF_DDR_MEM

MEM_MB_CKE1 5
MEM_MB_CKE0 5
MEM_MB_ADD14 5
MEM_MB_ADD15 5

SRN47J-4-GP
RN18
8
7
6
5

Place these Caps near DM2

1D8V_S3

SCD1U10V2KX-4GP

ODT0
ODT1

SRN47J-4-GP
RN22
8
7
6
5

Decoupling Capacitor

SCD1U10V2KX-4GP

SCL
SDA

114
119

1
2
3
4

MEM_MB_CLK1_P
C143
SC1D5P50V2CN-1GP
MEM_MB_CLK1_N

SC180P50V2JN-1GP

197
195

MEM_MB_RAS# 5
MEM_MB_ADD2 5
MEM_MB_ADD0 5
MEM_MB_ADD10 5

MEM_MB_CLK0_P

SCD1U10V2KX-4GP

5 MEM_MB0_ODT0
5 MEM_MB0_ODT1

SRN47J-4-GP
RN14
8
7
6
5

C429
SC1D5P50V2CN-1GP
MEM_MB_CLK0_N

SCD01U50V2KX-1GP

3,8,19 SMBCLK0_SB
3,8,19 SMBDAT0_SB

1
2
3
4

PLACE CLOSE TO PROCESSOR

WITHIN 1.5 INCH

SCD1U10V2KX-4GP

CS0#
CS1#
CKE0
CKE1
RAS#
CAS#
WE#

MEM_MB_BANK0 5
MEM_MB_ADD1 5
MEM_MB_ADD6 5
MEM_MB_ADD5 5

SRN47J-4-GP

SCD1U10V2KX-4GP

110
115
79
80
108
113
109

C117
SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

5 MEM_MB0_CS#0
5 MEM_MB0_CS#1
5 MEM_MB_CKE0
5 MEM_MB_CKE1
5 MEM_MB_RAS#
5 MEM_MB_CAS#
5 MEM_MB_WE#

C114

SCD1U10V2KX-4GP

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

SRN47J-4-GP
RN16
8
7
6
5

3D3V_S0
1D8V_S3

MEM_MB_ADD9 5
MEM_MB_ADD12 5
MEM_MB_ADD8 5
MEM_MB_BANK2 5

1
2
3
4

1
2
3
4

(A2)

SCD1U10V2KX-4GP

50
69
83
120
163

2
3D3V_S0
210KR2J-3-GP
10KR2J-3-GP

SC2D2U6D3V3KX-GP

DIMM2_SA0
1
DIMM2_SA1R1081
R105

5
5
5
5

MEM_MB_CLK0_P
MEM_MB_CLK0_N
MEM_MB_CLK1_P
MEM_MB_CLK1_N

30
32
164
166

CK0
CK0#
CK1
CK1#

SC2D2U6D3V3KX-GP

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

SCD1U10V2KX-4GP

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

Do not share the Term resistor between

the DDR addess and Control Signals.

5
5
5
5
5
5
5
5

SC2D2U6D3V3KX-GP

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63

REVERSE TYPE

5
5
5
5
5
5
5
5
5
5

MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7

8
7
6
5

Put decap near power(0.9V) and pull-up resistor

10
26
52
67
130
147
170
185

RN20

1
2
3
4

PARALLEL TERMINATION

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

SC2D2U6D3V3KX-GP

BA0
BA1

MEM_MB_DQS0_P
MEM_MB_DQS1_P
MEM_MB_DQS2_P
MEM_MB_DQS3_P
MEM_MB_DQS4_P
MEM_MB_DQS5_P
MEM_MB_DQS6_P
MEM_MB_DQS7_P
MEM_MB_DQS0_N
MEM_MB_DQS1_N
MEM_MB_DQS2_N
MEM_MB_DQS3_N
MEM_MB_DQS4_N
MEM_MB_DQS5_N
MEM_MB_DQS6_N
MEM_MB_DQS7_N

SCD1U10V2KX-4GP

107
106

0D9V_S3

13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186

5 MEM_MB_BANK2
5 MEM_MB_BANK0
5 MEM_MB_BANK1

MH2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

SC2D2U6D3V3KX-GP

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16_BA2

5
5
5
5
5
5

MH2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15

5
5
5
5
5
5
5
5
5
5

MH1

MH1

Place C2.2uF and 0.1uF <

500mils from DDR connector

SKT-SODIMM200-38GP

DY

DY

62.10017.E31

LOW 5.2 mm

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDR_DIMM2
Size
A2

Document Number

Rev

P1/P15

Date: Monday, March 10, 2008

5

SA
Sheet

of

56

U61A

Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_CPU_NB_CAD_H0
HT_CPU_NB_CAD_L0
HT_CPU_NB_CAD_H1
HT_CPU_NB_CAD_L1
HT_CPU_NB_CAD_H2
HT_CPU_NB_CAD_L2
HT_CPU_NB_CAD_H3
HT_CPU_NB_CAD_L3
HT_CPU_NB_CAD_H4
HT_CPU_NB_CAD_L4
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5
HT_CPU_NB_CAD_H6
HT_CPU_NB_CAD_L6
HT_CPU_NB_CAD_H7
HT_CPU_NB_CAD_L7

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_CPU_NB_CAD_H8
HT_CPU_NB_CAD_L8
HT_CPU_NB_CAD_H9
HT_CPU_NB_CAD_L9
HT_CPU_NB_CAD_H10
HT_CPU_NB_CAD_L10
HT_CPU_NB_CAD_H11
HT_CPU_NB_CAD_L11
HT_CPU_NB_CAD_H12
HT_CPU_NB_CAD_L12
HT_CPU_NB_CAD_H13
HT_CPU_NB_CAD_L13
HT_CPU_NB_CAD_H14
HT_CPU_NB_CAD_L14
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15

AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

4
4
4
4

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

T22
T23
AB23
AA22

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

4
4
4
4

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

M22
M23
R21
R20

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

2 R421
301R2F-GP

HT_RXCALP
HT_RXCALN

C23
A24

Place < 100mils from pin C23 and A24

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7

4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

4
4
4
4

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

H24
H25
L21
L20

HT_NB_CPU_CLK_H0 4
HT_NB_CPU_CLK_L0 4
HT_NB_CPU_CLK_H1 4
HT_NB_CPU_CLK_L1 4

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

M24
M25
P19
R18

HT_NB_CPU_CTL_H0 4
HT_NB_CPU_CTL_L0 4
HT_NB_CPU_CTL_H1 4
HT_NB_CPU_CTL_L1 4

HT_TXCALP
HT_TXCALN

B24
B25

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

PCIE_NBTX_NEWRX_P0 C648
PCIE_NBTX_NEWRX_N0 C642
PCIE_NBTX_WLANRX_P1C658
PCIE_NBTX_WLANRX_N1C661
PCIE_NBTX_LANRX_P2 C665
PCIE_NBTX_LANRX_N2 C660
PCIE_NBTX_CARDRX_P2 C669
PCIE_NBTX_CARDRX_N2C672

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

ALINK_NBTX_SBRX_P0
ALINK_NBTX_SBRX_N0
ALINK_NBTX_SBRX_P1
ALINK_NBTX_SBRX_N1
ALINK_NBTX_SBRX_P2
ALINK_NBTX_SBRX_N2
ALINK_NBTX_SBRX_P3
ALINK_NBTX_SBRX_N3

1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

PCE_CALRP
PCE_CALRN

AC8
AB8

PART 1 OF 6

HYPER TRANSPORT CPU I/F

SSID = N.B

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

4
4
4
4
4
4
4
4
4
4
4
4

Placement: close RS780

UMA DVI
GFX_TX15P_C
GFX_TX15N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX12P_C
GFX_TX12N_C

NEW
WLAN
LAN
CARD

A-LINK

24
24
24
24

PCIE_NBRX_NEWTX_P0
PCIE_NBRX_NEWTX_N0
PCIE_NBRX_WLANTX_P1
PCIE_NBRX_WLANTX_N1
25 PCIE_NBRX_LANTX_P2
25 PCIE_NBRX_LANTX_N2
28 PCIE_NBRX_CARDTX_P3
28 PCIE_NBRX_CARDTX_N3

18
18
18
18
18
18
18
18

ALINK_NBRX_SBTX_P0
ALINK_NBRX_SBTX_N0
ALINK_NBRX_SBTX_P1
ALINK_NBRX_SBTX_N1
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
ALINK_NBRX_SBTX_P3
ALINK_NBRX_SBTX_N3

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

PCIE I/F GPP

PCIE I/F SB

RS780M-GP-U1

GFX_TX15P_C
GFX_TX15N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX8P_C
GFX_TX8N_C
GFX_TX7P_C
GFX_TX7N_C
GFX_TX6P_C
GFX_TX6N_C
GFX_TX5P_C
GFX_TX5N_C
GFX_TX4P_C
GFX_TX4N_C
GFX_TX3P_C
GFX_TX3N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX0P_C
GFX_TX0N_C

PCE_PCAL
PCE_NCAL

C729
C728
C727
C726
C724
C725
C721
C720
C718
C717
C361
C350
C712
C715
C338
C328
C705
C708
C704
C702
C298
C288
C695
C701
C694
C690
C268
C267
C682
C687
C679
C681

C159
C167
C647
C630
C190
C179
C656
C654

1
R126 1
R139

2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP
2VGA SCD1U10V2KX-4GP

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2 1K27R2F-L-GP
2KR2F-3-GP

PCIE_NB_MXM_TX15P 48
PCIE_NB_MXM_TX15N 48
PCIE_NB_MXM_TX14P 48
PCIE_NB_MXM_TX14N 48
PCIE_NB_MXM_TX13P 48
PCIE_NB_MXM_TX13N 48
PCIE_NB_MXM_TX12P 48
PCIE_NB_MXM_TX12N 48
PCIE_NB_MXM_TX11P 48
PCIE_NB_MXM_TX11N 48
PCIE_NB_MXM_TX10P 48
PCIE_NB_MXM_TX10N 48
PCIE_NB_MXM_TX9P 48
PCIE_NB_MXM_TX9N 48
PCIE_NB_MXM_TX8P 48
PCIE_NB_MXM_TX8N 48
PCIE_NB_MXM_TX7P 48
PCIE_NB_MXM_TX7N 48
PCIE_NB_MXM_TX6P 48
PCIE_NB_MXM_TX6N 48
PCIE_NB_MXM_TX5P 48
PCIE_NB_MXM_TX5N 48
PCIE_NB_MXM_TX4P 48
PCIE_NB_MXM_TX4N 48
PCIE_NB_MXM_TX3P 48
PCIE_NB_MXM_TX3N 48
PCIE_NB_MXM_TX2P 48
PCIE_NB_MXM_TX2N 48
PCIE_NB_MXM_TX1P 48
PCIE_NB_MXM_TX1N 48
PCIE_NB_MXM_TX0P 48
PCIE_NB_MXM_TX0N 48

Tx PCIE reversed

PCIE_NBTX_C_NEWRX_P0 24
PCIE_NBTX_C_NEWRX_N0 24
PCIE_NBTX_C_WLANRX_P1 24
PCIE_NBTX_C_WLANRX_N1 24
PCIE_NBTX_C_LANRX_P2 25
PCIE_NBTX_C_LANRX_N2 25
PCIE_NBTX_C_CARDRX_P3 28
PCIE_NBTX_C_CARDRX_N3 28

ALINK_NBTX_C_SBRX_P0
ALINK_NBTX_C_SBRX_N0
ALINK_NBTX_C_SBRX_P1
ALINK_NBTX_C_SBRX_N1
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
ALINK_NBTX_C_SBRX_P3
ALINK_NBTX_C_SBRX_N3

18
18
18
18
18
18
18
18

NEW
WLAN
LAN
CARD

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-RS780M_HT LINK&PCIE(1/4)

1D1V_S0
Size
A3

Place < 100mils from pin AC8 and AB8

Document Number

Date: Monday, March 10, 2008

5

DVI_TXAOUT2+ 17
DVI_TXAOUT2- 17
DVI_TXAOUT1+ 17
DVI_TXAOUT1- 17
DVI_TXAOUT0+ 17
DVI_TXAOUT0- 17
DVI_TXACLK+ 17
DVI_TXACLK- 17

Placement: close RS780

PART 2 OF 6

PCIE I/F GFX

Rx PCIE reversed

D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

Place < 100mils from pin B25 and B24

RS780M-GP-U1

PCIE_MXM_NB_RX15P
PCIE_MXM_NB_RX15N
PCIE_MXM_NB_RX14P
PCIE_MXM_NB_RX14N
PCIE_MXM_NB_RX13P
PCIE_MXM_NB_RX13N
PCIE_MXM_NB_RX12P
PCIE_MXM_NB_RX12N
PCIE_MXM_NB_RX11P
PCIE_MXM_NB_RX11N
PCIE_MXM_NB_RX10P
PCIE_MXM_NB_RX10N
PCIE_MXM_NB_RX9P
PCIE_MXM_NB_RX9N
PCIE_MXM_NB_RX8P
PCIE_MXM_NB_RX8N
PCIE_MXM_NB_RX7P
PCIE_MXM_NB_RX7N
PCIE_MXM_NB_RX6P
PCIE_MXM_NB_RX6N
PCIE_MXM_NB_RX5P
PCIE_MXM_NB_RX5N
PCIE_MXM_NB_RX4P
PCIE_MXM_NB_RX4N
PCIE_MXM_NB_RX3P
PCIE_MXM_NB_RX3N
PCIE_MXM_NB_RX2P
PCIE_MXM_NB_RX2N
PCIE_MXM_NB_RX1P
PCIE_MXM_NB_RX1N
PCIE_MXM_NB_RX0P
PCIE_MXM_NB_RX0N

UMA

1UMA2
1UMA2
1UMA2
1UMA2
1UMA2
1UMA2
1UMA2
1
2

2 R419
301R2F-GP

U61B
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48

C405
C406
C403
C404
C400
C399
C396
C397

Rev

P1/P15

SA
Sheet
1

10

of

56

3D3V_S0

+3.3V_RUN_AVDD
L21

2
C363
SC2D2U6D3V3KX-GP

R182
3KR2F-GP

R181
3KR2F-GP

DY
2

2
R180
+1.8V_RUN_AVDDDI

2 150R2F-1-GP

0R2J-2-GP
3D3V_S0

Close to NB ball

1D1V_S0

C398
SC2D2U6D3V3KX-GP
NB_ALLOW_LDTSTOP

+1.8V_RUN_PLVDD18

1D8V_S0

C732
SC2D2U6D3V3KX-GP

37
1

2
BLM15AG221SN-GP

ENABLE External CLK GEN

15mil width

1D8V_S0

+1.8V_VDDA18HTPLL

1KR2F-3-GP
R165
2
1
R172
1KR2F-3-GP

VDDA18HTPLL

+1.8V_VDDA18PCIEPLL

D7
E7

VDDA18PCIEPLL1
VDDA18PCIEPLL2

D8
A10
C10
C12

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP

C25
C24

HT_REFCLKP
HT_REFCLKN

E11
F11

REFCLK_P/OSCIN
REFCLK_N

NB_PWRGD

3,55 CLK_NB_14M

18

DP_AUX0N

SB
3D3V_S0

GPIO MODE

1
2

C359
SC2D2U6D3V3KX-GP

+1.8V_VDDA18PCIEPLL
L20
1
2
BLM18BB221SN1D-GP

GFX_REFCLKP
GFX_REFCLKN

3 CLK_NBGPP_CLK
3 CLK_NBGPP_CLK#

U1
U2

GPP_REFCLKP
GPP_REFCLKN

V4
V3

GPPSB_REFCLKP
GPPSB_REFCLKN

B9
A9
B8
A8
B7
A7

I2C_CLK
I2C_DATA
DDC_CLK0/AUX0P
DDC_DATA0/AUX0N
DDC_DATA0/AUX0N DDC_CLK0/AUX0P
DDC_CLK1/AUX1P
DDC_DATA1/AUX1N

VCC_NB

*1

1.0V 1.1V

VGA
16 DVI_DDCLK
16 DVI_DDCDAT
R425
1
2
10KR2J-3-GP
TP10
R427
1
2

DVI_DDCLK
DVI_DDCDAT
STRP_DATA
1

B10

NB_RESERVED G11

MIS.

STRP_DATA
RESERVED

A22
B22
A21
B21
B20
A20
A19
B19

NB_TXAOUT0+
NB_TXAOUT0NB_TXAOUT1+
NB_TXAOUT1NB_TXAOUT2+
NB_TXAOUT2-

14
14
14
14
14
14

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

B18
A18
A17
B17
D20
D21
D18
D19

NB_TXBOUT0+
NB_TXBOUT0NB_TXBOUT1+
NB_TXBOUT1NB_TXBOUT2+
NB_TXBOUT2-

14
14
14
14
14
14

TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN

B16
A16
D16
D17

NB_TXACLK+
NB_TXACLKNB_TXBCLK+
NB_TXBCLK-

RS780_AUX_CAL

C8

150R2F-1-GP

14
14
14
14

1D8V_S0

VDDLTP18
VSSLTP18

A13
B13

VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2

A15
B15
A14
B14

VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7

C14
D15
C16
C18
C20
E20
C22

LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL

E9
F7
G12

+1.8V_RUN_VDDLP18
C730
SC2D2U6D3V3KX-GP

+1.8V_RUN_VDDLT18

C723
SC4D7U6D3V3KX-GP

TMDS_HPD
HPD

D9
D10

SUS_STAT#

D12

THERMALDIODE_P
THERMALDIODE_N

AE8
AD8

TESTMODE

1
2
BLM15AG221SN-GP

L54
1
2
BLM15AG221SN-GP
C722
SCD1U10V2KX-4GP

NB_LVDS_DIGON 15
PANEL_BKEN 34
R174 1

DY

21K27R2F-L-GP

R169 1

DY

21K27R2F-L-GP

R167 1

DY

2100KR2J-1-GP

SB
B

NB_HDMI_HPD 17
DVI_A_HPD
17
SUS_STAT#_R

D13 TESTMODE_NB

AUX_CAL

R173 1

2 0R2J-2-GP

SUS_STAT#

NB_THERMDP 23

C936
SC470P50V2KX-3GP

19

pull up
form SB

NB_THERMDN 23

SB
R424
1K8R2F-GP

RS780M-GP-U1

C348
SCD1U10V2KX-4GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-RS780M_LVDS&CRT_(2/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

L55

T2
T1

2 0R2J-2-GP

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

STRP_DATA

1 R426

PART 3 OF 6

3 CLK_NB_GFX
3 CLK_NB_GFX#

3 CLK_NB_GPPSB
3 CLK_NB_GPPSB#
15 NB_LCD_DDCLK
15 NB_LCD_DDCDAT

1D8V_S0

NB_REFCLK_N

C305
SCD1U10V2KX-4GP

15mil width

NB_LDT_STOP#
NB_ALLOW_LDTSTOP

3 CLK_NBHT_CLK
3 CLK_NBHT_CLK#

C294
SC2D2U6D3V3KX-GP

2
BLM15AG221SN-GP
1

DAC_HSYNC
DAC_VSYNC
DAC_SCL
DAC_SDA

H17

L18
B

A11
B11
F8
E8

+1.8V_VDDA18HTPLL

C346
SCD1U10V2KX-4GP

1D1V_S0

RED
REDb
GREEN
GREENb
BLUE
BLUEb

PLLVDD
PLLVDD18
PLLVSS

SYSREST#
1

G18
G17
E18
F18
E19
F19

DAC_RSET

L56

6 CPU_LDT_REQ#

C_Pr
Y
COMP_Pb

A12
D14
B12

1
R171

0R2J-2-GP
R186
0R2J-2-GP

E17
F17
F15

G14

2
BLM15AG221SN-GP

2DAC_RSET
715R2F-GP

R185
1

+1.1V_RUN_PLLVDD
L24

DY R189
4K7R2F-GP

18 ALLOW_LDTSTOP

16 NB_CRT_HSYNC
16 NB_CRT_VSYNC
16 NB_CRT_DDCCLK
16 NB_CRT_DDCDATA

AVDD1
AVDD2
AVDDDI
AVSSDI
AVDDQ
AVSSQ

2 150R2F-1-GP

R168 1

F12
E12
F14
G15
H15
H14

R170 1

Selects Loading of STRAPS From EEPROM

Bypass the loading of EEPROM straps and use Hardware Default Values
*10 :: I2C
Master can load strap values from EEPROM if connected,
or use default values if not connected

6 LDT_STP#_CPU

14 NB_CRT_BLUE

NB_LDT_STOP#

2 133R2F-GP

SUS_STAT#

14 NB_CRT_GREEN

R163 1

1 : Disable

DY
R436

R441
4K7R2F-GP

SC
NB_CRT_RED

: Enable

U61C

3D3V_S0

14

*0

NB_PWRGD

R428
DY 3KR2F-GP

close NB within 1000 mil

RS780: Enables Side port memory ( RS780 use HSYNC)

1
2

C393
SC2D2U6D3V3KX-GP

R177
1
2
BLM18BB221SN1D-GP
R430
300R2J-4-GP

DY

+1.8V_RUN_AVDDQ

1D8V_S0

C316
SCD1U10V2KX-4GP

1D8V_S0

0R3-0-U-GP

R429
3KR2F-GP

CRT/TVOUT

PLL PWR
LVTM

SYSREST#
0R2J-2-GP

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC)

0 : Enable
1 : Disable

1D8V_S0
0R2J-2-GP

DY

C410
SC2D2U6D3V3KX-GP

1
R438
1
R442

6 LDT_RST#_CPU
18,27,34,37 PLTRST#

NB_CRT_VSYNC
NB_CRT_HSYNC

CLOCKs PM

33ohm 3A

BLM18PG330SN1D-GP

STRAP_DEBUG_BUS_GPIO_ENABLE

SSID = N.B

3D3V_S0

Rev

P1/P15

SA
Sheet
1

11

of

56

U61D

MEM_COMPP
MEM_COMPN

IOPLLVSS

AD23

MEM_VREF

AE18

BLM15AG221SN-GP

MEM_VREF_NB

C187

C182
SCD1U10V2KX-4GP

+1.8V_MEM_VDDQ

RS780M-GP-U1

R119
1KR2F-3-GP
C

SC
U21
L2
L3

BA0
BA1

MEM_A12
MEM_A11
MEM_A10
MEM_A9
MEM_A8
MEM_A7
MEM_A6
MEM_A5
MEM_A4
MEM_A3
MEM_A2
MEM_A1
MEM_A0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

R116
2 100R2F-L1-GP-U
K8
J8

CKE

CKE

CS#

L8

CS

WE#

K3

WE

RAS#

K7

RAS

CAS#

L7

CAS

MEM_DM0
MEM_DM1

F3
B3

LDM
UDM

ODT
+1.8V_MEM_VDDQ

K9
F7
E8

LDQS
LDQS

MEM_DQS1P
MEM_DQS1N

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

2
1
1

R100
1KR2F-3-GP

C104
SCD1U10V2KX-4GP

MEM_BA2

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDL
VSSDL

MEM_DQS0P
MEM_DQS0N

MEM_VREF_CHIP

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

J1
J7

ODT

1
1

R93
1KR2F-3-GP

C100
SCD1U10V2KX-4GP

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

C188

+1.8V_MEM_VDDQ

CK
CK

K2

L4
BLM18AG601SN-3GP

600 ohm @ 100MHz,200mA

VDDL_VRAM

DY

R122
1KR2F-3-GP

C152

Layout Note: 50 mil for VSSDL

1

MEM_DQ15
MEM_DQ14
MEM_DQ13
MEM_DQ12
MEM_DQ11
MEM_DQ10
MEM_DQ9
MEM_DQ8
MEM_DQ7
MEM_DQ6
MEM_DQ5
MEM_DQ4
MEM_DQ3
MEM_DQ2
MEM_DQ1
MEM_DQ0

ATI DY
MEM_CLKN
MEM_CLKP

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

MEM_BA0
MEM_BA1

AE12
AD12

IOPLLVDD18
IOPLLVDD

+1.8V_IOPLLVDD18
+1.1V_IOPLLVDD

MEM_COMPP
MEM_COMPN

MEM_CKP
MEM_CKN

MEM_DM0
MEM_DM1

AE23
AE24

R360
40D2R2F-GP

V15
W14

W17
AE19

1D1V_S0

L15

15mil width

SCD1U10V2KX-4GPSCD1U10V2KX-4GP

MEM_CLKP
40D2R2F-GP MEM_CLKN
R120
1
2
1
2

MEM_DM0
MEM_DM1/DVO_D8

MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT

MEM_DQS0P
MEM_DQS0N
MEM_DQS1P
MEM_DQS1N

BLM15AG221SN-GP
C153
SC2D2U6D3V3KX-GP

W12
Y12
AD18
AB13
AB18
V14

Y17
W18
AD20
AE21

RAS#
CAS#
WE#
CS#
CKE
ODT

MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N

1
1

MEM_BA0
MEM_BA1
MEM_BA2

1D8V_S0

L8

15mil width

AD16
AE17
AD17

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

SC2D2U6D3V3KX-GP

+1.8V_MEM_VDDQ

MEM_BA0
MEM_BA1
MEM_BA2

MEM_COMP_P and MEM_COMP_N trace

width >=10mils and 10mils spacing from
other Signals in X,Y,Z directions

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15

MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
MEM_DQ3/DVO_D0
MEM_DQ4
MEM_DQ5/DVO_D1
MEM_DQ6/DVO_D2
MEM_DQ7/DVO_D4
MEM_DQ8/DVO_D3
MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6
MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9
MEM_DQ14/DVO_D10
MEM_DQ15/DVO_D11

C106

C105

1
2

C141

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

TP8
SC1U6D3V2KX-GP

C140

SCD1U10V2KX-4GP

C102

SCD1U10V2KX-4GP

1
2
BLM21PG221SN-1GP

220 ohm @ 100MHz,2A

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13

+1.8V_MEM_VDDQ

L5

1D8V_S0

PAR 4 OF 6
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14

SBD_MEM/DVO_I/F

SSID = N.B

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
1MEM_A13

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

C103
SC1U6D3V3KX-1GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

HYB18T512161B2F-25-GP
72.18512.M0U

Title

ATi-RS780M_SidePort_(3/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

12

of

56

SSID = N.B
D

U61F

0.6A per ANT Rev1.1, Page3

L17

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

DY

1
2
BLM21PG221SN-1GP
C150

C156

220 ohm @ 100MHz, 2A

2

C162

1
2

1
2

1
2

C169

3D3V_S0

+3.3V_RUN_VDD33
C290

1
2

1
2

1
2

C208

L7

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

PART 6/6

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2

AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15

RS780M-GP-U1

1
2
R175
0R3-0-U-GP
C369

1
2

1
1
2

POWER

1
2

1
2

C249

15mil width
H11
H12

1
2

1
2

2
2

AE10
AA11
Y11
AD10
AB10
AC10

1
2

1
2

1
2

1
2
1
2

+1.8V_RUN_MEM
SC4D7U6D3V3KX-GP

DY

C275

SC10U6D3V5KX-1GP

C183

SC10U6D3V5KX-1GP

DY

C291

SCD1U10V2KX-4GP

RS780M-GP-U1

VDD33_1
VDD33_2

C754

1D8V_S0

SCD1U10V2KX-4GP

15mil width

SC

C197

VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2

C303

15mil width

SCD1U10V2KX-4GP

0R0603-PAD

F9
G9
AE11
AD11

1D1V_S0
SCD1U10V2KX-4GP

+1.8V_RUN_VDD18_MEM

DY

C367

SCD1U10V2KX-4GP

C752

SCD1U10V2KX-4GP

R124

C255

SCD1U10V2KX-4GP

220 ohm @ 100MHz, 2A

+NB_VCORE

SCD1U10V2KX-4GP

1D8V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C326

VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6

1
2
BLM21PG221SN-1GP

C381

RS780M: 1V ~ 1.1V, check PWR team

SCD1U10V2KX-4GP

15mil width

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

C384

Per check list (Rev 0.02)

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C254

J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10

K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16

C374

7A per ANT Rev1.1, Page3

SCD1U10V2KX-4GP

C244

+1.8V_RUN_VDDA18PCIE
C225
C189
C279
SCD1U10V2KX-4GP

C177

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C164

SCD1U10V2KX-4GP

1D8V_S0

+1.2V_RUN_VDDHTTX
C233
C181

20mil width
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

220 ohm @ 100MHz,2A

C216

SCD1U10V2KX-4GP

L11

1
2
BLM21PG221SN-1GP

SCD1U10V2KX-4GP

1D8V_S0

SC4D7U6D3V3KX-GP

220 ohm @ 100MHz,2A

C194

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

+1.1V_RUN_VDDPCIE
C385
C238

SCD1U10V2KX-4GP

L12

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

SCD1U10V2KX-4GP

AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17

1D2V_S0
1
2
BLM21PG221SN-1GP

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

SC4D7U6D3V3KX-GP

+1.1V_RUN_VDDHTRX
C375
C323
C324
SCD1U10V2KX-4GP

C352

SCD1U10V2KX-4GP

FOR version A12

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

220 ohm @ 100MHz,2A

H18
G19
F20
E21
D22
B23
A23

PART 5/6

SC1U6D3V2KX-GP

0.45A per ANT Rev1.1, Page3

L19
1
2
BLM21PG221SN-1GP

VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

L23

100mil Width

SC1U6D3V2KX-GP

1D1V_S0

J17
K16
L16
M16
P16
R16
T16

SCD1U10V2KX-4GP

U61E
SCD1U10V2KX-4GP

+1.1V_RUN_VDDHT
C250
C258
SCD1U10V2KX-4GP

C276

C251

SCD1U10V2KX-4GP

220 ohm @ 100MHz,2A

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

1
2
BLM21PG221SN-1GP

1D1V_S0

0.7A per ANT Rev1.1, Page3

GROUND

1D1V_S0

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-RS780M_PWR&GD_(4/4)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

13

of

56

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

5
8
13
18
20
30
40
42

U14

TXACLK-

A0

TXACLK+

A1

15

TXAOUT0-

A2

15

TXAOUT0+

A3

15

TXAOUT1-

11

A4

15

TXAOUT1+

12

A5

15

TXAOUT2-

15

A6

15

TXAOUT2+

16

A7

GPIO_SEL_R

1
2

38
37
36
35
29
28
27
26

NB_TXACLK- 11
NB_TXACLK+ 11
NB_TXAOUT0- 11
NB_TXAOUT0+ 11
NB_TXAOUT1- 11
NB_TXAOUT1+ 11
NB_TXAOUT2- 11
NB_TXAOUT2+ 11

B2_0
B2_1
B2_2
B2_3
B2_4
B2_5
B2_6
B2_7

34
33
32
31
25
24
23
22

GPU_TXACLK- 49
GPU_TXACLK+ 49
GPU_TXAOUT0- 49
GPU_TXAOUT0+ 49
GPU_TXAOUT1- 49
GPU_TXAOUT1+ 49
GPU_TXAOUT2- 49
GPU_TXAOUT2+ 49

PE_GPIO2

R90

R114
10KR2J-3-GP

VGA

SEL

1
4
10
14
17
19
21
39
41
43

VGA

PI2PCIE412-DZHE-GP

SC

3D3V_S0

15

TXBCLK+

A1

15

TXBOUT0-

A2

15

TXBOUT0+

A3

15

TXBOUT1-

11

A4

15

TXBOUT1+

12

A5

15

TXBOUT2-

15

A6

15

TXBOUT2+

16

A7

38
37
36
35
29
28
27
26

NB_TXBCLK- 11
NB_TXBCLK+ 11
NB_TXBOUT0- 11
NB_TXBOUT0+ 11
NB_TXBOUT1- 11
NB_TXBOUT1+ 11
NB_TXBOUT2- 11
NB_TXBOUT2+ 11

B2_0
B2_1
B2_2
B2_3
B2_4
B2_5
B2_6
B2_7

34
33
32
31
25
24
23
22

GPU_TXBCLK- 49
GPU_TXBCLK+ 49
GPU_TXBOUT0- 49
GPU_TXBOUT0+ 49
GPU_TXBOUT1- 49
GPU_TXBOUT1+ 49
GPU_TXBOUT2- 49
GPU_TXBOUT2+ 49

2
D

1
2

SCD1U10V2KX-4GP

PX_EN#

Q48
2N7002-11-GP
PX_EN

UMA CRT_RED

2 0R2J-2-GP

UMA CRT_GREEN

NB_CRT_BLUE

2 0R2J-2-GP

UMA CRT_BLUE

RN2

SRN0J-6-GP
NB_TXAOUT01
NB_TXAOUT0+
2

RN3

SRN0J-6-GP
NB_TXAOUT11
NB_TXAOUT1+
2

RN4

SRN0J-6-GP
NB_TXAOUT21
NB_TXAOUT2+
2

RN5

SRN0J-6-GP
NB_TXBCLK1
NB_TXBCLK+
2

RN6

SRN0J-6-GP
NB_TXBOUT01
NB_TXBOUT0+
2

RN7

SRN0J-6-GP
NB_TXBOUT11
NB_TXBOUT1+
2

RN8

SRN0J-6-GP
NB_TXBOUT21
NB_TXBOUT2+
2

RN9

4
3
4
3

UMA

TXACLKTXACLK+

UMA

TXAOUT0TXAOUT0+

UMA

4
3

UMA

4
3

TXAOUT1TXAOUT1+
TXAOUT2TXAOUT2+

UMA_WSXGA
TXBCLK-

4
3

TXBCLK+

UMA_WSXGA
TXBOUT0-

4
3

TXBOUT0+

UMA_WSXGA
TXBOUT1-

4
3

TXBOUT1+

UMA_WSXGA
TXBOUT2-

4
3

TXBOUT2+
B

3D3V_S0

VGA

R92 1

SRN0J-6-GP
NB_TXACLK1
NB_TXACLK+
2

SB
R81
2K2R2J-2-GP

VGA

SC

SEL

PE_GPIO2

Q49
2N7002-11-GP
D

18 INT_VGA_TV_EN#

PX_EN#

GPIO SEL :

1
4
10
14
17
19
21
39
41
43

H : SELECTION EXTERNAL GRAPHIC

L : SELECTION INTERNAL GRAPHIC

Q4
2N7002-11-GP
PI2PCIE412-DZHE-GP

16

VGA

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GPIO_SEL_R

B1_0
B1_1
B1_2
B1_3
B1_4
B1_5
B1_6
B1_7

VGA

2 0R2J-2-GP

A0

R675
10KR2J-3-GP

C123

R84 1

NB_CRT_GREEN R82 1

NB_CRT_BLUE 11
GPU_CRT_BLUE 49
CRT_BLUE
16

TXBCLK-

VCC
EN#
S1D
S2D
DD
S1C
S2C
DC

15

SCD1U10V2KX-4GP

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

5
8
13
18
20
30
40
42

U20

C139

VGA

VGA

SCD1U10V2KX-4GP

VGA

1D8V_S0

C121

SCD1U10V2KX-4GP
C99
1

16
15
14
13
12
11
10
9

VGA

VGA

VGA
U10
1 IN
2 0R0402-PAD
2 S1A
3 S2A
4 DA
5 S1B
6 S2B
7 DB
8 GND

PI5V330SQE-GP

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

10KR2J-3-GP

11 NB_CRT_RED
49 GPU_CRT_RED
16 CRT_RED
11 NB_CRT_GREEN
49 GPU_CRT_GREEN
16 CRT_GREEN

B1_0
B1_1
B1_2
B1_3
B1_4
B1_5
B1_6
B1_7

5V_S0

SC

NB_CRT_RED

R115
PE_GPIO2

C98

VGA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2
D

15

C137

VGA

SCD1U10V2KX-4GP

C138

VGA

15

1D8V_S0

18

PX_EN

VGA

G
S

VGA_WSXGA

<Variant Name>

Wistron Corporation

18 PE_GPIO2_NB

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

CRT / LVDS MUX

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

14

of

56

3D3V_S0

R96
4K7R2F-GP

LCD CONNECTOR

2
1 R94

11 NB_LCD_DDCLK

2 0R2J-2-GP

3.3V_DELAY
1

C83

SCD1U25V3KX-GP

LCD1
SC10U25V6KX-1GP

R91
4K7R2F-GP

VGA

CAMERA_EN
S

ID_CLK

5V_CAM_S0

VGA

C97

ID_CLK
ID_DAT

Q5
2N7002-11-GP

49 GPU_EDID_CLK

C78

DCBATOUT

3D3V_S0
2

35 BRIGHTNESS

SCD1U16V2ZY-2GP

R102
4K7R2F-GP

11 NB_LCD_DDCDAT

1 R98

19,55
19,55

2 0R2J-2-GP

3.3V_DELAY

BLON_OUT

34

USBP3USBP3+

R103 3D3V_S0

2
49 GPU_EDID_DATA

SCD1U16V2ZY-2GP

14
14
14
14
14
14

4
3
2
1

1
2

20

21

40

C128
SCD1U16V2ZY-2GP

sc
CAMERA_EN 34
5V_CAM_S0

R83
100KR2J-1-GP

G5281RC1U-GP
74.05281.093

C89
SC1U10V2KX-1GP
B

GND
EN
OUT
IN#1

TXBOUT0TXBOUT0+
TXBOUT1TXBOUT1+
TXBOUT2TXBOUT2+

1
2

C93
SCD1U16V2ZY-2GP

0R3-0-U-GP

IN#5
IN#6
IN#7
IN#8
GND

SC10U10V5KX-2GP

DY

R678
1

C131

LCDVDD_S0

5
6
7
8
9

14
14

TOP VIEW

CAMERA POWER

5V_S0

TXBCLKTXBCLK+

20.F1047.040

VGA

U9

14
14
14
14
14
14

40
41

ID_DAT

TXAOUT0TXAOUT0+
TXAOUT1TXAOUT1+
TXAOUT2TXAOUT2+

EC7

10KR2F-2-GP

2
Q6
2N7002-11-GP

14
14

ACES-CONN40C-1-GP-U2

R101
4K7R2F-GP

VGA

TXACLKTXACLK+

42
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

LCDVDD_S0

U19
5
6
7
8
9

IN#5
IN#6
IN#7
IN#8
GND

U18
GND
EN
OUT
IN#1

4
3
2
1

LCDVDD_ON

NB_LVDS_DIGON

GPU_LCDVDD_ON

11

SCD1U16V2ZY-2GP

C113

3D3V_S0

C110
SC1U10V2KX-1GP

49

CH715FPT-GP
R99
100KR2J-1-GP
2

G5281RC1U-GP
74.05281.093

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LCD CONN/CAMERA
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

15

of

56

CRT I/F & CONNECTOR

D

CN2
16

Layout Note:
Place these resistors close to the CRT-out connector

NP1
6
11

SB
CRT_RED

14 CRT_GREEN

CRT_B

17

CRT_G

5V_CRT1_S0

17

CRT_B

5V_CRT_S0

17

13
3

CRT_B

14

JVGA_VS

POLYSW-1A6V-3-GP

VGA

CRT_DDCCLK
1

VGA

10
15
5

C585

NP2
17

SCD01U50V2ZY-1GP

VIDEO-15-84-GP-U

VGA

SB

VGA

R312
20KR2F-L-GP

5V_CRT1_S0

20.20735.015
PE_GPIO2#

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP

1
SC3D3P50V2CN-GP

SC

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP

EC19

EC21

SC3D3P50V2CN-GP

EC20

150R2F-1-GP

150R2F-1-GP

EC22

CRT_DDCDATA

3D3V_S0

EC24

CRT_R

12
2

F1
K

RB751V-40-2-GP

EC23

CRT_G
JVGA_HS

D19
A

5V_S0

VGA
1

150R2F-1-GP

R311

R308

R307

CRT_G

1
2
MLB-201209-24-GP

CRT_R

CRT_BLUE
1

14

1
2
MLB-201209-24-GP
L42

14

CRT_R

1
7

L43
1
2
MLB-201209-24-GP
L44

D17

PE_GPIO2

Q16
2N7002-11-GP
G

CRT_R

VGA

SB

3
1

Hsync & Vsync level shift

14

PE_GPIO2

DY

SB

BAV99-5-GP

3D3V_S0

5V_S0
D18

5V_CRT1_S0

3D3V_S0

5V_DVI1_S0

11 NB_CRT_VSYNC

C587
SCD1U10V2KX-4GP

DY

U47A
SSAHCT125PWR-GP
3

D16

7
2 R294

VGA
1

DY
BAV99-5-GP

SB
RN36
5V_CRT1_S0

3D3V_S0

2
1

HSYNC_5

5V_S0

R306
1
2

D
G

Q15
2N7002-11-GP

10

14

R297

5V_DVI1_S0

11 NB_CRT_HSYNC

CRT_DDCDATA

49 GPU_CRT_HSYNC

17
17

SRN33J-5-GP-U

<Variant Name>

17
12

11

CRT_DDCDATA

JVGA_VS
JVGA_HS

U47C
SSAHCT125PWR-GP
8

4K7R2J-2-GP
D

VGA

SB
UMA

JVGA_VS
JVGA_HS

0R2J-2-GP

PE_GPIO2#

VGA

3
4

Q14
2N7002-11-GP

VGA

1
2

R310

UMA

13

0R2J-2-GP

49 GPU_CRT_DDCDATA

PE_GPIO2
R303

14

11 NB_CRT_DDCDATA

4K7R2J-2-GP

0R2J-2-GP
R651
2
VGA1

R299

4K7R2J-2-GP

UMA1

4K7R2J-2-GP

R650
2

U47B
SSAHCT125PWR-GP 0R2J-2-GP

3D3V_S0

DVI_DDCDAT

BAV99-5-GP

CRT_B

17
49 GPU_CRT_VSYNC

11

2
CRT_DDCCLK

CRT_DDCCLK

VGA

SB

CRT_G

4K7R2J-2-GP

SB

14

R296

14

Q13
2N7002-11-GP

0R2J-2-GP

49 GPU_CRT_DDCCLK

UMA

0R2J-2-GP

PE_GPIO2#

SB

VGA

UMA

1
2

2 R313

PE_GPIO2

R302

VGA

1
R309

Q17
2N7002-11-GP

0R2J-2-GP
R649
2
VGA1

11 NB_CRT_DDCCLK

R300

UMA1

4K7R2J-2-GP

11 DVI_DDCLK

4K7R2J-2-GP

4K7R2J-2-GP

SB
R648
2

14

2 R298

U47D
SSAHCT125PWR-GP

VGA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

0R2J-2-GP
Title

CRT CONN
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

16

of

56

SC3D3P50V2CN-GP

DY

DVI_TXAOUT2+

DY

1
R290
1
R288
1
R291
1
R289
1
R283
1
R284

1
SC3D3P50V2CN-GP

DY

DVI_TXAOUT2-

DY

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP
DVI_TXAOUT0- 2

DY

DVI_TXAOUT1-

DY

DVI_TXAOUT1+

DY

SC3D3P50V2CN-GP

SC3D3P50V2CN-GP
DVI_TXAOUT0+ 2

EC93

EC92

DVI_TXACLK+

EC91

DVI_TXACLK-

DY

EC90

EC89

SC3D3P50V2CN-GP

EC88

EC87

EC86
SC3D3P50V2CN-GP

SC

TMDS_PL

UMA 499R2F-2-GP
UMA
UMA
UMA
UMA
UMA

2
499R2F-2-GP
2
499R2F-2-GP
2
499R2F-2-GP
2
499R2F-2-GP
2
499R2F-2-GP

1
R286
1
R287

UMA 499R2F-2-GP
2

UMA 499R2F-2-GP

SC
CN3

3D3V_S0

25

5V_HDMI1_S0
3D3V_S0

11

UMA

SB
5V_S0

UMA

VGA

HDMI_CLK11
HDMI_DAT11

5V_DVI1_S0
RB521S-30-2-GP
F2
UMAD15
A
K
1

DVI_A_HPD

C586

5V_DVI_S0
POLYSW-1A6V-3-GP
2
10
DVI_TXACLK+

UMA

10

DVI_TXACLK-

DVI_A_HPD_R

UMA
Q10

17
9
18
10
19
11
20
12
21
13
22
14
23
15
24
16
C3
C5
C4

DVI_TXAOUT0DVI_TXAOUT1DVI_TXAOUT0+
DVI_TXAOUT1+

2
20KR2J-L2-GP

R282

2K2R2J-2-GP

VGA

1
R292

100KR2J-1-GP

49 HDMI_DDCDATA

R274

D G S

49 HDMI_DDCCLK

R276
2K2R2J-2-GP
2
1

1
2

1
2

VGA

S G D

VGA

R275
4K7R2J-2-GP

4K7R2J-2-GP

DVI_A_HPD_R
R272

10
10
10
10

2N7002DW-7F-GP
SCD01U16V2KX-3GP

VGA

16

CRT_B

16

JVGA_HS

NP1
1
2

DVI_TXAOUT2- 10
DVI_TXAOUT2+ 10

3
4
5
6

CRT_DDCCLK

CRT_DDCDATA

JVGA_VS

C1
C6
NP2
C2
26

16
16

16

CRT_R

16

CRT_G

16
C

FOX-CONN24-3R-5GP
20.20759.024

1
R267

VGA 499R2F-2-GP

1
R266

VGA 499R2F-2-GP

1
R265

VGA 499R2F-2-GP

1
R264

VGA 499R2F-2-GP

1
R263

VGA

2
499R2F-2-GP

1
R269

VGA 499R2F-2-GP

1
R268

VGA

2
499R2F-2-GP

1
R270

VGA 499R2F-2-GP

UMA

5V_S0

TMDS_PL
D

2
2

Q11
2N7002-11-GP

SC
5V_S0

HDMI_TXD2

49

5V_HDMI1_S0
RB521S-30-2-GP
F3
DY D36
A
K
1

C945
HDMI_TXD2#
HDMI_TXD1

49
49

HDMI_TXD1#
HDMI_TXD0

49
49

HDMI_TXD0#
HDMI_CLK

49

HDMI_CLK#

VGA

1
2
0R3-0-U-GP

SCD01U16V2KX-3GP

5V_HDMI_S0

VGA

VGA

HDMI1
POLYSW-1A6V-3-GP
2

VGA

R677

49
49

100KR2J-1-GP

R285

18

HDMI_TXD0
HDMI_TXD0#
HDMI_TXD1
HDMI_TXD1#
HDMI_TXD2
HDMI_TXD2#

HDMI_CLK
HDMI_CLK#

HDMI_CLK11
HDMI_DAT11

SCL
SDA

15
16

CEC
DDC/CEC_GROUNG
HOT_PLUG_DETECT

13
17
19

HDMI_CEC

RESERVED#14

14

HDMI_CNC

GND
GND
GND
GND

20
21
22
23

+5V_POWER

7
9
4
6
1
3

TMDS_DATA0+
TMDS_DATA0TMDS_DATA1+
TMDS_DATA1TMDS_DATA2+
TMDS_DATA2-

8
5
2

TMDS_DATA0_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD

11
10
12

TMDS_CLOCK_SHIELD
TMDS_CLOCK+
TMDS_CLOCK-

TP39

HDMI_DET_K
1

TP38

R271
3D3V_S0

HDMI_DET_K

49

HDMI_HDP

R295 1

VGA

VGA
2 0R2J-2-GP 2

SB
D21

Q12
CH3904PT-GP

VGA

R262
200KR2F-L-GP

B
<Variant Name>

2
A

VGA

62.10078.121

200KR2F-L-GP

1
R293
22KR2F-GP

VGA

SKT-USB-179-GP

VGA

3D3V_S0

CH751H-40PT
R301 1

Wistron Corporation

2 0R2J-2-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

11 NB_HDMI_HPD

R305
2K2R2J-2-GP

SC
2

VGA

Title

DVI & HDMI CONN

VGA

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

17

of

56

M24
M25

NB_HT_CLKP
NB_HT_CLKN

P17
M18

CPU_HT_CLKP
CPU_HT_CLKN

M23
M22

SLT_GFX_CLKP
SLT_GFX_CLKN

DY
2

2
20MR3-GP

GPP_CLK2P
GPP_CLK2N

N22
P22

GPP_CLK3P
GPP_CLK3N

L18
1

C779
SC12P50V2JN-3GP

25M_48M_66M_OSC

J21

25M_X1

TPAD28
J20

C775
SC12P50V2JN-3GP

SC
32K_X2

0R0402-PAD
R461
2

32K_X2_R

A3

X1

B3

X2

1D8V_S0
R485

LPC

X7
X-32D768KHZ-38GPU

RTC XTAL

R465
20MR3-GP

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ

G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

25M_X2

ALLOW_LDTSTP
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#

RTCCLK
INTRUDER_ALERT#
VBAT

U87
PLTRST_SYS#

PE_GPIO0

VGA

TMDS_HPD0 MXM HOT PLUG

VCC

3.3V_DELAY

GND

MXM_RST#

SC

R578
4K7R2F-GP

DY

SNLVC1G08DCKRG4-GP

DY

D30

24,25,28,36,37 PLTRST_SYS#

CH751H-40PT

DY
PE_GPIO0
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30

22
22
22
22
22
22
22
22

DY

D29

MXM_RST#

48

CH751H-40PT
R579
2K2R2F-GP

3D3V_S0

R567
4K7R2F-GP

VGA
VGA

3D3V_S0

SC

11

D26

DP_AUX0N

CH751H-40PT

DY

VGA

R676
8K2R2J-3-GP

14

PX_EN

PX_EN

DY
INT_VGA_TV_EN# 14

VGA 0R2J-2-GP
R575
1

VGA
R576

D27

3D3V_S0

PE_GPIO2_NB 14

CH751H-40PT
R563
2K2R2F-GP

8K2R2J-3-GP

PE_GPIO1

43,47

3D3V_S0
B

PM_CLKRUN# 34

PX_EN

R241
10KR2J-3-GP DY

0R2J-2-GP
1
2PE_GPIO0
R569VGA

LPCCLK0_R R483 1
LPCCLK1_R R484 1

2 22R2J-2-GP
2 22R2J-2-GP
LPC_LAD0 34,36
LPC_LAD1 34,36
LPC_LAD2 34,36
LPC_LAD3 34,36
LPC_LFRAME# 34,36

IRQ_SERIRQ
RTCCLK
INTRUDER_ALERT#
+VBAT_IN
C787

LPCCLK0
LPCCLK1

10KR2J-3-GP R577
1

SB700_GPIO65

SCD1U16V2KX-3GP

SB700-1-GP-U

C3
C2
B2

H: Enable

PE_GPIO2 MODE SWITCH

SC1U6D3V2KX-GP

RTC

F23
F24
F22
G25
G24

CPU

1
2
300R2J-4-GP
11 ALLOW_LDTSTOP
6 CPU_PROCHOT#
6 CPU_PWRGD
6 CPU_LDT_STOP#
6 CPU_LDT_RST#

PE_GPIO1 MXM POWER ENABLE

AD3
AC4
AE2
AE3

3D3V_S0

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

M19
M20

TP31

32K_X1

GPP_CLK1P
GPP_CLK1N

CLOCK GENERATOR

1
R467

GPP_CLK0P
GPP_CLK0N

SC

H: Enable

NB_DISP_CLKP
NB_DISP_CLKN

TPAD28

PE_GPIO0 MXM RESET

K23
K22

POWER EXPRESS SUPPORT

34
49K9R2F-L-GP +RTC_CELL
22,23
R496
1
2
1
2

C788

R235
IRQ_SERIRQ

3D3V_S0

3D3V_AUX_S5

R489
0R2J-2-GP
D25
BAT54CW-1-GP
+3.3V_ALW_2_R
1
DY

+COIN_CELL

DY

RTC1
4

1
2
3

2
1

R491
510R2J-1-GP

2
8K2R2J-3-GP

DY
22,34,55
22,36,55

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

PCI INTERFACE

N25
N24

L20
L19

CLK_PCI_DEBUG 22
CLK_PCI_5035 22
CLK_PCI_5028 22
PCI_CLK4
22
PCI_CLK5
22

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

J19
J18

22R2J-2-GP
22R2J-2-GP
22R2J-2-GP
22R2J-2-GP
22R2J-2-GP

40mA

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#

Place R <100mils form pins T25,T24

3 CLK_PCIE_SB
3 CLK_PCIE_SB#

2
2
2
2
2

PCIE_PVSS

1
1
1
1
1

P25

N1

R544
R529
R538
R553
R550

C520

PCIRST#

PCI_CLK1_R
PCI_CLK2_R
PCI_CLK3_R
PCI_CLK4_R
PCI_CLK5_R

PCIE_CALRP
PCIE_CALRN
PCIE_PVDD

P4
P3
P1
P2
T4
T3

T25
T24

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

P24

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41

TP77

1
2

C511

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

200 ohm 2A

PCIE_CALRP
2 562R2F-GP
2 2K05R2F-GP PCIE_CALRN

1
1

20mil Width

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

R516
R229

L30
1
2
BLM21PG221SN-1GP

Part 1 of 5

+1.2V_PCIE_VDDR

U22
U21
U19
V19
R20
R21
R18
R17

ALINK_NBTX_C_SBRX_P0
ALINK_NBTX_C_SBRX_N0
ALINK_NBTX_C_SBRX_P1
ALINK_NBTX_C_SBRX_N1
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
ALINK_NBTX_C_SBRX_P3
ALINK_NBTX_C_SBRX_N3

SB700
A_RST#

10
10
10
10
10
10
10
10

V23
V22
V24
V25
U25
U24
T23
T22

2
R495
0R2J-2-GP

5
ETY-CON3-4-GP

<Variant Name>

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

ALINK_NBRX_C_SBTX_P0
ALINK_NBRX_C_SBTX_N0
ALINK_NBRX_C_SBTX_P1
ALINK_NBRX_C_SBTX_N1
ALINK_NBRX_C_SBTX_P2
ALINK_NBRX_C_SBTX_N2
ALINK_NBRX_C_SBTX_P3
ALINK_NBRX_C_SBTX_N3

+1.2V_RUN_PCIE_PVDD

1D2V_S0

C815
C819
C812
C816
C807
C811
C803
C806

N2

ALINK_NBRX_SBTX_P0
ALINK_NBRX_SBTX_N0
ALINK_NBRX_SBTX_P1
ALINK_NBRX_SBTX_N1
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
ALINK_NBRX_SBTX_P3
ALINK_NBRX_SBTX_N3

2
2
2
2
2
2
2
2

U67A
NB_RST#

10
10
10
10
10
10
10
10

1
1
1
1
1
1
1
1

33R2J-2-GP
R522
2

11,27,34,37 PLTRST#

PCI CLKS

SSID = S.B

PCI EXPRESS INTERFACE

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB700_PCIE&PCI_(1/5)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

18

of

56

3D3V_S0
SUS_STAT#
1
2
R505
4K7R2F-GP
SHUTDOWN#/GPIO5
1 DY
2
R236
10KR2J-3-GP
SB_TO_EC_PWRGD
1
2
R238
10KR2J-3-GP
SMBCLK0_SB
1
2
R242
2K2R2F-GP
SMBDAT0_SB
1
2
R243
2K2R2F-GP
ECSMI#_KBC
1
2
R508DY 10KR2J-3-GP
3D3V_S5

PM_PWRBTN#_R

1
R226
1
R224

DY

DY

DY

2
2
2

DY

INT
INT
INT
INT

SB_TEST2
2K2R2F-GP
SB_TEST1

2
DY 2K2R2F-GP

DY

1
R504
1
R500
1
R228
1
R507
1
R509
1
R480
1
R216

PH 34 KA20GATE
PH 34 KBRCIN#
PH 34 ECSCI#_KBC_R
PH

INT PH

SB_PCIE_WAKE#

SMB_ALERT#
2 0R2J-2-GP
SB_TO_EC_PWRGD

R227 1
37 SB_TO_EC_PWRGD

6 CPU_THERMTRIP#_L

10KR2J-3-GP
SMB_ALERT#

RSMRST#_SB1

INT PH

10KR2J-3-GP
SMBCLK1_SB

SC

2K2R2F-GP
SMBDAT1_SB

RSMRST#_SB
10KR2J-3-GP
ECSWI#_SB
2
10KR2J-3-GP

1D8V_S0

R487

SB_RSMRST#_R D3

1
1
1
1
1
1

SB700_GPIO10
SB700_GPIO6
SB700_GPIO4
SB700_GPIO0
SB700_GPIO39
SB700_GPIO40

31
SB_SPKR
SMBCLK0_SB
SMBDAT0_SB
SMBCLK1_SB
SMBDAT1_SB

SHUTDOWN#/GPIO5

R581
2

CLK48_USB

G8

USB_PCOMP 1
R225
11K8R2F-GP

USB_FSD13P
USB_FSD13N

E6
E7

USB_FSD12P
USB_FSD12N

F7
E8

USB_HSD11P
USB_HSD11N

H11
J10

USB_HSD10P
USB_HSD10N

E11
F11

USB_HSD9P
USB_HSD9N

A11
B11

USB_HSD8P
USB_HSD8N

C10
D10

USB_HSD7P
USB_HSD7N

G11
H12

USB_HSD6P
USB_HSD6N

E12 USBP6+ 1
E14 USBP6- 1

USB_HSD5P
USB_HSD5N

C12
D12

USB_HSD4P
USB_HSD4N

B12 USBP4+ 1
A12 USBP4- 1

USB_HSD3P
USB_HSD3N

G12
G14

USBP3+ 15,55
USBP3- 15,55

USB_HSD2P
USB_HSD2N

H14
H15

USBP2+ 29
USBP2- 29

USB_HSD1P
USB_HSD1N

A13
B13

USBP1+ 29
USBP1- 29

USB_HSD0P
USB_HSD0N

B14
A14

USBP0+ 29
USBP0- 29

IMC_GPIO8
IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16
IMC_PWM3/IMC_GPO17

A18
B18
F21
D21
F19
E20
E21
E19
D19
E18

IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25

G20
G21
D25
D24
C25
C24
B25
C23

IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
IMC_GPIO41

B24
B23
A23
C22
A22
B22
B21
A21
D20
C20
A20
B20
B19
A19
D18
C18

RSMRST#

SB_TO_EC_PWRGD

AE18
AD18
AA19
W17
V17
W20
W21
AA18
W18
K1
K2
AA20
Y18
C1
Y19
G5

SATA_IS0#/GPIO10
CLK_REQ3#/SATA_IS1#/GPIO6
SMARTVOLT/SATA_IS2#/GPIO4
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
SCL1/GPOC2#
SDA1/GPOC3#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SHUTDOWN#/GPIO5
DDR3_RST#/GEVENT7#

CR_CPPE#

CPPE#

SB

Close to SB700R513

2 33R2J-2-GP
24

R512

2 33R2J-2-GP

31 SB_AZ_CODEC_SDOUT

31 SB_AZ_CODEC_RST#

1
1
1

TP24
1
SB_AZ_BITCLK
SB_AZ_SDOUT
SB_AZ_CODEC_SDIN0

31 SB_AZ_CODEC_SDIN0

31 SB_AZ_CODEC_SYNC

TP22
TP25
TP28

R232

2 33R2J-2-GP

R521

2 33R2J-2-GP

SB_AZ_SYNC
SB_AZ_RST#

SB_AZ_RST#

M1
M2
J7
J8
L8
M3
L6
M4
L5

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO42
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#
AZ_DOCK_RST#/GPM8#

22

TO STRAPS
R587
10KR2J-3-GP

DY

1D8V_S0

R494
2

10KR2J-3-GP

USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GPM5#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC2#/GPM2#
USB_OC1#/GPM1#
USB_OC0#/GPM0#

INTEGRATED uC

28

B9
B8
A8
A9
E5
F8
E4

27

IDE_RST#

1
2
R497
0R2J-2-GP

IDE_RST#_R

H19
H20
H21
F25
D22
E24
E25
D23

IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
IMC_GPIO7

INTEGRATED uC

31,55 SB_AZ_CODEC_BITCLK

ECSWI#_SB

HD AUDIO

34

OC INT PH

USB OC

300R2J-4-GP

CLK48_USB

R488
10R2F-L-GP
1
2

CLK48_USB_R2

1 DY2
C784
SC10P50V2JN-4GP

DY

1%

0R0402-PAD

TP88
TP90
TP36
TP34
TP33
TP35

2K2R2F-GP

3,8,9
3,8,9
24,25
24,25

ECSMI#_KBC

24,25,28 SB_PCIE_WAKE#

ECSCI#_KBC_R
10KR2J-3-GP

codec INT PH

DY

SB_TEST2
1SB_TEST1
1SB_TEST0

TP30
TP65

TEST INT PL

C8

USB_RCOMP

Place these close SB700

Place R near pin14. Route it with 10mils

Trace width and 25mils spacing to any
signals in X, Y, Z directions.

USBP7+ 24
USBP7- 24

----->WLAN

TP27
TP26
USBP5+ 24
USBP5- 24
TP99
TP98

----->NEW CARD
----->BT

SB

----->CAMERA
USB_OC#1_2
USB_OC#0

SB_GPO16 22
SB_GPO17 22

Strap Pin / define to use LPC or SPI ROM

B

1
R478

DY

2
0R2J-2-GP

D24
1

RSMRST#_SB

CH751H-40PT

34 RSMRST#_KBC

INT PH

USBCLK/14M_25M_48M_OSC

DY
2

35 PM_PWRBTN#

Part 4 of 5

SB700
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S2/GPM9#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST2
TEST1
TEST0
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#
NB_PWRGD

USB MISC

TP29

23,24,34,37,42 PM_SLP_S3#
24,34,41,44 PM_SLP_S5#
1
2
R501
37
SB_PWRGD
0R0402-PAD11 SUS_STAT#

E1
E2
H7
F5
G1
H2
H1
K3
H5
H4
H3
Y15
W15
K4
K24
F1
J2
H6
F2
J6
W14

USB 1.1

KBC

1SB700_SLPS2

USB 2.0

SC
INT PH

INT PH

GPIO

KBC,LAN
INT PH

ACPI / WAKE UP EVENTS

U67D

C484
SC2D2U6D3V3KX-GP

SB700-1-GP-U

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB700_USB&GPIO_(2/5)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

19

of

56

SATA C POSITION?

PIDE_D[0..15]

27

U67B

C561
SC12P50V2JN-3GP
1

ATI 10M
1KR2F-3-GP
R230
1
2 SATA_CAL

1
R245
1MR2F-GP
SATA_X2_R

C562
SC12P50V2JN-3GP

1 R246

0R0402-PAD
1D2V_S0

20mil Width

L38

SATA_RX3N
SATA_RX3P

AE14
AD14

SATA_TX4P
SATA_TX4N

AD15
AE15

SATA_RX4N
SATA_RX4P

AB16
AC16

SATA_TX5P
SATA_TX5N

AE16
AD16

SATA_RX5N
SATA_RX5P
SATA_CAL

Y12

SATA_X1

SATA_X2

AA12

SATA_X2

SC
+1.2V_PLLVDD_SATA

1
2
BLM15AG221SN-GP

C952

W11

SATA_ACT#/GPIO67

AA11

77mA
PLLVDD_SATA

W12

XTLVDD_SATA

1mA

SC

SC2D2U6D3V3KX-GP

3D3V_S0

SATA_TX3P
SATA_TX3N

AB14
AC14

C554
SCD1U10V2KX-4GP

HW MONITOR

SATA_RX2N
SATA_RX2P

AD13
AE13

SATA_X1

AE12
AD12

V12

X4
XTAL-25MHZ-96GP

SATA_TX2P
SATA_TX2N

SATA_RX1N
SATA_RX1P

AB12
AC12

+3.3V_XTLVDD_SATA

C953
C548
SCD1U10V2KX-4GP

SC1U6D3V2KX-GP

AD24
AD23
AE22
AC22
AD21
AE20
AB20
AD19
AE19
AC20
AD20
AE21
AB22
AD22
AE23
AC23

SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32

G6
D2
D1
F4
F3

LAN_RST#/GPIO13
ROM_RST#/GPIO14

U15
J1

FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49

M8
M5
M7

FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52

P5
P8
R8

TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64

C6
B6
A6
A5
B5

VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60

A4
B4
C4
D4
D5
D6
A7
B7

SC

TALERT#

G7

HYB18T512161B2F-25
72.18512.M0U
K4N51163QE-ZC25
72.45116.A0U

Local Frame Buffer Strapping List

Copy from Becks.

23

LFB_ID2 LFB_ID1 LFB_ID0

(GPIO 59) (GPIO 58) (GPIO 57)

LFB_ID0
LFB_ID1
LFB_ID2

C499

SC2D2U6D3V3KX-GP

F6

AVSS

Qimonda
Samsung

CR_WAKE# 28

SCD1U10V2KX-4GP

SB700-1-GP-U

5mA AVDD

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

+3.3V_AVDD_HWM

1
2
BLM15AG221SN-GP

20mil Width

L37

IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30

PIDE_IORDY 27
PIDE_IRQ14 27
PIDE_A0
27
PIDE_A1
27
PIDE_A2
27
PIDE_DACK# 27
PIDE_DREQ 27
PIDE_IOR# 27
PIDE_IOW# 27
PIDE_CS#0 27
PIDE_CS#1 27

+3.3V_ALW_R

L29
1

SC4700P50V2KX-1GP

AD11
AE11

AA24
AA25
Y22
AB23
Y23
AB24
AD25
AC25
AC24
Y25
Y24

Hynix
Qimonda
Samsung

0
0
0

0
0
1

0
1
0

BLM15AG221SN-GP
C496

ESATA

SATA_TX1P
SATA_TX1N

IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#

SC4700P50V2KX-1GP
R585
SATA_TX3+_TT
C861 1
0R2J-2-GP
2SATA_TX3+
1
2
29 SATA_TX3+_R
SATA_TX3-_TT
C862 1
2SATA_TX31
2
29 SATA_TX3-_R
SC4700P50V2KX-1GP
R586 0R2J-2-GP
SC4700P50V2KX-1GP
SATA_RX3-_R
C844
1
2
29
SATA_RX3C843 1
SATA_RX3+_R
2
29
SATA_RX3+

SATA_RX0N
SATA_RX0P

AE10
AD10

Part 2 of 5

SATA ODD

AB10
AC10

ATA 66/100/133

SATA_RX0SATA_RX0+

SATA_TX0P
SATA_TX0N

SPI ROM

30
30

SB700

AD9
AE9

SERIAL ATA

SATA HDD

SCD01U50V2KX-1GP
R583
SATA_TX0+_TT
C859 1
0R2J-2-GP
2 SATA_TX0+
1
2
SATA_TX0-_TT
C860 1
2 SATA_TX01
2
SCD01U50V2KX-1GP
R584 0R2J-2-GP
SCD01U50V2KX-1GP
SATA_RX0-_R
C845 1
2
SATA_RX0+_R
C846 1
2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
C852 1
2 SATA_TX1+
30 SATA_TX1+_R
C853 1
2 SATA_TX130 SATA_TX1-_R
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
C848 1
2 SATA_RX1-_R
30
SATA_RX1C847 1
2 SATA_RX1+_R
30
SATA_RX1+
SCD01U50V2KX-1GP

SATA PWR

30 SATA_TX0+_R
30 SATA_TX0-_R

LFB_ID0 to LFB_ID2 got internal PU to S5.

3D3V_S5

DY

R464 1
R463 1
R462 1

Layout connect to Cap then GND

LFB_ID0
LFB_ID1
LFB_ID2

SAM

2 10KR2J-3-GP
2 10KR2J-3-GP
2 10KR2J-3-GP

QIM
1
SAM2
1 QIM 2

R470
R471
R472 1

10KR2J-3-GP
10KR2J-3-GP
2 10KR2J-3-GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB700_SATA-IDE_(3/5)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

20

of

56

BLM15AG221SN-GP
C507

SC10U10V5KX-2GP

1
2

1
2

1D2V_S0

L36

A15
B15
C14
D8
D9
D11
D13
D14
D15
E15
F12
F14
G9
H9
H17
J9
J11
J12
J14
J15
K10
K12
K14
K15

C474

H18
J17
J22
K25
M16
M17
M21
P16

2
BLM15AG221SN-GP

C492

U45
C558

3D3V_S0

1D8V_S0

F9

PCIE_CK_VSS_1
PCIE_CK_VSS_2
PCIE_CK_VSS_3
PCIE_CK_VSS_4
PCIE_CK_VSS_5
PCIE_CK_VSS_6
PCIE_CK_VSS_7
PCIE_CK_VSS_8
AVSSC

AVSSCK

P23
R16
R19
T17
U18
U20
V18
V20
V21
W19
W22
W24
W25
B

L17

CH715FPT-GP
SB700-1-GP-U

3D3V_S0

3D3V_S5

+3.3V_ALW_R

SC

BLM15AG221SN-GP

R511
1

+3.3V_AVDDCK

L33
1

50mil Width

20mil Width

C501

1KR2J-1-GP

+1.2V_AVDDCK L28
+3.3V_ALW_R_AVDDC

PCIE_CK_VSS_9
PCIE_CK_VSS_10
PCIE_CK_VSS_11
PCIE_CK_VSS_12
PCIE_CK_VSS_13
PCIE_CK_VSS_14
PCIE_CK_VSS_15
PCIE_CK_VSS_16
PCIE_CK_VSS_17
PCIE_CK_VSS_18
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_21

5V_S0
R244

+3.3V_AVDDCK
+3.3V_ALW_R

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24

220 ohm @ 100MHz, 300mA

1
2

1
2

C502

2
BLM15AG221SN-GP

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20

A2
A25
B1
D7
F20
G19
H8
K9
K11
K16
L4
L7
L10
L11
L12
L14
L16
M6
M10
M11
M13
M15
N4
N12
N14
P6
P9
P10
P11
P13
P15
R1
R2
R4
R9
R10
R12
R14
T11
T12
T14
U4
U14
V6
Y21
AB1
AB19
AB25
AE1
AE24

C517
SC2D2U6D3V3KX-GP

16mA

E9

C497

AVDDC

1D2V_S5
1

AVDDCK_1.2V

K17

C515

1D2V_S5

+5V_VREF1

AE7
J16

PLL

44mA

V5_VREF
AVDDCK_3.3V

SC2D2U6D3V3KX-GP

SB700-1-GP-U

7mA

SCD1U10V2KX-4GP

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDTX_5
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4
AVDDRX_5

4mA

C487

C509

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50

GROUND

1
2

1
2

1
2

A10
B10

USB_PHY_1.2V_1
USB_PHY_1.2V_2

USB I/O

C505

C504

1
2

1
2

1
2

C500

S5_1.2V_1
S5_1.2V_2

G2
G4

113mA

A16
B16
C16
D16
D17
E17
F15
F17
F18
G15
G17
G18

T10
U10
U11
U12
V11
V14
W9
Y9
Y11
Y14
Y17
AA9
AB9
AB11
AB13
AB15
AB17
AC8
AD8
AE8

1D2V_S0

L34

L31

3.3V_S5 I/O

101mA

1
2

1
2

1
2

1
2
1

A12

+1.2V_ALW_SUS_R

20mil Width

50mil Width

SC1U10V3KX-3GP

C503

A17
A24
B17
J4
J5
L1
L2

SC22U6D3V5MX-2GP

367mA

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6
S5_3.3V_7

SC1U6D3V2KX-GP

AVDD_SATA_1
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7

SATA I/O

AA14
AB18
AA15
AA17
AC18
AD17
AE17

CORE S5

844mA

C559

SCD1U10V2KX-4GP

C533

SC22U6D3V5MX-2GP

C551

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
SC1U10V3KX-3GP

C532

Part 5 of 5

SB700

220 ohm @ 100MHz, 2A

16mA

A-LINK I/O

1
2

1
2

1
2

1
2

1
2

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7

AVDDTX:330mA
AVDDRT:209mA

C498

C542

SC1U6D3V2KX-GP

C510

SCD1U10V2KX-4GP

C516

CLKGEN I/O

IDE/FLSH I/O

286mA

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

C553

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC22U6D3V5MX-2GP

CORE S0

PCI/GPIO I/O

1
2
1

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

2
1
2

P18
P19
P20
P21
R22
R24
R25

C541

1
2
BLM21PG221SN-1GP
C786 C486

SC1U6D3V2KX-GP

L21
L22
L24
L25

SC2D2U6D3V3KX-GP

C540

+3.3V_AVDD_USB

50mil Width

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C527

SCD1U10V2KX-4GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

C557

Use Plane Shape for +3.3V_AVDD_USB

L63

C543

1
2
BLM21PG221SN-1GP

SC1U6D3V2KX-GP

71mA

1
2
BLM21PG221SN-1GP
C560

SCD1U10V2KX-4GP

C570

+1.2V_AVDD_SATA

50mil Width

C526

+3.3V_ALW_R

C530

SC1U6D3V2KX-GP

C802

L39

C535

POWER
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

220 ohm 2A

C537

C531

+1.2V_RUN_CKVDD
CKVDD_1.2V_1
CKVDD_1.2V_2
CKVDD_1.2V_3
CKVDD_1.2V_4

50mil Width

1
2
BLM21PG221SN-1GP

3D3V_S5

VDD33_18_1
VDD33_18_2
VDD33_18_3
VDD33_18_4

+1.2V_PCIE_VDDR

L35

1D2V_S0

Y20
AA21
AA22
AE25

L15
M12
M14
N13
P12
P14
R11
R15
T16

SCD1U10V2KX-4GP

C831

U67E

Part 3 of 5
604mA
71mA

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9

SCD1U10V2KX-4GP

C552

SCD1U10V2KX-4GP

C555

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C829

C534

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12

SCD1U10V2KX-4GP

C550

SCD1U10V2KX-4GP

C544

Use Flash I/O:+1.8V / IDE:+3.3V

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP
1D2V_S0

C556

SCD1U10V2KX-4GP

C841

SCD1U10V2KX-4GP

1D8V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

ST220U6D3VDM-15GP

C547

+1.2V_RUN_VDD

SB700

L9
M9
T15
U9
U16
U17
V8
W7
Y6
AA4
AB5
AB21

SC22U6D3V5MX-2GP

3D3V_S0

TC12

U67C

SSID = S.B

DY

+1.2V_AVDDCK

L32
1

BLM15AG221SN-GP

20mil Width

1D2V_S0

C518
SC2D2U6D3V3KX-GP

C783

1
2

1
2

1
2

C485

SC22U6D3V5MX-2GP

C523

SCD1U10V2KX-4GP

C798

SCD1U10V2KX-4GP

C529

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0R0805-PAD

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB700_POWER&GND_(4/5)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

21

of

56

SSID = S.B
REQUIRED STRAPS
DEBUG STRAPS

+3.3V_ALW_R

1 R231

1 R234

1 R543

1 R215

1 R214

1 R499

NEED?

10KR2J-3-GP

2K2R2F-GP

2K2R2F-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

CLK_PCI_5035 18
CLK_PCI_5028 18
CLK_PCI_DEBUG 18
LPCCLK0
18,34,55
LPCCLK1
18,36,55
RTCCLK
18,23
SB_AZ_RST# 19
SB_GPO16 19
SB_GPO17 19
PCI_CLK4
18
PCI_CLK5
18

ATI
TP79
TP80
TP87
TP81
TP84
TP89
TP85
TP86

LPC?

1 R527

1 R536

1 R237

1 R476

1 R477

PCI_CLK5?

1
1
1
1
1
1
1
1

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30

18
18
18
18
18
18
18
18

2K2R2F-GP

2K2R2F-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

DY

10KR2J-3-GP

DY

10KR2J-3-GP

DY

1 R222

1 R515

1 R482

1 R481

1 R558

1 R240

DY DY

DY DY DY DY DY DY DY

10KR2J-3-GP

DY DY DY

1 R514

1 R474

1 R473

1 R552

1 R549

3D3V_S0

REQUIRED SYSTEM STRAPS

CLK_PCI_5035 CLK_PCI_5028

PULL
HIGH

WatchDOG
(NB_PWRGD)
ENABLED

CLK_PCI_DEBUG

LPCCLK0
ENABLE PCI
MEM BOOT

USE
DEBUG
STRAPS

WatchDog
(NB_PWRGD)
DISABLED

IGNORE
DEBUG
STRAPS

DEFAULT

DEFAULT

CLKGEN
ENABLED
(Use Internal)

RESERVED

PULL
LOW

LPCCLK1

DISABLE PCI CLKGEN

MEM BOOT DISABLED
DEFAULT

(Use External)
DEFAULT

RTCCLK
INTERNAL
RTC

AZ_RST#
IMC
ENABLED

DEFAULT

EXT. RTC
(PD on X1,
apply
32KHz to
RTC_CLK)

PCI_AD28 PCI_AD27 PCI_AD26

PCI_AD25

PCI_AD24

PULL
HIGH

USE
LONG
RESET
(DEFAULT)

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS Reserved

(DEFAULT)

(DEFAULT)

(DEFAULT)

(DEFAULT)

(DEFAULT)

PULL
LOW

USE
SHORT
RESET

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE EEPROM
PCIE STRAPS

Reserved

SB_GPO17 , SBGPO16
ROM TYPE:
H, H = Reserved
H, L = SPI ROM

IMC
DISABLED

L, H = LPC ROM

DEFAULT

L, L = FWH ROM

DEFAULT

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

PCI_AD30
PCI_AD29

PCI_AD23

Reserved

Note: SB700 has 15K internal PU FOR PCI_AD[30:23]

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ATi-SB700_STRAPPING_(5/5)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

22

of

56

5V_S0

K
D6
RB751V-40-2-GP

FAN1_VCC

FAN1

R117

4
1

10KR2J-3-GP
2
1
2

C146

C94

1
2

2
D

C95

SC2200P50V2KX-2GP

C75
SC4D7U10V5ZY-3GP

5V_S0

SCD1U16V2ZY-2GP

C76
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

FAN1_VCC

2
3

FAN1_FG1

C628

ACES-CON3-GP-U1
SC1KP50V2KX-1GP

FAN1_VCC

U8
R89

C
1

Q22
MMBT3904-3-GP

B
E

DY

G792_DXN2

CPU SENSOR
H_THERMDC

G792_DXN2
G792_DXN3

G792SFUF-GP

SGND1
SGND2
SGND3

8
10
12

C622

SC470P50V2KX-3GP

74.00792.A79

G8

G13

C96

UMA R79

SB

C69

H_THERMDA

SC2200P50V2KX-2GP

C74

VGA SENSOR

1
1

UMA
0R2J-2-GP

GND

PM_SLP_S3#

U4
19,24,34,37,42 PM_SLP_S3#
18,22 RTCCLK

PM_SLP_S3#

3D3V_S5

1
2
3

A
B
GND

VCC

R71
10R2J-2-GP
1
2

74LVC1G08GW-1-GP

R66
100KR2J-1-GP

NC7SZ08P5-GP
73.7SZ08.AAH

R72
10KR2J-3-GP

R97
10KR2J-3-GP

R86
100KR2J-1-GP

R74
20

DY

G792_RESET#

4K7R2F-GP DY

PWROK

R95
37

G792_32K

VGA_G792_N 49
R80
2
NB_THERMDN 11

5V_S5

U17
VCC

NB_THERMDP 11

DY

SC470P50V2KX-3GP
G6

3D3V_S0

0R2J-2-GP
VGA_G792_P 49

SC2200P50V2KX-2GP
G792_DXN3

Due to sourcer request , change 73.01G08.L04 to main source ,

73.07S08.AAG to 2nd source

G7

G792_DXP3

49K9R2F-L-GP

5
17

SC2200P50V2KX-2GP

R85

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

DGND
DGND

ALERT#
THERM#
THERM_SET
RESET#

C621

G792_ALERT#
15
HW_THRM_SHDN# 13
V_DEGREE 3
2

DXP1
DXP2
DXP3

G792_DXP2

7
9
11

FAN1_FG1
G792_32K
SMBD_G792
SMBC_G792

G792_DXP2
G792_DXP3

4K99R2F-L-GP

1
4
14
16
18
19

6 H_THERMDA

R88

FAN1
FG1
CLK
SDA
SCL
NC#19

VCC
DVCC

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

SCD1U16V2ZY-2GP

Setting T8 as
100 Degree

C92

5V_S0

6
20

100R2F-L1-GP-U

5V_S0

5V_G792_S0

2
1

TALERT#

G792_ALERT#

0R2J-2-GP

DY

SMBUS

3D3V_AUX_S5

3D3V_S0
B

8
7
6
5

3D3V_S0
3D3V_S0
1

RN1
SRN4K7J-10-GP
D3
2N7002DW-1-GP
84.27002.D3F

1
2
3
4

R77
10KR2J-3-GP
2

34

KBC_SCL2

KBC_SCL2

SMBC_G792

3D3V_AUX_S5
D

HW_THRM_SHDN#

Q3
2N7002-11-GP

SMBD_G792
KBC_SDA2

KBC_SDA2

34
EC_RST#

BAT54PT-GP
D2

R68

35
3D3V_AUX_S5
U5

10KR2J-3-GP
1
S5_ENABLE

GND

34

C77

<Variant Name>

VCC

Wistron Corporation

PWR_S5_EN 40

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

74LVC1G08GW-1-GP
Title

SCD1U16V2ZY-2GP

THERMAL G792

Due to sourcer request , change 73.01G08.L04 to main source ,

73.07S08.AAG to 2nd source

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

23

of

56

NEWCARD Connector

WLAN Connector

Newcard Frame
SKT2
1

Newcard Head

CARDBUS2P-15-GP
21.H0146.001

NEWCARD1

WLAN1

53

LED_WWAN#
LED_WLAN#
LED_WPAN#

1
1
1

10 PCIE_NBRX_NEWTX_P0
10 PCIE_NBRX_NEWTX_N0
3 CLK_PCIE_NEW
3 CLK_PCIE_NEW#
19
CPPE#
TP32

CPPE#
1CONN_CLKREQ#

PERST#
3D3V_NEW_S5

R249
10KR2J-3-GP

19,25,28 SB_PCIE_WAKE#
C521
SCD1U16V2ZY-2GP

19
19

19,25 SMBDAT1_SB
19,25 SMBCLK1_SB
TP23
TP21
19
19

TP93
TP92
TP94
1D5V_S0

1CONN_TP2
1CONN_TP3
CPUSB#

USBP5+
USBP5-

1D5V_NEW_S0
3D3V_S0

1D5V_S0

3D3V_S5

1
NP1
27

C506

CARDBUS26P-7GP
62.10024.861

Place them Near to Chip

1D5V_S0
C796
SCD1U16V2ZY-2GP

C576
SCD1U16V2ZY-2GP

C577
SCD1U16V2ZY-2GP

C894
SC10U10V5ZY-1GP

C898
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

62.10043.601

C927

54

C508

SCD1U16V2ZY-2GP

3D3V_S0

SKT-MINI52P-23-GP

1
2
USBP7USBP7+

10 PCIE_NBTX_C_NEWRX_P0
10 PCIE_NBTX_C_NEWRX_N0
C539

34

SC10U10V5ZY-1GP

5V_AUX_S5

RF_ON

RF_ON
PLT_RST1#_WLAN 1 R248
2PLTRST_SYS#
0R3-0-U-GP 1 R250
2
3D3V_S5 0R2J-2-GP
0R3-0-U-GP 1 R251
2
3D3V_S0
DY
1D5V_S0
SMBCLK1_SB
SMBDAT1_SB

10 PCIE_NBTX_C_WLANRX_N1
10 PCIE_NBTX_C_WLANRX_P1

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

C538

10 PCIE_NBRX_WLANTX_N1
10 PCIE_NBRX_WLANTX_P1

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

E51_RxD
E51_TxD

E51_RxD
E51_TxD

1D5V_S0

34
34

4
6
8
10
12
14
16

3 CLK_PCIE_WLAN#
3 CLK_PCIE_WLAN

3
5
7
9
11
13
15

3D3V_NEW_S0

SCD1U16V2ZY-2GP

BT_BUSY
WIFI_BUSY
1MINI_REQ#

3D3V_S0

SC10U10V5ZY-1GP

1
1

NP1
2

TP100
TP101
TP96

1MINI_WAKE#

TP95

28
NP2
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

1D5V_NEW_S0
1

1
2

C821
SCD1U16V2ZY-2GP

3D3V_NEW_S0

C797
SCD1U16V2ZY-2GP

3D3V_S5

2
3
12
11
17
15

U68

C804
SCD1U16V2ZY-2GP

3_3VIN
3_3VOUT
1_5VIN
1_5VOUT
AUXIN
AUXOUT

C820
SCD1U16V2ZY-2GP

3D3V_S0

SYSRST#
CPPE#
CPUSB#
PERST#
SHDN#

3_3VIN
3_3VOUT
1_5VOUT
1_5VIN
NC#16

1
18
19
21

STBY#
RCLKEN
OC#
GND

19,34,41,44 PM_SLP_S5#

6
10
9
8
20

G577BR91U-GP

3D3V_NEW_S5

4
5
13
14
16

3D3V_S0
3D3V_NEW_S0
1D5V_NEW_S0
1D5V_S0

2PLT_RST1#_577
CPPE#
0R2J-2-GP
CPUSB#
PERST#

C795
SCD1U16V2ZY-2GP

GND

R531

18,25,28,36,37 PLTRST_SYS#

19,23,34,37,42 PM_SLP_S3#
1

TP78

NEWCARD_OC#
<Variant Name>

Wistron Corporation

3D3V_S5

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

RN44
1
2

4
3

CPPE#
CPUSB#

Title

WLAN/NEW CARD

SRN10KJ-5-GP
Size
A3

DY

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

24

of

56

3D3V_LAN_S5

AVDD33
R43

G3
2
GAP-CLOSE-PWR

They are for U49 AVDD33

pin-2 and 59

C39
SCD1U16V2ZY-2GP

C14
SCD1U16V2ZY-2GP

60 ~ 100 mils
2

60 ~ 100 mils

0R0603-PAD
L2
FCM1608K-121-1GP

3D3V_LAN_S5

3D3V_S5

20 mils

UMA 8101E 71.08101.B0G

DIS 8111C 71.08111.E03
8102E 71.08102.003

VDD33

C66

C469 close L39 200mil.

3D3V_S0
1

DVDD15/CLKREQB

R51
15KR2F-GP

CTRL15/VDD33

1 R9

2 0R2J-2-GP

CTRL15

C50

C49

C51

C47

C48

C38

C41

C40

C43

DY

DY

DY

8111B STUFF
8111C REMOVE

DVDD15
A

Wistron Corporation

VDD33

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

0R5J-6-GP
D1 8111C
MMPZ5226BPT-GP

DY

Title

8101E/8111B REMOVE
8111C STUFF

LAN 8111C/8101E

1
2

8111C

C2

2 0R2J-2-GP

8101E

1 R8

SCD1U16V2ZY-2GP

C6

1 R46

<Variant Name>

8101E/8102E

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C20

C42

8101E/8111B STUFF
8111C REMOVE
DVDD15/CLKREQB

1
1
1

DY

8101E/8111B STUFF
8111C REMOVE

SC22U6D3V5MX-2GP

AGND

DVDD15
EVDD18

EVDD18
PCIE_RXP2_2
PCIE_RXN2_2
AGND
DVDD15

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
2
2

C8

DVDD15

C19
2

8101E/8102E

40 mils

0R3-0-U-GP

8101E/8102E

R6

Only For 8101E

DVDD15
VDD33
ISOLATE#

R50
1KR2J-1-GP

R48 2DVDD15
0R3-0-U-GP 8101E

They are for U49 DVDD15

pin-15,21,32,33,38,41,43,49,52 and 58

8111C

CTRL15

8111C
C34
C35

1
2

GND
RSET
VDDSR
ENSR
CKTAL2
CKTAL1
AVDD33
AVDD12
LED0
LED1
LED2
LED3
VDD33
DVDD12
OGPIO
IGPIO
DVDD12
NC#17
NC#18
LANWAKE#
PERST#
DVDD12
EVDD12
HSIP
HSIN
EGND
REFCLK_P
REFCLK_N
EVDD12
HSOP
HSON
EGND
DVDD12

LAN_EESK
LAN_EEDI
VDD33
LAN_EEDO
LAN_EECS
DVDD15

C25

SCD1U16V2ZY-2GP

PCIE_WAKE#_LAN

R1
0R3-0-U-GP

Only For 8111C

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

EVDD18
C32

SCD1U16V2ZY-2GP

SMBDAT_SB_R

FCM1608K-121-1GP

SCD1U16V2ZY-2GP

SMBCLK_SB_R

20 mils

L3

SCD1U16V2ZY-2GP

EESK
EEDI/AUX
VDD33
EEDO
EECS
DVDD12
NC#42
NC#41
NC#40
NC#39
DVDD12
VDD33
ISOLATE#
NC#35
NC#34
CLKREQB

They are for U49 EVDD18

pin-22 and 28

2
DVDD15

LINK1G
VDD33
DVDD15

RTL_RSET_1
CTRL15/VDD33
GVDD
LAN_X2
LAN_X1
AVDD33
DVDD15
ACT_LED#
LINK100

8101E/8111C

SCD1U16V2ZY-2GP

DY

SROUT12
AVDD33
MDIP0
MDIN0
FB12
MDIP1
MDIN1
AVDD12
MDIP2
MDIN2
AVDD12
MDIP3
MDIN3
AVDD12
NC#15
VDD33

N/A

Only For 8101E

N/A

C3

RTL8102E

DY

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

1
2

N/A

2
1
2

N/A

2
R3
0R3-0-U-GP

C12

C1
SCD1U16V2ZY-2GP

RTL8101E

C5

C11

SCD1U16V2ZY-2GP

19,24,28 SB_PCIE_WAKE#
18,24,28,36,37 PLTRST_SYS#
10 PCIE_NBTX_C_LANRX_P2
10 PCIE_NBTX_C_LANRX_N2
3 CLK_PCIE_LAN
3 CLK_PCIE_LAN#
10 PCIE_NBRX_LANTX_P2
10 PCIE_NBRX_LANTX_N2

N/A

RTL8111C-VB-GR-GP
2
71.08111.C03

1
2
0R2J-2-GPDY
R11 1
2
0R2J-2-GP
R15 10R2J-2-GP 2

19,24 SMBDAT1_SB

N/A

AVDD18
C

C10

SCD1U16V2ZY-2GP

AGND
1 R30
0R0603-PAD

R5

RTL8111C

8101E/8102E

SC22U6D3V5MX-2GP

Pin1 should be near

inductor(4.7u H,L39) then 22u
F(C469) then 0.1u F(C470).

19,24 SMBCLK1_SB

Need

AVDD18

SCD1U16V2ZY-2GP

MDIP3
MDIN3

Need

C4

SCD1U16V2ZY-2GP

26
26

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

SCD1U16V2ZY-2GP

MDIP2
MDIN2

CTRL18
AVDD33
MDIP0
MDIN0
FB12
MDIP1
MDIN1
AVDD18
MDIP2
MDIN2
AVDD18
MDIP3
MDIN3
AVDD18
DVDD15
VDD33

1
0R3-0-U-GP

RTL8111B

SCD1U16V2ZY-2GP

26
26

1
2
IND-4D7UH-113-GP

Q5

40 mils

SCD1U16V2ZY-2GP

MDIP1
MDIN1

40 mils

SCD1U16V2ZY-2GP

U1

26,55
26,55
26,55

8111C

They are for U49 AVDD18

pin-5,8,11 and 14

R2

SCD1U16V2ZY-2GP

26
26

ACT_LED#
LINK100
LINK1G

FB12

Only For 8111C

SCD1U16V2ZY-2GP

MDIP0
MDIN0

1.2V

SC22U6D3V5MX-2GP

26
26

1.5V

SC22U6D3V5MX-2GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

1 R12
2
2K49R2F-GP

8111B STUFF CAP

8111C REMOVE CAP

Power plan for pin1

DVDD15

C471,C472,C473, and C474 as close

as possible to RTL8111C

CTRL18

SC22U6D3V5MX-2GP

8111C/8102E 2.49K 64.24915.6DL

8101E 2K 64.20015.6DL
C15

1.2V

Q3

The trace width from VDD33

to pin63 should>40mils

DY

1.8V

L1

SC15P50V2JN-2-GP

DY

EVDD18

The trace length between L39 and

8111C pin1 must be within 200mil.

XTAL-25MHZ-96GP
X1
82.30020.791

0R2J-2-GP

C16

1.2V

SCD1U16V2ZY-2GP

C24

1.8V

SCD1U16V2ZY-2GP

8101E REMOVE
8111B REMOVE
8111C STUFF 8111CR13

AVDD18

SC15P50V2JN-2-GP

3.3V

Pin 63 should be near

0.1u F(C494) then 22u
F(C493).

VDD33

SB

3.3V

C30
2

AVDD33

M93C46-WMN6TP-GP

EEPROM LED OPTION USE '01'

(DEFINED IN SPEC)
=> LED0 : ACT
=> LED1 : LINK
(BOTH 10/100 AND GIGA CHIP)

8
7
6
5

VCC
DU
ORG
GND

S
C
D
Q

1
2
3
4

SCD1U16V2ZY-2GP

LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO

They are for U49 VDD33

pin-16,37,46 and 53

RTL8111C/
RTL8102E

U3

RTL8111B /
RTL8101E

VDD33

DY

DY

R49
10KR2J-3-GP

R53
3K6R3-GP

Power domain chart

C7

SCD1U16V2ZY-2GP

C57

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C46

C13

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C9

SC22U6D3V5MX-2GP

DY

VDD33

C53

Size
A3

Document Number

Date: Monday, March 10, 2008

3

Rev

P1/P15

SA
Sheet
1

25

of

56

8101E : R195( 0 ohm ) XF1(NC)

8111B/8111C : R195 (NC)

FOR 10/100 8101E

1GLan Transformer

MDIP2
MDIN2

MDIP2
MDIN2

5
6

TD+
TD-

RJ45_4
RJ45_5

TX+
TX-

8
7

RD+
RD-

1
2

MDIP3
MDIN3

RX+
RX-

12
11

RJ45_7
RJ45_8

25
25

MCT3
MCT4

CT
CT
CT
CT

8111C

2 CONN_PWR_2
470R2J-2-GP

25,55

MID0X

8
7
6
5

LAN_TERMINAL

C589 SC1KP3KV8KX-GP

C592

25,55

B2

2
3
4
5
6
7
8
B1

ACT_LED#

10
RJ45-135-GP-U

DY

22.10277.061

2
MID1X

8101E

C595

Green : Link up
Blinking : TX/RX activity

SCD01U50V2ZY-1GP

8101E

RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PWR_2

R317

8101E

SCD01U50V2ZY-1GP

1
2
3
4

R319 R318

8101E

RN37
MCT4
MCT3
MCT2
MCT1

8101E

XFORM-230-GP

10/100/1000Mbps Lan Transformer

R320

8101E

C581
SCD1U16V3KX-3GP

RJ45_3
RJ45_6

25
25

12
11

MDIP1
MDIN1

MDIN1

RX+
RX-

MDIP1
MDIN1

MDIP1

MDIN0

1
2

MDIP0

1
2

RD+
RD-

C594
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

8
7

49D9R2F-GP

CT
CT
CT
CT

RJ45_1
RJ45_2

TX+
TX-

49D9R2F-GP

MCT1
MCT2

4
9
10
3

TD+
TD-

49D9R2F-GP

5
6

49D9R2F-GP

MDIP0
MDIN0

8101E/8102E

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

R279
XF2

C593

75R2J-1-GP

XFORM-230-GP

MDIP0
MDIN0

9
A1
A2
A3
1

LINK100
RJ45_1

LINK100

C591

25
25

SC
RJ1

C590

LINK1G
CONN_PWR_1

TCT1

4
9
10
3

R316
0R2J-2-GP

1
1.route on bottom as differential pairs.
R273
8101E/8102E
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
R281
0R2J-2-GP
1
2
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
8101E/8102E
25,55 LINK1G
75R2J-1-GP
5.6mil trace width,12mil separation.
MDIP3
25
R277
MDIN3
25
6.36mil
between
pairs
and
any
other
trace.
8101E/8102E
0R2J-2-GP
C582
1
2R280
7.Must not cross ground moat,except
SCD1U16V3KX-3GP
RJ-45 moat.
DY
2

XF1

Off : Link 10 Mbps

Green : Link 100 Mbps
Orange : Link 1000 Mbps

20mil

2 CONN_PWR_1
470R2J-2-GP

1
R278

3D3V_LAN_S5

R203,R733,R205,R734 STUFF

8101E

AVDD18

PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW

GIGA no need it at all , 10/100 keep

SRN75J-1-GP

UMA 8101E 71.08101.B0G

DIS 8111C 71.08111.E03
8102E 71.08102.003

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN Connector
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

26

of

56

HYPER FLASH
20 PIDE_D[0..15]

SB DELETE Bluetooth
D

HYPER1
41

PIDE_D9
PIDE_D8
C

C883

1
C884

C885

DY

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

PIDE_IOW# 20
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4

PIDE_D11
PIDE_D10

20

PIDE_A1
20
PIDE_IORDY 20

C575

PIDE_D13
PIDE_D12

PIDE_A0

SC10U10V5ZY-1GP

PIDE_D15
PIDE_D14

6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

22
23
24
25

20 PIDE_IOR#
20 PIDE_DREQ

2
3
4
5

DY

SCD1U16V2ZY-2GP

20 PIDE_IRQ14
20 PIDE_DACK#

PIDE_CS#0 20

20R2J-2-GP

PIDE_A2

21

R629

20

1D8V_S0

NP1
1

20 PIDE_CS#1

PIDE_D5
PIDE_D6
PIDE_D7
HYPER_RST#

NP2
42

1D8V_S0

CARDBUS-SKT102-GP-U
20.I0070.001

R608
10KR2J-3-GP

SB
D14
1

11,18,34,37 PLTRST#

HYPER_RST#

CH751H-40PT
D13
19

IDE_RST#

CH751H-40PT
B

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HYPER FLASH/BT
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

27

of

56

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

1
2

1
3

4
1

R446
2
0R3-0-U-GP

JMB380

JMB380
2

C574
1

R255
1

SC220P50V2KX-3DLGP

56R2F-1-GP
2
0R3-0-U-GP

1
R431

DY

Q44
AO3403-GP

3D3V_CARD
1
1

MDIO13
MDIO14

SB

3D3V_CARD

2N7002-F-GP
D

CR_CPPE#

19

PCIE_NBRX_CARDTX_P3 10
PCIE_NBRX_CARDTX_N3 10

SC
3D3V_S0

CR1_CD0N

R640 2

CR1_CD1N
MDIO7

3D3V_CARD

21MR2F-GP XOUT

10KR2J-3-GP
1
10KR2J-3-GP
1

JMB380
X5
2

JMB380

SB
C571
SC15P50V2JN-2-GP

200KR2J-L1-GP
1
200KR2J-L1-GP
1

R619 2
R260 2

U84

MDIO14

xD_CD

CR1_CD0N

CR1_CD1N

CH715FPT-GP

C929
SC220P50V2KX-3DLGP

2
SD_VCC

33

XD_VCC

MDIO13
MDIO12
MDIO5_R
MDIO7
MDIO14
MDIO4
MDIO6
xD_CD

1
2
3
4
5
6
7
34

XD_R/B
XD_RE
XD_CE
XD_CLE
XD_ALE
XD_WE
XD_WP
XD_CD_SW

MDIO0
MDIO1
MDIO2
MDIO3
MDIO8
MDIO9
MDIO10
MDIO11

8
9
26
27
28
30
31
32

XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7

NP1
NP2

NP1
NP2

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

25
29
10
11

MDIO0
MDIO1
MDIO2
MDIO3

SD_CMD
SD_CLK
SD_WP_SW
SD_CD_SW

12
24
35
36

MDIO4
MDIO5_R
MDIO6
CR1_CD0N

MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3

19
20
18
16

MDIO0
MDIO1
MDIO2
MDIO3

MS_SCLK
MS_INS
MS_BS

15
17
21

MDIO5_R
CR1_CD1N
MDIO4

4IN1_GND
4IN1_GND

13
22

GROUND
GROUND

37
38

CARD-PUSH-36P-3-GP

CR1_CD1N

DY

EC84

DY

<Variant Name>

EC85

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

1394/CARD READER
Size
A3

Document Number

Date: Monday, March 10, 2008

5

MS_VCC

23

20.I0080.001
CR1_CD1N

MDIO12

14

2R622 MDIO13

MDIO5_R

JMB380

1 R261
2
22R2J-2-GP

EC82

X-24D576MHZ-44GP

MDIO5

JMB380 C572
SC15P50V2JN-2-GP

JMB385

2R633 MDIO6

DY

SC220P50V2JN-3GP

R257
1

EC83
2

DY

R636 2

4K7R2F-GP
1

SC220P50V2JN-3GP

4K7R2F-GP
1

CR1_CD0N

CR1_CD0N

PCIE_NBTX_C_CARDRX_N3 10
PCIE_NBTX_C_CARDRX_P3 10

2
XIN

C567

SC10P50V2JN-4GP

R634 1 10KR2J-3-GP
2

10KR2J-3-GP

3D3V_S0

CARD1

SC10P50V2JN-4GP

APVDD

APVDD

2 C925 SCD1U10V2KX-5GP
2 C926 SCD1U10V2KX-5GP

1
1

R632

3D3V_S0

2
R637

SB

20

Q47

8K2R2F-1-GP

R258
1

CR_WAKE#

1
2
3
4
5
6
7
8
9
10
11
12

CR_CPPE#_R

SB_PCIE_WAKE# 19,24,25

SCD1U10V2KX-4GP

3 CLK_PCIE_CARD#
3 CLK_PCIE_CARD

C565

DY 0R2J-2-GP

D35
CH751H-40PT
10KR2J-3-GP
1

18,24,25,36,37 PLTRST_SYS#

R642
1

DVDD18

3D3V_S0
CR1_PCTLN
CR1_CD0N
CR1_CD1N

1
2
3
4
5
6
7
8
9
10
11
12

PAD-49P-GP

2
402KR2F-GP

C921
2

36
35
34
33
32
31
30
29
28
27
26
25
36
35
34
33
32
31
30
29
28
27
26
25

24
23
22
21
20
19
18
17
16
15
14
13

24
23
22
21
20
19
18
17
16
15
14
13

C906

SC10U10V5KX-2GP

For SD/MS Card Power

2
0R0805-PAD

SCD1U10V2KX-4GP

MDIO3
MDIO2
MDIO1
MDIO0

37
38
39
40
41
42
43
44
45
46
47
48
49

R621
1

JMB385 CHANGE 400 K OHM TO 0 OHM

R620

20mil Trace
SC

2
TREXT
TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N
TAV33
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12

DY

SCD1U10V2KX-4GP

3D3V_S0

R631
1KR2-N5

CR1_PCTLN

37
38
39
40
41
42
43
44
45
46
47
48
49

DY

JMB380

XIN
XOUT
MDIO7
MDIO6
MDIO5
MDIO4

DY

DLW21HN900SQ2LGP

DVDD18

GND
GND
TPA0+
TPA0TPB0+
TPB0-

22.10218.U71

3D3V_S0

U46

6
5
4
3
2
1

TPA0+
TPA0TPB0+
TPB0-

JMB380

R444
2
0R3-0-U-GP

R259
12KR2J-L-GP

JMB380,JMB385 COLAY MODEL

SK1

C930

1
2

1
2

1
2

1
2

C932

SKT-1394-4P-30-GP

DLW21HN900SQ2LGP

R256
56R2F-1-GP
1

Place L28, L29 close to SK1

L59

L57
2

SC1KP50V2JN-2GP

C931

SCD1U10V2KX-4GP

C579

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C922

SC10U10V5KX-2GP

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C923

R247
5K11R2F-L1-GP

PUT UP ALL
COMPONENT ON
0 OHM IF CHIP
IS JMB385

POWER TRACE >40 MIL

APVDD
C934

L66 2
1
BLM15BB121SN-GP

R449
2

DY

DVDD18
2
0R3-0-U-GP

R253

56R2F-1-GP
2

56R2F-1-GP

R630
1

DY

C578

1
2

1
2

C910

R254

CLOSE TO CHIP
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U10V5KX-2GP

TAV33

C573
SCD33U10V3KX-3GP

0R0603-PAD

1D8V_S0

SC

R252

C924

0R3-0-U-GP

3D3V_S0

POWER TRACE >40 MIL

C920

Rev

P1/P15

SA
Sheet
1

28

of

56

5V_USB1_S3
R398

400uS rise time

Supply 2~1.5A

C134

2
1

2
3
4
5
6
7
8
9
10
11
12
13
14
15

50 mil
C676

19
19

USBP1+
USBP1-

19
19

USBP2+
USBP2-

2
0R2J-2-GP

U27
USBP0-_RR
5V_USB2_S3

DY
I/O1

VREF GND

I/O2

17

SC1U16V3ZY-GP

1
R407

USBP0+_RR

PJSR05-GP
C

C667

SC1KP50V2KX-1GP
1
2

G545B2P8U-GP
1

5V_S5

GND
OUT#8
IN#2
OUT#7
IN#3
NC#6
EN/EN#
OC#

USBP0+_RR

USB1

5V_USB2_S3
8
7
6
5

SC10U25V6KX-1GP

2
1

U58

USB_PWR_EN#

USBP0-_RR
DLW21HN900SQ2LGP

DY

1
2
3
4

C655

USBP0+

5V_S5

C144

19

TR1

16

400uS rise time

Supply 1.5~1.1A

50 mil

USBP0-

SC10U25V6KX-1GP

C641

SC10U25V6KX-1GP

C136
SC47U6D3V6MX-1GP

5V_S5
SC1U16V3ZY-GP

19

C130

GND

G545A2P8U-GP

C617

OC#
EN/EN#

OUT#8
OUT#7
OUT#6

5
4

USB_PWR_EN#

34 USB_PWR_EN#

IN#3
IN#2

SCD1U16V2ZY-2GP

SCD1U16V2KX-3GP

8
7
6

100 mil

100 mil

5V_USB1_S3
U24

5V_S5
3
2

2
0R2J-2-GP

C626

100 mil

ACES-CON15-GP

SC10U25V6KX-1GP
1D8V_S0

20.K0228.015

20
R665 10KR2J-3-GP
2
1

DY

VDD
VDD
VDD
VDD
VDD
AOAO+
AIAI+

EQA
EQB

1
10

BOBO+

8
7

BIBI+

13
14

GND
GND
GND
GND

EN

DY

5V_USB2_S3

USB2

EQA
EQB

SATA_RX3SATA_RX3+
SATA_RX3-_RB

10

1A

20
20

USBP0-_RR

2A

USBP0+_RR

3A

SATA_RX3-_RBB
2
C943
SC4700P50V2KX-1GP
SATA_RX3+_RB C941 1
SATA_RX3+_RBB
2
SC4700P50V2KX-1GP
1

4A

TC6
ST100U10VDM-5GP

1
2
3
4
5
6
7

NP2
9

SATA_RX3+_RBB
SATA_RX3-_RBB
SATA_TX3-_RBB
SATA_TX3+_RBB

11

SKT-SATA+USB11P-2-GP

5
9
12
16

22.10218.Z71

sc

PI2EQX3211BHE-GP

DY

SATA_RX3+_RB

R671
2
1
0R2J-2-GP
R672
2
1
0R2J-2-GP

SATA_RX3+
SATA_RX3-

SATA_RX3-_RB

SATA_TX3+_RB

DY

SATA_TX3-_RB

put close to connector

1
2

R664
10KR2J-3-GP

DY

8
NP1

R667
470R2J-2-GP
SATA_TX3-_RB

R663
10KR2J-3-GP

2
6
11
15
19

SATA_TX3-_RBB
SATA_TX3-_RB 17
1
2
SATA_TX3+_RBB
C942 1
18
2 SATA_TX3+_RB
SC4700P50V2KX-1GP
4
20 SATA_TX3-_R
3
20 SATA_TX3+_R

SATA_TX3+_RB

EQB

U85

C944 SC4700P50V2KX-1GP

1D8V_S0

DY

DY

DY

R660
10KR2J-3-GP

DY

DY

R662
10KR2J-3-GP

EQA

C939

C938

SCD1U10V2KX-4GP
2
1

C947

SCD1U10V2KX-4GP
2
1

SC4D7U10V5ZY-3GP

C946

DY

SCD1U10V2KX-4GP
2
1

1D8V_S0

R673
2
1
0R2J-2-GP
R674
2
1
0R2J-2-GP

SATA_TX3+_R
SATA_TX3-_R
<Variant Name>

Wistron Corporation

put at the U85 bottom

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

USB/ESATA CONN
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

29

of

56

SATA HDD Connector

SATA ODD Connector

SATA1
8
SATA2
23
NP1
1

Close to HDD

20
20

SATA_TX0+_R
SATA_TX0-_R

20
20

SATA_RX0SATA_RX0+

TPAD28
TC17

NP2

SKT-SATA7P+6P-14-GP-U1

1
2

C780

R479
C

SC10U10V5ZY-1GP

C566

DY
A

1
2

1
2
K

DY

ODD_MD

10KR2J-3-GP

D12
SR24-GP

D23

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24

C563

NP1

P1
P2
P3
P4
P5
P6
9

TP75
1

5V_S0

5V_S0

SSM24PT-GP

SC22U6D3V5MX-2GP

20 SATA_RX120 SATA_RX1+

2
3
4
5
6
7

3D3V_S0
C564

S1
S2
S3
S4
S5
S6
S7

20 SATA_TX1+_R
20 SATA_TX1-_R

TYCO-CON22-GP-U
20.80392.022

LED BD CONN

LAUNCH BD CONN

POWER BUTTON

3D3V_AUX_S5

3D3V_AUX_S5

3
4

3
4

R63
100KR2J-1-GP

2
1

PWR_BUTTON
PWR1

R62

470R2J-2-GP

1
6
2

LAUNCH1

2
C65

SW-TACT-91-GP

KBC_PWRBTN# 34
1

SLIENT_BTN# 34
DVD_BTN#
34
VGA_NET_BTN# 34

SCD1U16V2ZY-2GP

1
2
3
4
5
6
7
8

RN38
SRN10KJ-5-GP

SC1U10V2KX-1GP
C889

62.40009.561

20.K0204.005
ACES-CON8-2-GP
20.F0714.008

1
2

SCD1U16V2ZY-2GP

C888

TPAD2
10

34 WLANONLED#
34 PWR_LED#
34
BAT_LED#
34 BATLOW_LED#

3D3V_S5

RN39
SRN10KJ-5-GP
ACES-CON5-2GP-U
7
5
4
3
2

SC

2
1

SC1U10V2KX-1GP
C902

C901

SCD1U16V2ZY-2GP

3D3V_S0

LED1
3D3V_S5

1 R40

PWR_LED#1

330R2F-GP

1
2

PWRBTN_LED# 34

VGA

VGA

EC81
SC1000P50V3JN-GP

SC1000P50V3JN-GP

BATLOW_LED#
EC80

1
2

BAT_LED#
EC79
SC1000P50V3JN-GP

PWR_LED#

K
LED-W-12-GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HDD/CDROM/LED/LAUNCH
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

30

of

56

5V_S0
U69

KBC_BEEP_R

2
47KR2J-2-GP

5V_AUDIO_S0
4

1C808
2

C818

SB_AZ_CODEC_RST#

19

SB_AZ_CODEC_SYNC

19

SB_AZ_CODEC_BITCLK
SC100P50V2JN-3GP

SC10U25V6KX-1GP
19,55

R598
2

SC1U16V3ZY-GP

SCD1U16V2KX-3GP

C866

G923-475T1UF-GP

AUD_VAUX
2
10KR2J-3-GP

5V_AUDIO_S0

DY

1
R573

C851
SC22P50V2JN-4GP

DY
5V_AUDIO_S0

C876
1

KBC_BEEP

R591

4K7R2J-2-GP

35

C863
1
2AUD_PC_BEEP

AUD_BEEP

2
47KR2J-2-GP

MCP_SPKR_R

SC1U16V3ZY-GP

SB_SPKR

R594

SET
OUT

SCD1U16V2KX-3GP

19

C875
1

SHDN#
GND
IN

C801

1
2
3

SC10U6D3V5KX-2GP

AUD_LFE_OUT

TP82

TPAD30

AUD_CEN_OUT

TP83

TPAD30

C828

CLOSE TO CODEC

SCD1U16V2KX-3GP

SC10U25V6KX-1GP
LOUR_JD#_R

3D3V_S0
SCD1U16V2KX-3GP
1

C835
SCD1U16V2KX-3GP

1
C869
1
C871

MICIN_L
2
SC4D7U6D3V3KX-GP
MICIN_R
2
SC4D7U6D3V3KX-GP

29
31

LINE1-VREFO
LINE2-VREFO

21
22
16
17

MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
MIC2-L/PORT-F-L
MIC2-R/PORT-F-R

32
28
30

MIC1-VREFO-R
MIC1-VREFO-L
MIC2-VREFO

MIC2VREFO

MICINT_R 1
2

ALC888-GR-GP
D32
1N4148W-7-F-GP

1N4148W-7-F-GP

33

34
13

LINEIN_JD#

SDATA-OUT
SDATA-IN

5
8

SPDIFO
SPDIFI/EAPD

48
47

R582

1
SPDIF

EAPD#_662

SB_AZ_CODEC_SDOUT 19
SB_AZ_CODEC_SDIN0 19

2 33R2J-2-GP

TP103 TPAD30

1 R554
0R0603-PAD

SPDIF_CN

45
46

SURR-L/PORT-A-L
SURR-R/PORT-A-R

39
41

FRONT-L/PORT-D
FRONT-R/PORT-D

35
36

SIDE-L/PORT-H-L
SIDE-R/PORT-H-R

33

C823
SC470P50V2KX-3GP

DY

DY
2

AUD_LOL 32
AUD_LOR 32

71.00888.00G

UMA_MIC

1
R574

UMA_MIC

44
43

12
11
10
6
33

2K2R2J-2-GP

VREF

MICINT_L 1

UMA_MIC

UMA_MIC

MIC1VREFO_L
TPAD30
TP91

LINEIN_JD#
2
10KR2F-2-GP

33

CD-L
CD-R
CD-GND

R604

R596 1

32

18
20
19

UMA_MIC
UMA_MIC
MIC1VREFO_R

MICIN_JD#

GND

SC470P50V2KX-3GP

GPIO0/DMIC-CLK
GPIO1/DMIC-DATA

R601
2K2R2J-2-GP

INT_MIC_L
2
SC1U16V3KX-2GP
INT_MIC_R
2C868
SC1U16V3KX-2GP

2
3

MIC_INT_R

D33

UMA_MIC
C870

1 R599
2
1
1KR2F-3-GP
1 R600
2 1
1KR2F-3-GP

JDREF
PIN37-VREFO

UMA_MIC

AVSS1
AVSS2
DVSS
DVSS

MIC_IN_R

MIC_INT_L

MICIN_JD#
2
20KR2F-L-GP

C830

40
37

MIC_IN_L

ARRAY_DETC

R597 1

LINE1-L/PORT-C-L
LINE1-R/PORT-C-R
LINE2-L/PORT-E-L
LINE2-R/PORT-E-R

Fortemedia
ADI
NC

LOUR_JD# 32,33

SENSE_B
SENSE_A

23
24
14
15

LFE/PORT-G-R
CENTER/PORT-G-L

LINEIN_R
2
SC4D7U6D3V3KX-GP

PCBEEP
RESET#
SYNC
BCLK
NC#33

1
C873

32

LINE_IN_R

33

LINEIN_L
2
SC4D7U6D3V3KX-GP

HP_OUT_L
HP_OUT_R
33

32

1
C872

27

32
32
32

LINE_IN_L

26
42
4
7

32

DVDD
DVDD-IO
AVDD1
AVDD2

U70

1
9
25
38

SC10U25V6KX-1GP

1
R568
R655
1
2
39K2R2F-L-GP

C858

C832

39K2R2F-L-GP
LOUR_JD#
2

C865

C867

SCD1U16V2KX-3GP

2
0R2J-2-GP

DMIC_DATAIN 32

DIS_MIC

1
R570
CODECVREF

AUD_JDEF

D_MIC_CLKOUT 32,55
<Variant Name>

2
0R2J-2-GP

DIS_MIC

SC1U16V3ZY-GP

close to codec

SCD1U16V2KX-3GP

C855

R555
20KR2F-L-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

C857

Title

AUDIO CODEC ALC888

Size
A3

Document Number

Date: Monday, March 10, 2008

A

Rev

P1/P15

SA
Sheet
E

31

of

56

5VA_OP_S0

SPKR_L-

1
7
6

INL
INR

NC#9

2
OUTL
OUTR

LINE_OUT_L
LINE_OUT_R

SHDN#

G1412_SHDN#

PGND

C887
SC2D2U10V3KX-1GP

1
1

MLVG0402220NV05BP-GP

MLVG0402220NV05BP-GP
2
1

2
1

DY

DIS_MIC

31 ARRAY_DETC

33

EU2

C877

33

LINE_IN_CN_R

DY

CN4
5

U77
1
2
3

OUT
IN
C1-

11
JST-CON10-12-GP

3VA_S0_AU

HP_L
HP_R

PVDD
NVDD

2
4

LINE_IN_CN_L

EU1

C596

1
C1+
SHDN#
GND

6
5
4

31
31

G1412_SHDN#

2
3
4

MIC_INT_R
MIC_INT_L

C895
G5930TBU-GP

ACES-CON4-7-GP-U

C891
SCD1U16V2KX-3GP
1
2

C897

8
3

R602 2
1
1KR2F-3-GP
1
2
1KR2F-3-GP
R603
C878

D_MIC_DATAIN

2
10R2J-2-GP

LINE In

2
1

C896

1
2

U78
SCD1U16V2KX-3GP

MLVG0402220NV05BP-GP

2
1

1
2

LINE_IN_R

1
R325

2
3
4
5
6
7
8
9
10

TPAD30 TP40
1
2
R323 0R0402-PAD

DIS_MIC

SC100P50V2JN-3GP

3VA_S0_AU
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1 R611
2
0R0603-PAD
C881

D_MIC_DATAIN
D_MIC_CLKOUT
TPAD30 TP41
TPAD30 TP42

G1412_VSS

3D3V_S0

12
1

3D3V_S0

31,55 D_MIC_CLKOUT
31 DMIC_DATAIN

LINE_IN_L

31

CN1

C782

31

ETY-CON2-10-GP
20.F0984.002

SC100P50V2JN-3GP

10KR2J-3-GP
R498

1
1

D
G

KBC_MUTE#

3
EC59

31

MLVG0402220NV09BP-GP

Q30
2N7002-11-GP

SC

MLVG0402220NV09BP-GP

G1432Q5U-GP

AUD_LOR

EC61
ETY-CON2-10-GP
20.F0984.002

SCD1U16V2KX-3GP

GND
GND

C792

SC1U16V3ZY-GP

SC2D2U10V3KX-1GP

11

R_BYPASS

SHUTDOWN

IN1#/IN2

20
4
15

13

16

SC2D2U10V3KX-1GP

L_BYPASS

KBC_MUTE

34

SC

0R0402-PAD

R503
C789
2
1 SOUND_R2 1
2
10KR3F-L-GP
SC1U16V3ZY-GP
R502 1
2
10KR3F-L-GP
C790
1
2
DY

SOUND_R_OP1
SPKR_R+
SPKR_R-

RBYPBASS

MUTE

NC#6
NC#8
NC#23

R490
10KR2J-3-GP
3

18
17
19
12

RIN1
RIN2
ROUT+
ROUT-

LBYPASS

6
8
23

SC1U16V3ZY-GP

5VA_OP_S0

LIN1
LIN2
LOUT+
LOUT-

14
25

DY

1
2
24
7

GND/HS
GND/HS
GND/HS
GND/HS

SPKR_L+
SPKR_L-

AMP_SD# 35

10KR2J-3-GP
R468

VOL
LVDD
RVDD
SOUND_L_OP1
1 R486
2
10KR3F-L-GP
C781
1
2

SPKR_R+

3
EC1

R475
1
2
10KR3F-L-GP

SC1U16V3ZY-GP

G1432_VOL

9
10
21
22

C778
1
2SOUND_L2

AUD_LOL

1 R466

U66

31

SC

Q29
2N7002-11-GP

TPAD30 TP76

EC2
MLVG0402220NV05BP-GP
2

C785

SPKR_R-

G1412_SHDN#
D

C791

SPKR_L+

AMP_SHUTDOWN

SCD1U16V2KX-3GP

C793

0R0805-PAD
C794

SCD1U16V2KX-3GP

SC10U10V5KX-2GP

SC4D7U25V5KX-GP

1 R510

5VA_OP_S0
2

5V_S0

SPK2
SPK1
4

Internal Speaker

R469
10KR2J-3-GP

G1412RC1U-GP

UMA_MIC

SC4D7U16V5ZY-GP

LINE Out
2

LINE_OUT_CN_L

33

LINE_OUT_CN_R

33

R607
1 R605

1
2
10KR3F-L-GP

39R3F-GP C900
HP_R

C882
1

LINE_OUT_R
2
SC47P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

HP_OUT_C_R 1
2
10KR3F-L-GP
SC4D7U6D3V3KX-GP
2

CLOAE TO CODEC

1 R616

G5240_EN 4

OUT
GND
NC#3

EN

1
2
3

39R3F-GP

R606

33

R614
1
2
10KR3F-L-GP

IN

C879

G5240B1T1U-GP

<Variant Name>

Q43
2N7002-11-GP
31,33 LOUR_JD#

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

G
S

HP_OUT_R

C880
1

SPDIF_PWR

U80
5

31

R617
HP_OUT_C_L 1
2
10KR3F-L-GP
SC4D7U6D3V3KX-GP
2

2
0R2J-2-GP

R615
10KR2J-3-GP

C903
1

LINE_OUT_L
2
SC47P50V2JN-3GP

HP_OUT_L

C899
1

31

DY

1
R618

HP_L

3D3V_S0

Title

AUDIO AMP/Speaker
Size
A3

Document Number

Date: Monday, March 10, 2008

A

Rev

P1/P15

SA
Sheet
E

32

of

56

LINE IN

MIC IN
LINEIN_JD#

LINE_IN_CN_R

LINE_IN_CN_L

LOUR_JD#

LINE_OUT_CN_L

LINEIN_JD

LINEIN_JD#

31

PHONE-JK241-GP-U

MIC_IN_R_R
MICIN_JD#

C912
SC1KP50V2JN-2GP

DY
MICIN_JD#

C911
SC1KP50V2JN-2GP

DY

1
C904
SC1KP50V2JN-2GP

DY

C905
SC1KP50V2JN-2GP

DY

C913
SC1KP50V2JN-2GP

MIC_IN_L_L

1
2
6
3
4
5
NP1
NP2

32

32

LINE_IN_CN_R

LINE_IN_CN_L

LINE_IN_CN_R

MIC1

LINE_IN_CN_L

1
2
6
3
4
5
NP1
NP2

LIN1

DY

31

PHONE-JK241-GP-U
SPDIF_CN

SPDIF_PWR

MICIN_JD#
1

1
C908
SC1KP50V2JN-2GP

DY

C918
SC1KP50V2JN-2GP

DY

C919
SC1KP50V2JN-2GP

DY

C907
SC1KP50V2JN-2GP

LINE_OUT_CN_R

DY

SPDIF / LINE OUT

LOUT1

MIC1VREFO_R
32
31

R626
2K2R2J-2-GP

PHONE-JK287-GP

31

MIC_IN_R

31

MIC_IN_L

1
2

DY

DY

R624
2K2R2J-2-GP
2

NP1
NP2

MIC1VREFO_L

C914
SC1KP50V2JN-2GP

MIC_IN_R_R

R625 2
1
1KR2F-3-GP
1
2
1KR2F-3-GP
R623
C915

C917
SC100P50V2JN-3GP

SC100P50V2JN-3GP

ANALOG/GIGITAL GROUND SEPARATE

MIC_IN_L_L

SPDIF_PWR
SPDIF_CN

C916
SC1KP50V2JN-2GP

SPDIF_PWR
SPDIF_CN

A
B
C

LINE_OUT_CN_R 32
LINE_OUT_CN_L 32
LOUR_JD#
31,32

MIC_IN_L_L

DRIVE
IC

LINE_OUT_CN_R
LINE_OUT_CN_L
LOUR_JD#

MIC In
1

METAL
LED

TX

MIC_IN_R_R
8
9
6
1
4
7
5

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AUDIO CONN/SUBWOOFER
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

33

of

56

E51_RxD

DY
10KR2J-3-GP

R394 2

18,36 LPC_LFRAME#
18,36 LPC_LAD0
18,36 LPC_LAD1
18,36 LPC_LAD2
18,36 LPC_LAD3
18 IRQ_SERIRQ
18 PM_CLKRUN#
19
KBRCIN#
19
KA20GATE

2
2

E51_TxD

DY

R405

SC4D7P50V2CN-1GP

R400
0R2J-2-GP

C688
2PCLK_KBC_RC

DY

A/D
LPC

D/A

VREF

104

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05/AD4
GPIO04/AD5

97
98
99
100
108
96

GPI94/DA0
GPI95/DA1
GPI96/DA2
GPI97/DA3

101
105
106
107

GPIO01/TB2
GPIO03/AD6
GPIO06
GPIO07/AD7
GPIO23/SCL3
GPIO24
GPIO30
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47/SCL4
GPIO50/TDO
GPIO51/TA3
GPIO52/RDY#
GPIO53/SDA4
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

AD_IA

KBC_MATRIX1
KBC_MATRIX0

keyboard

PCB_VER0
PCB_VER1

3D3V_AUX_S5_KBC
AC_IN#

2 R392
1
10KR2J-3-GP

TP102
B

BLUETOOTH_EN

WLAN BTN DY
2

30 WLANONLED#
R377
4K7R2J-2-GP
24
24

3D3V_S0

TP64 TPAD28
KBRCIN#

E51_TxD 111
E51_RxD 113
CCD_ON 112
114
14
15

30 PWRBTN_LED#
30 SLIENT_BTN#
23 S5_ENABLE

3D3V_S0

SPI

GPIO

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0
GPIO16
GPIO34
GPIO36/TB3

SER/IR

3D3V_AUX_S5_KBC

PWR_LED# 30

AD_OFF 47
RSMRST#_KBC 19
PM_SLP_S5# 19,24,41,44
BAT_LED# 30

VCORF

44

KBC_MUTE# 32
DVD_BTN#
30
BLON_OUT 15
RF_ON
24
VGA_NET_BTN# 30
SPI_WP#
35

3D3V_AUX_S5_KBC

USB_PWR_EN#

29

DY

VCORF

GND
GND
GND
GND
GND
GND

R390

DY 100KR2J-1-GP

R388
100KR2J-1-GP

R389
100KR2J-1-GP

SC

ECSCI#_KBC
<Variant Name>

Wistron Corporation

ECSWI#_KBC

3
49 GPU_BL_ON

SDM03MT40A-7-F-GP

R385
10KR2J-3-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

ATI_BL_ON
Title

CH715FPT-GP
2

2
1

ECSWI#_SB

U59
11 PANEL_BKEN

KBC_WPC775 / BIOS
Size
A3

Document Number

Date: Monday, March 10, 2008

5

R395
100KR2J-1-GP

WPC775L-0DG-GP-U
71.00775.00G

D10

19 ECSCI#_KBC_R

KBC_MATRIX1
KBC_MATRIX0

5
18
45
78
89
116

C644
SCD1U16V2ZY-2GP

103

2 R379
1
10KR2J-3-GP

R372
10KR2J-3-GP

KA20GATE
S5_ENABLE

ECSMI#_KBC

KBC for AMD

CAMERA_EN 15

DY

R404 2
1
10KR2J-3-GP

GPIO77/SPI_DI
GPIO76/SPI_DO/SHBM
GPIO75/SPI_CLK
GPIO81

AGND

DY

R403 2
1
10KR2J-3-GP

E51_TxD
E51_RxD

84
83
82
91

SP

NUM LED DY

btn,lid,ac

GPIO66/G_PWM

1
1

81

SMB

PM_SLP_S3# 19,23,24,37,42
KBC_PWRBTN# 30
AC_IN#
46
LID_CLOSE# 36

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

68
67
69
70

KBC_SDA2
KBC_SCL2

23 KBC_SDA2
23 KBC_SCL2
46,47 BAT_SDA
46,47 BAT_SCL

BATTERY----->

19

46

5V_AUX_S5

DY

DY

THERMAL----->
TP97
TP6

R412
100KR2J-1-GP

19
46
76
88
115

102

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

U26A

FOR KBC DEBUG

TPAD28
TPAD28

1
2

SCD1U16V2ZY-2GP

R413
100KR2J-1-GP
80

18,22,55 LPCCLK0

4K7R2J-2-GP

124
7
2
3
126
127
128
1
125
8
122
121
ECSCI#_KBC
29
ATI_BL_ON
9
ECSWI#_KBC 123

30 BATLOW_LED#

E51_TxD

DY

R411
100KR2J-1-GP

PCB_VER1

BAT_IN#

VDD

R393 2

R414
100KR2J-1-GP

PCB_VER0
3D3V_S0

AVCC

10KR2J-3-GP

47

PCB_VER1
0
0
1

DY

GPIO41

C684

2PLT_RST1#_1
100R2J-2-GP
SC27P50V2JN-2-GP

3D3V_S0

SC1U16V3ZY-GP

1
R386

11,18,27,37 PLTRST#

C696

BOAR VERSION
PCB_VER0
SA
0
SB
1
PD
0

VCC
VCC
VCC
VCC
VCC

KBC_AVCC

C711

3D3V_AUX_S5_KBC

L53
1
2
BLM11P600S

C301,C295 colse to Pin VDD

BAT_SCL
BAT_SDA

2
1

1
2

SCD1U16V2ZY-2GP

8
7
6
5
1
2
3
4

SCD1U16V2ZY-2GP

C683
C691

C662
SCD1U16V2ZY-2GP

DY

SC10U10V5ZY-1GP

C697
SCD1U16V2ZY-2GP

SRN4K7J-10-GP

RN41

C645
SCD1U16V2ZY-2GP

EC62

C668
SCD1U16V2ZY-2GP

3D3V_S0

SC
C170
SC10U10V5ZY-1GP

3D3V_AUX_S5_KBC

3D3V_AUX_S5_KBC

0R3-0-U-GP

3D3V_AUX_S5
1 R417

Rev

P1/P15

SA
Sheet
1

34

of

56

2 R365

2
3

U26B

15 BRIGHTNESS TP13

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

CHG_I_PRE_SEL

MODEL_1
MODEL_0
TPDATA
TPCLK

TPDATA
TPCLK

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

86
87
90
92

F_SDI
F_SDO
F_CS0#
F_SCK

KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

VCC_POR#

85

ECRST#

KBC

PS/2

R381
10KR2J-3-GP

SPIDI
SPIDO
SPICS#
SPICLK

R374
10KR2J-3-GP

DY

FIU

MODEL_0

SB

MODEL_1

1
1
1
1

TP48
TP46
TP45
TP43

TPAD28
TPAD28
TPAD28
TPAD28

1
1

TP61 TPAD28
TP44 TPAD28

ECRST#

2 R383
1
10KR2J-3-GP

3D3V_AUX_S5_KBC

79
30

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

36
36

KBC_CIR

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

23

Q9
B

EC_RST#

MMBT3906-3-GP
TP60 TPAD28
TP58 TPAD28

1
1

31

PM_PWRBTN#
CHG_ON#
KBC_BEEP

3D3V_AUX_S5_KBC

32KX1/32KCLKIN

C678
C

SC1U10V3KX-3GP

77

KBC_XI

1
10MR2J-L-GP

19
46

1 10KR2J-3-GP

DY

R138

33KR2J-3-GP

82.10026.021
R137

TP59

DY

36,55

32 AMP_SD#

CHARGE
CHARGE

36,55

KCOL[1..18]
C203
SC15P50V2JN-2-GP

1KBC_XO_R2

C202
SC15P50V2JN-2-GP
X2
RESO-32D768KHZ-GP

KBC_XO

KROW[1..8]

WPC775L-0DG-GP-U

DY

3D3V_AUX_S5_KBC

SRN10KJ-6-GP
RN43

KBC
1

EC68

4
3
2
1

DY

5
6
7
8

3D3V_AUX_S5_KBC

R376
10KR2J-3-GP
SCD1U16V2ZY-2GP

VGA

R380
10KR2J-3-GP

SPI_HOLD#

SPICS#
SPIDI

CS#
DO
WP#
GND

8
7
6
5

SPI_VCC
SPI_HOLD#
SPICLK_R
SPIDO_R

SPI_WP#

SPI_WP#

SPI_VCC

SPIDI_R
SPI_WP#

2
3
4

7
6
5

SPI_HOLD#
SPICLK_R
SPIDO_R

1
1

2 0R2J-2-GP
2 150R2J-L1-GP-U

DY

EC66

DY
EC67

SPICLK
SPIDO

SC
<Variant Name>

2M Bits
SPI FLASH ROM
PUT CLOSE TO KBC

DY

W25X16VSSIG-GP

SPICS#

SKT-SPI8P-GP-U
ER1
ER2

DY
EC69

VCC
HOLD#
CLK
DIO

SC47P50V2JN-3GP

34

1
2
3
4

SC4D7P50V2CN-1GP

SC47P50V2JN-3GP

MODEL (KBC internal pull high)

MODEL_0
MODEL_1
X17
0
0
P15
0
1
S13
1
0
P1
1
1

SPIDI_R
1
2
SPI_WP#
ER4
150R2J-L1-GP-U

U29

SKT FOR DEBUG

SKT1

ER3
0R3-0-U-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

KBC_WPC775 / BIOS(2/2)
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

35

of

56

TouchPad Connector

Internal KeyBoard Connector

5V_S0
5V_S0
C710
SCD1U16V2ZY-2GP

4
3

35,55

SC

26

KB1

RN42
SRN10KJ-5-GP

27

2
3
4
5
6
7
8
9
10
11
12

TPDATA
TPCLK

EC64
SC33P50V2JN-3GP

35
35

KCOL5
KCOL7
KROW8
KROW7
KROW6
KROW5
KROW4
KROW3
KROW2
KROW1
KCOL2
KCOL3
KCOL6
KCOL8
KCOL9
KCOL10
KCOL11
KCOL13
KCOL14
KCOL15
KCOL16
KCOL1
KCOL12
KCOL17 1
KCOL18 1

13

1
2

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

TPAD1
1

KCOL4

C714
SC1U10V2KX-1GP

35,55

KCOL[1..18]

KROW[1..8]

RIGHT#
EC63
SC33P50V2JN-3GP
LEFT#

14
20.K0228.012

ACES-CON12-4-GP-U

12

TP47
TP49

28
ACES-CON26-6GP

5V_S0

5V_S0

15'' TOUCHPAD BUTTON SWITCH

R610
10KR2J-3-GP

R609
10KR2J-3-GP

DY

DY

GOLDEN FINGER FOR DEBUG BOARD

20.K0320.026

SW1
1

SW2
LEFT#

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#
3D3V_S0

PLTRST_SYS#
LPC_LFRAME#

4
SW-TACT-91-GP
62.40009.561

LPCCLK1

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
EXT_FWH#

18,34
18,34
18,34
18,34

3D3V_S0

A15

(B1)

A14

(B2)

A2

(B14)

A1

(B15)

COVER SWITCH

3D3V_AUX_S5

18,34
18,34
18,34
18,34

4
SW-TACT-91-GP
62.40009.561

LID1

FOX-GF30
ZZ.GF030.XXX

VDD

OUTPUT

R643
10KR2J-3-GP

VSS
2

LID_CLOSE#
1

2 0R2J-2-GP

TOP VIEW

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

EM-6781-T30-GP
74.06781.07B

(BOTTOM VIEW)

C935
SCD1U10V2KX-4GP

3D3V_S0

18,22,55 LPCCLK1
1 R370

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

3D3V_S0

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

34

C580
SCD22U16V3KX-2-GP

PLTRST_SYS#
LPC_LFRAME#

18,24,25,28,37 PLTRST_SYS#
18,34 LPC_LFRAME#

5V_S0

U25
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

....

5V_S0

....

RIGHT#

<Variant Name>
1

DY
2

C631
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

C649

DY
2

C673

Wistron Corporation

SC10U10V5ZY-1GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

KEYBOARD/TPAD/DEBUG/LID
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

36

of

56

3D3V_S0

2
SB_PWRGD 19

R560
10KR2J-3-GP

Q42
2N7002-F-GP

1
R589
10KR2J-3-GP

R580
10KR2J-3-GP

2
R590
0R2J-2-GP

G
R572

D31

S
1

41,47 1D8V_S3_PG

0R2J-2-GP

SB
1

19,23,24,34,42 PM_SLP_S3#

SDM03MT40A-7-F-GP

G
S

Q40
2N7002-F-GP
2D5V_PWRGD

Q41
2N7002-F-GP

Q39
2N7002-F-GP

3D3V_S0

VCORE_EN 38,41,50

R551
10KR2J-3-GP

2D5V_S0

R592
10KR2J-3-GP

3D3V_S5

R541
10KR2J-3-GP

3D3V_S5

NB_SB POWERGOOD CIRCUIT

SB

3D3V_S0

D28

42 1D1V_PWRGD

U86

6
1

19 SB_TO_EC_PWRGD

EC_NB_PWRGD_R

4K7R2F-GP
3

C937

4
2

23 PWROK

GND

VCC

DY

Ati:0~30n sec

NB_PWRGD
1

R595
4K7R2F-GP

R588
38 VGATE_PWRGD

1D8V_S3

ATI 1.8V PULL HIGH

SNLVC1G08DCKRG4-GP
SCD01U16V2KX-3GP

SDM03MT40A-7-F-GP

1
R593

NB_PWRGD

11

C874
SCD1U10V2KX-4GP

41 1D2V_PWRGD

SCD1U10V2KX-4GP

C836

2
0R2J-2-GP

DY

DY

Run Power
5V_S5

5V_S0

DY

Z_12V_D3

2
Q45
2N7002-11-GP
G

Z_12V_D3

1
R627
0R0402-PAD

U82
2N7002DW-1-GP

APEC 9.2A
DESIGN 5.3A

8
7
6
5

AO4468-GP
84.04468.037
3D3V_S5

3D3V_S0

2
C909

3D3V_S5
1
2
3
4

U81
S
S
S
G

D
D
D
D

APEC 9.2A
DESIGN 6A

8
7
6
5

C890
SCD1U10V2KX-4GP

U79

11,18,27,34 PLTRST#

3
AO4468-GP
84.04468.037

VCC

GND

DY
1D8V_S0

1D8V_S3
1
2
3
4

R460
2

U65
S
S
S
G

D
D
D
D

8
7
6
5

<Variant Name>

AO4468-GP
84.04468.037

Wistron Corporation

C769

DY
1

SCD1U25V3KX-GP

PM_SLP_S3# 19,23,24,34,42

0R2J-2-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

APEC 9.2A
DESIGN 8A?

Title

RUNPOWER
Size
A3

Document Number

Date: Monday, March 10, 2008

5

PLTRST_SYS# 18,24,25,28,36

SNLVC1G08DCKRG4-GP

84.27002.D3F

Z_12V_D4

C886

D
D
D
D

DY

1
R638
100KR2J-1-GP

SC

R628
10KR2J-3-GP

1
2
3
4

SCD1U25V3KX-GP

DY

Z_12V_G3
1
330KR2F-L-GP

SCD1U25V3KX-GP
1
R612
D34
0R0402-PAD
RLZ12B-1-GP

2
R639
R635
100R5J-3-GP

3D3V_runpwr 2

DY

330KR3J-L-GP

SCD1U25V3KX-GP

3D3V_S0

R613

SCD1U25V3KX-GP

C893

2 Z_12V
10KR2J-3-GP

1
R641

RUN_POWER_ON

U76
S
S
S
G

Q46
TP0610K-T1-GP

DCBATOUT

C892
1

Rev

P1/P15

SA
Sheet
1

37

of

56

DCBATOUT
1

1 R31
26265_FB_NB_R
44K2R2F-1-GP

C26
SC1U16V3KX-2GP

1
C31

C599

2
SC1KP50V2KX-1GP

DY

GNDA_VCORE

SCD1U10V2KX-4GP

C28
SCD1U50V3KX-GP

5V_S0

1 R331

3D3V_S0

2 0R2J-2-GP

GNDA_VCORE

SC
37 VGATE_PWRGD
6 CPU_PWRGD_SVID_REG
6
CPU_SVD
6
CPU_SVC
37,41,50 VCORE_EN

1
R668

2
0R0402-PAD

SC R23

2/27

6265_SVD
2
6265_SVC
0R0402-PAD
2
0R0402-PAD
6265_ENABLE
2
2 2K2R2J-2-GP6265_RBIAS
93K1R2F-L-GP 6265_OCSET
6265_VDIFF0
6265_FB0
6265_COMP0
6265_VW0

1
R18 1
R17 1
R16 1
R29

23K7R2F-GP

GAP-CLOSE-PWR

DY

GAP-CLOSE-PWR
G70
2

GAP-CLOSE-PWR
G71
2

GAP-CLOSE-PWR
G72
2

UGATE_NB 39

CPU_VDDNB_RUN_FB_L_R

1 R329
2
0R2J-2-GP

CPU_VDDNB_RUN_FB_L

R327
10R2F-L-GP

49
48
47
46
45
44
43
42
41
40
39
38
37

+VCC_CORE0
+VCC_CORE1

BOOT_NB
BOOT0
UGATE0
PHASE0

36
35
34
33
32
31
30
29
28
27
26
25

BOOT_NB
BOOT0
UGATE0
PHASE0
PGND0
LGATE0
PVCC
LGATE1
PGND1
PHASE1
UGATE1
BOOT1

BOOT_NB 39

5V_S0
LGATE0
LGATE1
PHASE1
UGATE1
BOOT1

UGATE0
PHASE0
BOOT0
LGATE0

39
39
39
39

UGATE1
PHASE1
BOOT1
LGATE1

39
39
39
39

C61

ISN1
ISP1

Close to
CPU socket

GAP-CLOSE-PWR

UGATE_NB

6265_VSEN0
6265_RTN0
6265_RTN1
6265_VSEN1
6265_VDIFF1
6265_FB1
6265_COMP1
6265_VW1

ISP0
ISN0

1D8V_S3

R33
10R2J-2-GP

R41
0R2J-2-GP

DY

R44
10R2J-2-GP

SC

ISP0
ISN0

39
39

ISP1
ISN1

39
39

SCD22U6D3V2KX-1GP

1
2
B

C951

GAP-CLOSE-PWR
G69
2

13
14
15
16
17
18
19
20
21
22
23
24

ISL6265HRTZ-T-1-GP
74.06265.A73

GNDA_VCORE

SC

PHASE_NB

OFS/VFIXEN
PGOOD
PWROK
SVD
SVC
ENABLE
RBIAS
OCSET
VDIFF0
FB0
COMP0
VW0

G67
1

6265_ENABLE

LGATE_NB 39

ISP0
ISN0
VSEN0
RTN0
RTN1
VSEN1
VDIFF1
FB1
COMP1
VW1
ISP1
ISN1

GNDA_VCORE

1
2
3
4
5
6
7
8
9
10
11
12

PHASE_NB 39

LGATE_NB

SC2D2U10V3KX-1GP

U2

GAP-CLOSE-PWR
G68
2

2
C

GNDA_VCORE

11K5R2F-GP

GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB

R19 DY
0R2J-2-GP

6265_OFS/VFIXEN

R7
10KR2F-2-GP

DY

CPU_VDDNB_RUN_FB_H

PHASE_NB

GAP-CLOSE-PWR
G66
2

0R2J-2-GP

1
R4
10KR2F-2-GP

6265_OCSET_NB

DY R10

R14
0R2J-2-GP

6265_VIN
6265_VCC
6265_FB_NB
6265_COMP_NB
6265_FSET_NB
6265_VSEN_NB

1 R52

ST15U25VDM-3-GP

GNDA_VCORE
3D3V_S0

TC14

20071122
R330
10R2F-L-GP

GNDA_VCORE

2R3J-GP

CPU_VDDNB

1 R38
2
22KR2F-GP

1 R28

DCBATOUT_6265

C37
1

DCBATOUT_6265
G65
1

2R3J-GP

SC180P50V2JN-1GP
2

C33

5V_S0

SC33P50V2JN

R24

ST15U25VDM-3-GP

C36
1

1
R34 1
R36
1
R39 1
R45

6 CPU_VDD0_RUN_FB_H
6 CPU_VDD0_RUN_FB_L

6 CPU_VDD1_RUN_FB_L
6 CPU_VDD1_RUN_FB_H

R37
10R2F-L-GP

R35
10R2J-2-GP

2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD
2
0R0402-PAD

Parallel

Close to
CPU socket
DY

6265_FB0_C
R22
249R2F-GP
1
2

C27
C23
1

C21
1

SC4700P50V2KX-1GP

1
2

1KR2F-3-GP

SC180P50V2JN-1GP
R20

1 R27

SC180P50V2JN-1GP
2 DY

C17
1

C22

6265_FB1_C
R42
249R2F-GP
1
2

C44
1

R21
2

1
2

1KR2F-3-GP
SC180P50V2JN-1GP
C18
1
2

54K9R2F-L-GP
6265_FB1_R

SC1KP50V2KX-1GP

C55

<Variant Name>

C54
1

SC1000P50V3JN-GP
C59
1

1 R55

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

2
Title

6K81R2F-1-GP

ISL6265HR_CPU_Core/VDDNB_1/2
Document Number
Rev

Size
A3

SC180P50V2JN-1GP
Date: Monday, March 10, 2008

SC1KP50V2KX-1GP

Wistron Corporation

R54
1 R47

2
6K81R2F-1-GP

SC180P50V2JN-1GP
2

SC4700P50V2KX-1GP SC180P50V2JN-1GP

SC1KP50V2KX-1GP

54K9R2F-L-GP
6265_FB0_R

C52
C45

P1/P15

SA
Sheet
1

38

of

56

DCBATOUT_6265

LGATE0

1 R32
2
4K02R2F-GP
C29
1
2

DCBATOUT_6265

TC2
SE330U2VDM-L-GP

R25
16K2R3F-GP

SI4634DY
84.04634.037

TC16

SE330U2VDM-L-GP

TC15

20071204

20071108

SE330U2VDM-L-GP

R670
0R2J-2-GP

S
S
S
G

SI4634DY
84.04634.037

POWERPAK-8P-GP

LGATE0

S
S
S
G

POWERPAK-8P-GP

38

U55

U54

4
3
2
1

C63
SCD22U10V3KX-2GP

IND-D36UH-9-GP

5
6
7
8

5
6
7
8

BOOT0_R 1

4
3
2
1

1 R57
2
1R3J-L1-GP

+VCC_CORE0

D
D
D
D

BOOT0

BOOT0

+VCC_CORE0
Design Current: 12.6A
Peak current: 18A
OCP_min:24A

L47

1/14

D
D
D
D

38

C604
1

1
2

1
2

4
3
2
1

UGATE0
PHASE0

C71

SCD1U50V3KX-GP

SI7686
84.07686.037

C601

SC10U25V6KX-1GP

UGATE0
PHASE0

S
S
S
G

38
38

D
D
D
D

POWERPAK-8P-GP

SC10U25V6KX-1GP

5
6
7
8

C603
U53

SC10U25V6KX-1GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

Inductor: 4.7uH NEC_TOKIN MPLC0730L4R7 / 68.4R710.20G
O/P cap: 330U 2.5V 2R5TPE330M9L/ 77.23371.13L
H/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037
L/S: SI7326DN/30mOhm/ 4.5Vgs/ 84.07326.037

38

4
3
2
1
UGATE_NB

PHASE_NB 38

CPU_VDDNB
L46

PHASE_NB

5
6
7
8

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

C611
SCD1U10V2KX-4GP

DY

TC13
SE220U2VDM-12GP

U52
SI4800BDY-T1

DCBATOUT_6265
B

LGATE_NB

C60

ISP1

38
5

ISN1

ISN1

GAP-CLOSE-PWR-3-GP

38

ISP1

LGATE1

SCD1U16V3KX-3GP
R336
1 R60
2
1 DY
2
10R2F-L-GP
NTC-10K-9-GP
DY
G5
ISP1_R
1

SI4634DY
84.04634.037

1
TC4
2

TC3

SE330U2VDM-L-GP

1 R59
2
4K02R2F-GP

SE330U2VDM-L-GP

1
5
6
7
8

SI4634DY
84.04634.037

20071204

IND-D36UH-9-GP
R58
16K2R3F-GP

S
S
S
G

LGATE1

U11
POWERPAK-8P-GP

38

S
S
S
G

U57
POWERPAK-8P-GP

C64
SCD22U10V3KX-2GP

1/14

4
3
2
1

BOOT1_R 1

5
6
7
8

1 R61
2
1R3J-L1-GP

4
3
2
1

BOOT1

+VCC_CORE1

D
D
D
D

BOOT1

20071108
L48

UGATE1
PHASE1

D
D
D
D

38

+VCC_CORE1
Design Current: 12.6A
Peak current: 18A
OCP_min:24A

1
2

1
2

C607
SCD1U50V3KX-GP

4
3
2
1

C606
SC10U25V6KX-1GP

SI7686
84.07686.037

C81
SC10U25V6KX-1GP

S
S
S
G

UGATE1
PHASE1

D
D
D
D

POWERPAK-8P-GP

38
38

SC10U25V6KX-1GP

5
6
7
8

C79
U56

38 LGATE_NB

1
2
IND-4D7UH-120-GP
1

ISN0

C56
SCD22U10V3KX-2GP

D
D
D
D

BOOT_NB

G
S
S
S

BOOT_NB

G4

4
3
2
1

38

Iomax=3A
OCP>6A
1

38 UGATE_NB

DY

NTC-10K-9-GP
1

ISP0
ISP0

1
2

5
6
7
8

38

R26
10R2F-L-GP
ISP0_R

G
S
S
S

D
D
D
D

C605
SCD1U50V3KX-GP

SC10U25V6KX-1GP

U51
SI4800BDY-T1

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

C600

SC10U25V6KX-1GP

C602

GAP-CLOSE-PWR-3-GP

SCD1U16V3KX-3GP
R335

DY

TC1
SE330U2VDM-L-GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1/14

Title

ISL6265HR_CPU_Core/VDDNB_2/2
Document Number
Rev

Size
A3

Date: Monday, March 10, 2008

2

P1/P15

SA
Sheet
1

39

of

56

3D3V_S5
G86

1
R492
100KR2J-1-GP

2
GAP-CLOSE-PWR
G95
2

GAP-CLOSE-PWR
G96
2

GAP-CLOSE-PWR
G97
2

GAP-CLOSE-PWR
G98
2

GAP-CLOSE-PWR
G99
2

GAP-CLOSE-PWR
G100
2

1
G

Q33
2N7002-11-GP

Q31
2N7002-11-GP
G
PWR_S5_EN 23
S

1
2
D

DY

GAP-CLOSE-PWR
G92
2

C545
D

R233
160KR2F-GP

5V_S5
1

GAP-CLOSE-PWR

R542
169KR2F-1-GP

GAP-CLOSE-PWR
G91
2

DY

5V_PWR

5V_AUX_S5

G94

Q34
2N7002-11-GP

Q32
2N7002-11-GP
G
PWR_S5_EN

23

GAP-CLOSE-PWR
G84
2

51125_ENTIP1
C817

GAP-CLOSE-PWR
G83
2

GAP-CLOSE-PWR
G90
2

R493
100KR2J-1-GP

GAP-CLOSE-PWR
G82
2

GAP-CLOSE-PWR
G89
2

1/14

51125_ENTIP2

GAP-CLOSE-PWR
G88
2

GAP-CLOSE-PWR
G81
2

GAP-CLOSE-PWR
G80
2

GAP-CLOSE-PWR
G87
2

SC18P50V2JN-1-GP

TC11
ST15U25VDM-1-GP

1/14

5V_AUX_S5

GAP-CLOSE-PWR
G79
2

SC18P50V2JN-1-GP

DY

3D3V_PWR

DCBATOUT_51125
G78
2

DCBATOUT

200711212

GAP-CLOSE-PWR

DCBATOUT_51125

DCBATOUT_51125

GAP-CLOSE-PWR

51125_PGOOD

51125_ENTIP1

VREF

GND

15

TONSEL

GND

25

SKIPSEL

VCLK

18

51125_VREF
3D3V_AUX_S5

0R2J-2-GP

DY

1
R528

1
R564

Close to VFB Pin (pin5)

3D3V_AUX_S5

0R2J-2-GP

0R2J-2-GP

DY

1
R566

DY

1
R565

SC10U10V5KX-2GP

2
0R2J-2-GP

2
D
D
D
D

5
6
7
8
G
S
S
S

R523
0R2J-2-GP

R547

DY

DY

R535
30KR2F-GP

C809
SC18P50V2JN-1-GP

51125_FB1_R

DY
1

1/14

Id=7.7A
Qg=8.5~13nC
Rdson=16.5~21mohm

2
R524
20KR2F-L-GP

GAP-CLOSE-PWR-3-GP

Close to VFB Pin (pin2)

C834

SC10U10V5KX-2GP

C826
51125_VREF

5V_AUX_S5

G76

GAP-CLOSE-PWR
R537 1
2
0R0402-PAD

3D3V_PWR
TPAD28

TC19

2
1

SC

VREG5

74.51125.073
3D3V_AUX_S5

51125_VCLK

17

TPS51125RGER-GP

5V_AUX_S5_51125

14
51125_SKIPSEL

VREG3

51125_TONSEL

ENTRIP2

23

EN0

DY

PGOOD
ENTRIP1

2 51125_EN 13
820KR2F-GP
51125_ENTIP2 6

G85

ST220U6D3VDM-20GP

51125_FB1

VFB1

C569
SCD1U10V2KX-4GP

VFB2

51125_FB2

24

4
3
2
1

VO1

U72

VO2

G75
R532
10KR2F-2-GP

51125_DRVL1

1
1

1 2

C948
SCD1U16V2KX-3GP

DYSC18P50V2JN-1-GP

19

51125_VO1

8
7
6
5
1
2
3
4

SI4812BDY-T1-E3-GP

1
2

1
2

51125_FB2_R
C805

1/14

DY

DRVL1

5V_PWR

DRVL2

51125_VO2

L41
1
2
IND-3D3UH-57GP

100KR2J-1-GP

R540
6K65R2F-GP

SCD22U6D3V2KX-1GP

Id=7.7A
Qg=8.5~13nC

Rdson=16.5~21mohm
DYR530
0R2J-2-GP

C810

51125_LL1

1 2

12

51125_VREF

51125_DRVH1

20

GAP-CLOSE-PWR-3-GP

21

LL1

Iomax=6A
OCP>12A

51125_DRVL2

1
R562

G
S
S
S

DRVH1

5
6
7
8

LL2

Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A

D
D
D
D

DRVH2

11

G
S
S
S

10

51125_LL2

D
D
D
D

G93

GAP-CLOSE-PWR-3-GP

SCD1U10V2KX-4GP

ST220U6D3VDM-20GP

SCD1U25V3KX-GP
C822
1
2

DY
C854

C849

4
3
2
1

51125_DRVH2

U73

51125_VBST1

VBST1

SI4812BDY-T1-E3-GP

TC18

22

VBST2

C864

SCD1U25V3KX-GP

L40

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

51125_VBST2 9

1
2
IND-3D3UH-57GP

2
C833
1

3D3V_AUX_S5_5_51125 8

1
2
3
4

3D3V_PWR

C568

U44

U71
SI4800BDY-T1

G
S
S
S

DY

16

D
D
D
D

Id=7A
Qg=8.7~13nC
Rdson=23~30mohm

U74
SI4800BDY-T1

VIN

8
7
6
5

1
2

SCD01U50V2KX-1GP

C840
SC10U25V6KX-1GP

Cyntec 7*7*3
DCR=30mohm, Irating=6A
Isat=13.5A

SC10U25V6KX-1GP

Iomax=6A
OCP>12A

C850

SCD01U50V2KX-1GP

SC10U25V6KX-1GP

C856

DY

SCD01U50V2KX-1GP

SC10U25V6KX-1GP

C842

SC10U25V6KX-1GP

C838

DCBATOUT_51125

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51125_5V/3D3V
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

40

of

56

DCBATOUT_51124
DCBATOUT

DCBATOUT_51124

1D8V_PWR

1D8V_S3
G39

G55
1
2

1
2

1
2

1
2

1
2

ST330U2D5VDM-9GP

1
1
2

GAP-CLOSE-PWR
G43
2

GAP-CLOSE-PWR
G44
2

GAP-CLOSE-PWR
G45
2

GAP-CLOSE-PWR
G46
2

GAP-CLOSE-PWR
G47
2

GAP-CLOSE-PWR
G48
2

24
7

51124_V5FILT

R520
30KR2F-GP

1D2V_PWR

C774

TC9

SANYO
Fujitsu
ESR=15mohm ESR=15mohm

Id=5A
Qg=8.7~13nC,
Rdson=23~30mohm

SE220U2D5VDM-6GP

2
1

SI4800BDY-T1

SCD1U16V2KX-3GP

1D2V_S0
G49

SCD1U10V2KX-4GP

DY

51124_VFB2

U40

1D2V_PWR

DY
2

IND-1D5UH-23-GP
R526
17K8R2F-GP

D
D
D
D

R533
0R2J-2-GP

1D2V Iomax=5A
OCP>10A
2

GAP-CLOSE-PWR
G50
2

GAP-CLOSE-PWR
G51
2

GAP-CLOSE-PWR
G52
2

GAP-CLOSE-PWR
G53
2

GAP-CLOSE-PWR
G54
2

Vo(cal)=1.2077V
C814
1

5
6
7
8

DY

C522

G
S
S
S
4
3
2
1

L65

10KR2J-3-GP

DY

Cyntec 6*6*3
DCR=14mohm, Irating=9A
Isat=18A
1

DY R548

51124_VBST2

C800

1
2

5
6
7
8
D
D
D
D

TONSEL

Id=5A
Qg=8.7~13nC,
Rdson=23~30mohm

G
S
S
S

U41
SI4800BDY-T1

TPS51124RGER-GPU1

51124_LL2

51124_DRVH2
51124_LL2
51124_DRVL2

10
11
12

51124_VBST1

SCD1U16V2KX-3GP
C825
1

51124_DRVH1
51124_LL1
51124_DRVL1

21
20
19

17
14
1
2

2
2

GAP-CLOSE-PWR
G42
2

SC18P50V2JN-1-GP

51124_LL1

GAP-CLOSE-PWR
G41
2

GAP-CLOSE-PWR

74.51124.073

R561
21KR2F-GP

C827
1

TC8

SANYO
ESR=9mohm

Id=14.5A
Qg=25~35nC,
Rdson=5.9~7.25mohm

C528
DRVH2
LL2
DRVL2

51124_TRIP1
51124_TRIP2

R559
10K7R2F-GP

DRVH1
LL1
DRVL1

GND
GND
PGND2
PGND1

GAP-CLOSE-PWR
G40
2

DCBATOUT_51124

VBST1
VBST2

3
25
13
18

PGOOD1
PGOOD2

1
6
VO1
VO2

2
5
VFB1
VFB2

EN1
EN2

TRIP1
TRIP2

23
8

1/14

1D2V_PWRGD 37

22
9

51124_EN1
51124_EN2

37,47

C462

DY

SCD1U50V3KX-GP

V5FILT
V5IN

BC2
SCD47U6D3V2KX-GP

1D8V_S3_PG

SC10U25V6KX-1GP

15
16

S
R519
47KR2F-GP

51124_TONSEL

DY
2

U43

51124_V5FILT

1 1KR2J-1-GP

SCD1U16V2KX-3GP

1
2

C950
2

DY

DY

51124_VFB1

SC10U25V6KX-1GP

R546 2

37,38,50 VCORE_EN

C949 SCD1U16V2KX-3GP
2
1

1
SC1U10V3KX-3GP

1
2

DY

DY

R525
63K4R2F-1-GP

SCD1U10V2KX-4GP

1
1KR2J-1-GP
1
BC1
SCD47U6D3V2KX-GP
2

S
S
S
G

2
R545

20071016

R571
3D3R3J-L-GP1D2V_PWR
1D8V_PWR
51124_VFB2
51124_VFB1
C839

1/14

SC18P50V2JN-1-GP

10KR2J-3-GP
10KR2J-3-GP

1/14

C813

D
D
D
D

R539
R534

19,24,34,44 PM_SLP_S5#

COIL-1UH-33-GP

U37
FDS6676AS-GP

Vo(cal)=1.8046V

4
3
2
1

5
6
7
8

L64

5V_S5

Iomax=12A
OCP>18A
1D8V_PWR

3D3V_S5

GAP-CLOSE-PWR

C837
SC4D7U10V5KX-1GP

Cyntec 10*10*4
DCR=3mohm, Irating=15A
Isat=40A

4
3
2
1

GAP-CLOSE-PWR
G60
2

5
6
7
8

GAP-CLOSE-PWR
G59
2

Id=7.5A
Qg=4~5nC,
Rdson=26~30mohm

DY

4
3
2
1

GAP-CLOSE-PWR
G58
2

C513
SCD1U50V3KX-GP

DY

U36

C799
SC10U25V6KX-1GP

GAP-CLOSE-PWR
G57
2

C525
SC10U25V6KX-1GP

FDS8884-GP
D
S
D
S
D
S
D
G

TC10
ST15U25VDM-1-GP

2
GAP-CLOSE-PWR
G56
2

GAP-CLOSE-PWR

TONSEL

GND

OPEN

V5FILT

240k/CH1
300k/CH2

300k/CH1
360k/CH2

360k/CH1
420k/CH2

<Variant Name>

Wistron Corporation

Vout=0.758V*(R1+R2)/R2 --> PWM mode

Vout=0.764V*(R1+R2)/R2 --> Skip Mode

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51124_1D8V/1D2V
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

41

of

56

1D1V_PWR

1D1V_S0
G29
1

DCBATOUT_51117
1

1
2

2
1
5
6
7
8

L27
1
2
IND-1D5UH-34-GP

GAP-CLOSE-PWR
G64
2

GAP-CLOSE-PWR
G33
2

GAP-CLOSE-PWR
G34
2

GAP-CLOSE-PWR
G35
2

GAP-CLOSE-PWR
G36
2

GAP-CLOSE-PWR
G37
2

GAP-CLOSE-PWR
G38
2

GAP-CLOSE-PWR

51117A_EN_PSV
51117A_TON
51117A_TRIP
1

1 R217
2
249KR2F-GP

14
5
1
2
11

51117A_DRVH

LL

12

51117A_LL

VBST
VFB

DRVL
VOUT
PGOOD

EN_PSV

9
3
6

51117A_DRVL

GND
PGND

7
8

TON
TRIP

1
2

C477
SC18P50V2JN-1-GP
2
1

C459
SCD1U10V2KX-4GP

13

TC7
SE330U2D5VDM-LGP

DY

R210
31K6R2F-GP

SANYO
ESR=15mohm

GAP-CLOSE-PWR
2

51117A_VBST
51117A_VFB
R212 0R2J-2-GP
1
2
19,23,24,34,37 PM_SLP_S3#

DRVH

V5FILT
V5DRV

DY

1D1V Iomax=9A
OCP>18A

20071024

1D1V_PWR

1/14

3D3V_S5

20071016
1

4
10

51117A_VFB
S
S
S
G

Id=10A
Qg=9~13nC,
Rdson=12~15mohm

U35

R211
15KR2F-GP

1
2

U39
FDS8880-NL-GP

SCD1U25V3KX-GP

D11
B0530WS-7-F-GP

C512
1

C478
SC1U10V2KX-1GP

D
D
D
D

5V_S5

5
6
7
8

51117A_V5FILT

GAP-CLOSE-PWR
G31
2

GAP-CLOSE-PWR
G63
2

Vo(cal)=1.1060V

4
3
2
1

R209
300R3F-GP

2
GAP-CLOSE-PWR
G62
2

1D1V_PWR

C514
SC1U10V2KX-1GP

GAP-CLOSE-PWR
G30
2

GAP-CLOSE-PWR
G32
2

Cyntec 10*10*4
DCR=4.2mohm, Irating=16A
Isat=33A

4
3
2
1

C524
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U50V3KX-GP

Id=7.5A
Qg=4~5nC,
Rdson=26~30mohm

FDS8884-GP
D
S
D
S
D
S
D
G

5V_S5

C536
1

C519

U38

DCBATOUT
G61

Vout=0.75*(R1+R2)/R2

R213
200KR2J-L1-GP

TPS51117PWR-GP

R223
20KR2F-L-GP

C481
SCD1U10V2KX-4GP

DY

37

151117A_EN_PSV

1D1V_PWRGD

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51117_1D1V
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

42

of

56

G U COR

DC

OU

DC

WR
G

OU

G U COR

G
G

C O

WR

G
D

VGA
C

CD U

DY

VGA
C

VGA

WR

WR

C O

WR

G
G

C O

G
G

WR

C O

WR

G
G

C O

G
G

WR

C O

WR

G
G

C O

G
G

C O

WR

G
G

C O

WR

G
G

C O

WR

G
G

C O

WR

C O

WR

Id=7.5A
Qg=4~5nC,
Rdson=26~30mohm

VGA

WR

C O

G
G

C O

G
G

Cyntec 10*10*4
DCR=3mohm, Irating=15A
Isat=40A

1D2V Iomax=11A
OCP>20A
G U COR

Vo(cal)=1.2033V
UH

VGA
R

DY

DY

U
C
CD U

VGA

Id=14.5A
Qg=25~35nC,
Rdson=5.9~7.25mohm

VGA

DR H

DR H

VGA

DR
OU
GOOD

ON
R

R
R

ON
R

VGA

G U COR

20071016

GND
GND

VGA

R
R

VGA

WR

WR G
R

DR
R

VGA

Vout=0.75*(R1+R2)/R2

DY

20071123

DY

VGA

C
G COR

1/14

R
R

DY

SANYO
ESR=15mohm

1/14

DR

VGA

DM G

VGA

WRGD

R
R

NG

DY

Q
N

G
WRCN

U D

CD U

G
C

C U

VGA

VGA
G

CO

1/14

C
N

R
C
C U

WR

RR

G
WRCN

C
NG

DY

Q
N

DY

RR

VGA
VGA_EN
G
N

G O
CD U

VGA

PWRCNTL_1
0
0
1

Vout(Default)
1.2V
1.0V
0.9V

Vout(Cal.)
1.2033V
1.0091V
0.9057V

R
WRCN

RR
CD U

PWRCNTL_0
0
1
0

WRCN

R
WRCN

RR

WRCN

CD U

DY

DY

G
G

DY

DY

DY

N m

W s ron Corpora on
H
H

W R H
ROC

TPS51117_GPU_Core
D

N m

P1 P15
D
5

SA

M
1

1D5V_S0
Iomax=1A

G957

1D5V_S0
G102
1

GAP-CLOSE-PWR
G101
1
2

C933

SC10U10V5KX-2GP

U83

GAP-CLOSE-PWR
3D3V_S0

3
2
1

VOUT
GND
VIN
G957T65UF-GP

C928
SC1U10V3KX-4GP

74.95765.03C

20071108

3D3V_S5

1D2V_S5

20071108

1D2V_S5
Iomax=400mA

G9161-120U65U-GP

74.09161.E3C

DY

IN
GND
OUT

U34

C479
SC10U6D3V5MX-3GP

DY

C482
SC10U6D3V5MX-3GP

SC10U10V5ZY-1GP

C776
C777
SC1U10V3KX-4GP

1
2
3

Place near to SB700

C463

C467
SCD1U10V2KX-4GP

GND

C412
SCD1U10V2KX-4GP

VOUT
VIN

G9131-25T73UF-GP
74.09131.A31

2
GAP-CLOSE-PWR

C414
SC4D7U6D3V5KX-3GP

GAP-CLOSE-PWR

20071108
C444

GAP-CLOSE-PWR
G28
1
2

1
2
3
4
5
1

C438

SC10U10V5KX-2GP SC10U10V5KX-2GP
2

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

RT9026PFP-GP
74.09026.079

SC1U10V3KX-4GP
C447

10
9
8
7
6

9026_S5
1
0R2J-2-GP
9026_S3
1
0R2J-2-GP

GND

2
R194

U28

GAP-CLOSE-PWR
G26
1
2

11

DDR_VREF_S3

2D5V_S0

2D5V_LDO

G25

R198

3D3V_S0

G27

U32

19,24,34,41 PM_SLP_S5#

2D5V/300mA
0D9V_S3

DDR_VREF_PWR

C460
SC1U10V3KX-4GP

DY

2D5V_S0
Iomax=0.3A

Iomax=1A
OCP>2A

SC10U10V5KX-2GP

20071108
2

5V_S5

1D8V_S3

20071122
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

0D9V&2D5V&1D25V&1D5V
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

44

of

56

CPU_CORE
Intersil ISL6265

Charger Max8725

VID Setting

CPU_SVD

Input Signal

Output Signal

SVD

CPU_SVC

PGOOD

VGATE_PWRGD

Adapter

Output Signal

MAX8725_VCTL
ICTL

BATT

BATT_SENSE

Input Signal

AD_OFF

CHARGE_ON1#
PKPRES

Input Signal

VCORE_EN

PGD_IN

ACOK

PHASE0

Voltage Sense

VCC_CORE0

AD+
ACIN

CPU_VDD1_RUN_FB_L

BT+
DCBATOUT

VOUT (O)

BOOT_NB

Input Power
VCC(I)

TPS51124
1D8V_S3
1D2V_S0

TPS51117
GPU_CORE

5V_S0
VCC(I)

Input Signal

VCC(I)
PM_SLP_S3#

Input Signal

Output Power

EN

PM_SLP_S5#
GPU_CORE_S0

VOUT (O)

Input Signal

1D8V_S3

VOUT (O)

Input Power
DCBATOUT_51124

DCBATOUT_51117

Output Signal
PGOOD1

Output Power

EN1
EN2

VCORE_EN

Input Power

TPS51125
5V/3D3V

51125_ENTRIP1

AD+
VCC(O)

VCC(I)

CPU_VDDNB

RTN1

DCBATOUT_6265

3D3V_S0

VOUT (O)

PHASE1

RTN0

Output Power

Input Power
Output Power

VCC_CORE1

VSEN1

CPU_VDD0_RUN_FB_L

AD_JK

VSEN0

CPU_VDD1_RUN_FB_H

AD_IN

(O)

AC_IN#

Output Power
Input Power

CPU_VDD0_RUN_FB_H

Output Signal

(I)

SVC

1D2V_S0

VOUT (O)
VIN

5V_S5

5V_S5

VIN

VCCA

3V/5V_POK

ENTRIP1

51125_ENTRIP2

Output Power

ENTRIP2

3D3V(O)

Input Power

TPS51117
1D1V_S0

RT9026PFP
0D9V_S3

5V_S5

5V(O)
3D3V_S5

Input Signal
PM_SLP_S5#

Input Signal

Output Signal
PM_SLP_S3#

EN

Output Signal
B

1D1V_PWRGD
POK

EN

3D3V_AUX_S5
DCBATOUT_51125

VREG3
VIN

VOUT (O)
5V_AUX_S5

VREG5

0D9V_S3

Input Power
1D8V_S3

5V_S5

VIN

5V_S5

DCBATOUT_51117

VIN

Input Power
VIN

Output Power
1D1V_S0

VOUT (O)
VIN

G9161
1D2V_S5
Input Power

3D3V_S5

Output Power

VIN

G957
1D5V_S0
VOUT

1D2V_S5

Input Power
3D3V_S0

VIN

Output Power
VOUT (O)

1D5V_S0

<Variant Name>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Block Diagram

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

45

of

56

BQ24745_CSSN
TP1

BOOT
VDDP

25
21

BQ24745_BST
BQ24745_VDDP

GAP-CLOSE-PWR

C116
1
2

1SS4000GPT-GP

SC1U10V3KX-3GP

BQ24745_FBO_RC

C124
SC1U10V3KX-3GP

FBO
EAI
EAO
VREF
CE
GND

16

VFB

15

BATT_SENSE

BATT_SENSE 47

U22
BQ24745RHDR-GP

NC#16

CHG_AGND

C90
SC10U25V6KX-1GP

C88
SC10U25V6KX-1GP
2
1

C87
SC10U25V6KX-1GP
2
1

2
R339
0R0402-PAD

CHG_AGND

Q7
2N7002-11-GP

R345
100KR2J-1-GP

AC_OK

CHG_ON#

connect to KBC

G
S

35

C132
SCD1U10V2KX-4GP
2
1

BQ24745_CHG_ON

100KR2J-1-GP
R346

BQ24745_CSIN

CHG_AGND

100KR2J-1-GP
R113

Q8
2N7002-11-GP

BQ24745_CSIP

3D3V_AUX_S5

1
2

C613
SC1U10V3KX-3GP

AC_IN#

AC_IN#

3D3V_AUX_S5
R341
100KR2J-1-GP BQ24745_VREF

AC_IN# to KBC
34

4
3
2
1

6
5
4
3
7
12

3D3V_AUX_S5

connect to KBC

1
SCD1U50V3KX-GP

BQ24745_EAI
BQ24745_EAO
BQ24745_VREF
BQ24745_CHG_ON

1
2
C126
SC56P50V2JN-2GP

C122
2

2BQ24745_FBO

1 R111
2
200KR2F-L-GP
C127
R110
SC2200P50V2KX-2GP
7K5R2F-1-GP
2
1BQ24745_EAO_RC2
1

17

4K7R2J-2-GP
R112 1

CSON

C612
SCD1U25V2ZY-1GP

C614
SC220P50V2KX-3GP
2
1

C129
1

18

VICM

GND

R344
0R0402-PAD

SC150P50V2JN-3GP

19

CSOP

29

PGND

S
S
S
G

AD_IA

NC#14

U12
FDS8884-GP

D
D
D
D

CHG_AGND
BQ24745_IINP

connect to KBC
34

IND-5D6UH-32-GP

24745_LOW_G

connect to KBC
14

1
2
R333
D01R2512F-4-GP
C86
SC10U25V6KX-1GP
2
1

20

SDA

2BT+_R

LGATE

CHG_AGND

BT+

L45

1
2
C111
SCD1U50V3KX-GP

PHASE

24745_HIGH_G
BQ24745_LX1

G74
GAP-CLOSE-PWR
1
2

24
23

G73
GAP-CLOSE-PWR
1
2

UGATE
SCL

5
6
7
8

10

CHG_AGND

ACOK

connect to KBC
34,47 BAT_SDA

D9

C610
SC10U25V6KX-1GP

27
26

CSSN
ICOUT

C101
SC10U25V6KX-1GP

28

CSSP

U13
FDS8884-GP

VDDSMB

R343
0R2J-2-GP
2
1BQ24745_ACOK 13

34,47 BAT_SCL

5
6
7
8

ACIN

4
3
2
1

DCIN

DCBATOUT

C954
SCD1U50V3KX-GP
CHG_AGND

1
22

BQ24745_ACIN
3D3V_AUX_S5

G2

2
BQ24745_DCIN

11

C118
SCD01U50V2KX-1GP
1

S
S
S
G

C112
SCD1U50V3KX-GP

CHG_AGND

ICREF

C107

D
D
D
D

R106
49K9R2F-L-GP
1

A
K
R337
309KR3F-GP
1

SC
SCD1U50V3KX-GP
2
1 BQ24745_CSSP

AC_OK
C135
SC1U10V3KX-3GP

R332
470KR2J-2-GP

C109
SC1U25V5KX-1GP

AC_OK

8
7
6
5

AD+
Q18
2N7002DW-1-GP

G1
GAP-CLOSE-PWR

D8
1SS4000GPT-GP

DC_IN_D

D
D
D
D

P2003EVG-GP

AD+

R314
10KR2F-2-GP

AD+_G_2

AD+_G_1

S
S
S
G

1
2
3
4

AD+

D01R2512F-4-GP

10KR2F-2-GP

2
R324
1

R315
1

AD+_TO_SYS

BT+
U6

C108
SC10U25V6KX-1GP

DCBATOUT

C609
SC10U25V6KX-1GP
2
1

1
2
3
4

R304
100KR2J-1-GP

S
S
S
G

P2003EVG-GP
D

2
1
C608
SC10U25V6KX-1GP

U49
D
D
D
D

NEAR

AD+

8
7
6
5

<Variant Name>

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CHARGER_BQ24745
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

46

of

56

Adaptor in to generate DCBATOUT

AD+

AD_JK

DCIN1
1

C584
SCD1U50V3ZY-GP

1
R1

PDTA124EU-1-GP
Q19
Q20

8
7
6
5

C588

R322
100KR2J-1-GP

3D3V_AUX_S5

BATTERY CONNECTOR

3 OUT
2

D5
1

D7
BAV99PT-GP-U

DY

BAT1
R334
100KR2J-1-GP

BAV99PT-GP-U

RN40
1
2

BATA_SCL_1
BATA_SDA_1

4
3

8
1
2
3
4
5
6
7
9

DY

DY

34,46 BAT_SCL
34,46 BAT_SDA
34 BAT_IN#

3D3V_AUX_S5

D22
BAV99PT-GP-U

SB

1 GND
R2
DTC114EUA-1-GP

R1

2
IN

D
D
D
D

R2
B

200KR2J-L1-GP

AD_OFF#_JK

22.10037.F31

U48
S
S
S
G

1
2
3
4

P2003EVG-GP

R321

DC-JACK135-GP

AD_OFF

AD+_2

D20
P4SSMJ24PT-GP
A

C583
SCD1U50V3ZY-GP

SC1U50V5ZY-1-GP

2
4
5
6
NP1

34

SRN33J-5-GP-U

R109

VGA

DY

DY

54K9R2F-L-GP

2
R518
54K9R2F-L-GP

1
2

1D8V_S3

U42
1 S
2 S
C546
3 S
SCD1U25V3KX-GP
4 G

DY

VGA

DY

C824
SCD1U25V3ZY-1GP

AO4468-GP
C549
SCD1U25V3ZY-1GP

VGA

VGA
Q36
2N7002-F-GP

VGA
1

SB

8
7
6
5

3D3V_AUX_S5

VGA

D
D
D
D

VGA

R239
2

54K9R2F-L-GP

8
7
6
5

1.8V_DELAY

Q38
2N7002-F-GP

G
1

D
D
D
D

Q35
2N7002-F-GP

VGA

VGA
R556

AO4468-GP

C120
SCD1U25V3ZY-1GP

VGA

20.80907.007

1D1V_S0

U23
1 S
2 S
C125
3 S
SCD1U25V3KX-GP
4 G

0R2J-2-GP
R517
54K9R2F-L-GP

VGA

18,43 PE_GPIO1

1
2

1
2

1.1V_DELAY

VGA

3D3V_AUX_S5

ALP-CON7-GP

GAP-CLOSE

R506
200KR2F-L-GP

RUN_POWER_ON

EC58

DY

G14

46 BATT_SENSE

GPU Run Power

DY

SC10P50V2JN-4GP

DY

EC60
SC1000P50V3JN-GP

EC3
SC1000P50V3JN-GP

EC55
SCD1U50V3ZY-GP

SC10P50V2JN-4GP

EC57
EC56
SCD1U50V3ZY-GP

BT+

VGA

<Variant Name>

Q37
2N7002-F-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

37,41 1D8V_S3_PG

Title
Size
A3

AD_IN/ BTY SWITCH/GPURUN Rev

Document Number

Date: Monday, March 10, 2008

5

P1/P15

SA
Sheet
1

47

of

56

U62A
PART 1 OF 7

10 PCIE_NB_MXM_TX0P
10 PCIE_NB_MXM_TX0N

AK33
AJ33

PCIE_RX0P
PCIE_RX0N

10 PCIE_NB_MXM_TX1P
10 PCIE_NB_MXM_TX1N

AJ35
AJ34

PCIE_RX1P
PCIE_RX1N

10 PCIE_NB_MXM_TX2P
10 PCIE_NB_MXM_TX2N

AH35
AH34

PCIE_RX2P
PCIE_RX2N

10 PCIE_NB_MXM_TX3P
10 PCIE_NB_MXM_TX3N

AG35
AG34

PCIE_RX3P
PCIE_RX3N

10 PCIE_NB_MXM_TX4P
10 PCIE_NB_MXM_TX4N

AF33
AE33

PCIE_RX4P
PCIE_RX4N

10 PCIE_NB_MXM_TX5P
10 PCIE_NB_MXM_TX5N

AE35
AE34

PCIE_RX5P
PCIE_RX5N

P
C
I
E
X
P
R
E
S
S
I
N
T
E
R
F
A
C
E

AG31
AG30

GRXP0
GRXN0

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C677 2
C674 2

1
1

VGA
VGA

PCIE_MXM_NB_RX0P 10
PCIE_MXM_NB_RX0N 10

PCIE_TX1P
PCIE_TX1N

AF31
AF30

GRXP1
GRXN1

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C247 2
C237 2

1
1

VGA
VGA

PCIE_MXM_NB_RX1P 10
PCIE_MXM_NB_RX1N 10

PCIE_TX2P
PCIE_TX2N

AF28
AF27

GRXP2
GRXN2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C666 2
C671 2

1
1

VGA
VGA

PCIE_MXM_NB_RX2P 10
PCIE_MXM_NB_RX2N 10

PCIE_TX3P
PCIE_TX3N

AD31
AD30

GRXP3
GRXN3

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C680 2
C686 2

1
1

VGA
VGA

PCIE_MXM_NB_RX3P 10
PCIE_MXM_NB_RX3N 10

PCIE_TX4P
PCIE_TX4N

AD28
AD27

GRXP4
GRXN4

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C223 2
C219 2

1
1

VGA
VGA

PCIE_MXM_NB_RX4P 10
PCIE_MXM_NB_RX4N 10

PCIE_TX5P
PCIE_TX5N

AB31
AB30

GRXP5
GRXN5

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C263 2
C256 2

1
1

VGA
VGA

PCIE_MXM_NB_RX5P 10
PCIE_MXM_NB_RX5N 10

PCIE_TX6P
PCIE_TX6N

AB28
AB27

GRXP6
GRXN6

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C693 2
C689 2

1
1

VGA
VGA

PCIE_MXM_NB_RX6P 10
PCIE_MXM_NB_RX6N 10

PCIE_TX7P
PCIE_TX7N

AA31
AA30

GRXP7
GRXN7

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C309 2
C297 2

1
1

VGA
VGA

PCIE_MXM_NB_RX7P 10
PCIE_MXM_NB_RX7N 10

PCIE_TX8P
PCIE_TX8N

AA28
AA27

GRXP8
GRXN8

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C287 2
C281 2

1
1

VGA
VGA

PCIE_MXM_NB_RX8P 10
PCIE_MXM_NB_RX8N 10
PCIE_MXM_NB_RX9P 10
PCIE_MXM_NB_RX9N 10

10 PCIE_NB_MXM_TX6P
10 PCIE_NB_MXM_TX6N

AD35
AD34

PCIE_RX6P
PCIE_RX6N

10 PCIE_NB_MXM_TX7P
10 PCIE_NB_MXM_TX7N

AC35
AC34

PCIE_RX7P
PCIE_RX7N

10 PCIE_NB_MXM_TX8P
10 PCIE_NB_MXM_TX8N

AB33
AA33

PCIE_RX8P
PCIE_RX8N

10 PCIE_NB_MXM_TX9P
10 PCIE_NB_MXM_TX9N

AA35
AA34

PCIE_RX9P
PCIE_RX9N

PCIE_TX9P
PCIE_TX9N

W31
W30

GRXP9
GRXN9

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C703 2
C698 2

1
1

VGA
VGA

10 PCIE_NB_MXM_TX10P
10 PCIE_NB_MXM_TX10N

Y35
Y34

PCIE_RX10P
PCIE_RX10N

PCIE_TX10P
PCIE_TX10N

W28
W27

GRXP10
GRXN10

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C709 2
C707 2

1
1

VGA
VGA

PCIE_MXM_NB_RX10P 10
PCIE_MXM_NB_RX10N 10

10 PCIE_NB_MXM_TX11P
10 PCIE_NB_MXM_TX11N

W35
W34

PCIE_RX11P
PCIE_RX11N

PCIE_TX11P
PCIE_TX11N

V31
V30

GRXP11
GRXN11

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C330 2
C319 2

1
1

VGA
VGA

PCIE_MXM_NB_RX11P 10
PCIE_MXM_NB_RX11N 10

10 PCIE_NB_MXM_TX12P
10 PCIE_NB_MXM_TX12N

V33
U33

PCIE_RX12P
PCIE_RX12N

PCIE_TX12P
PCIE_TX12N

V28
V27

GRXP12
GRXN12

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C716 2
C713 2

1
1

VGA
VGA

PCIE_MXM_NB_RX12P 10
PCIE_MXM_NB_RX12N 10

10 PCIE_NB_MXM_TX13P
10 PCIE_NB_MXM_TX13N

U35
U34

PCIE_RX13P
PCIE_RX13N

PCIE_TX13P
PCIE_TX13N

U31
U30

GRXP13
GRXN13

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C341 2
C354 2

1
1

VGA
VGA

PCIE_MXM_NB_RX13P 10
PCIE_MXM_NB_RX13N 10

10 PCIE_NB_MXM_TX14P
10 PCIE_NB_MXM_TX14N

T35
T34

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

U28
U27

GRXP14
GRXN14

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C389 2
C395 2

1
1

VGA
VGA

PCIE_MXM_NB_RX14P 10
PCIE_MXM_NB_RX14N 10

10 PCIE_NB_MXM_TX15P
10 PCIE_NB_MXM_TX15N

R35
R34

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

R31
R30

GRXP15
GRXN15

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

C379 2
C368 2

1
1

VGA
VGA

PCIE_MXM_NB_RX15P 10
PCIE_MXM_NB_RX15N 10

PCIE_CALRN

AG26

VGA_AG26

PCIE_CALRP

AJ27

NC_DRAM_0
NC_DRAM_1
NC_AC_BATT
NC_FAN_TACH

AF3
AG9
AK29
AK14

Clock
3 CLK_PCIE_VGA
3 CLK_PCIE_VGA#

18

PCIE_TX0P
PCIE_TX0N

R136
1

MXM_RST#

VGA

VGA_RST#

AJ31
AJ30

PCIE_REFCLKP
PCIE_REFCLKN
SM Bus

AK35
AK34

NC_SMB_DATA
NC_SMBCLK

AM32

PERSTB

VGA

1
R147
VGA_AJ27 1
R135

2KR2F-3-GP
2
1K27R2F-L-GP

VGA

216-0707005-00-GP

2
1

1.1V_DELAY

Calibration

100R2F-L1-GP-U

C210
SC100P50V2JN-3GP

71.0M82M.00U
VGA

VGA

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

M8XM_PCIE
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

48

of

56

1
R159
499R2F-2-GP
PLACE VREF DIVIDER
AND CAP CLOSE TO ASIC

1.8V_DELAY

VGA

L51 2

1 BLM15BB121SN-GP

L52 2

1 BLM15BB121SN-GP

L58 2

1 BLM15BB121SN-GP

VGA_XOUT1
2
1MR2J-1-GP

1.1V_DELAY

X6

L9 2

1 BLM15BB121SN-GP

VGA

C226
SC2200P50V2KX-2GP

DPLL_VDDC

AG21

TS_FDO

TPAD30

AK4
AM4

C185

C155

VGA

VGA

1
2

1
2

1
2

2
R129
10KR2J-3-GP

17

2 0R0402-PAD

GPU_CRT_RED

VGA_BB R358 1

VGA

VGA

2 150R2F-1-GP

R3631

2 150R2F-1-GP

R3571

2 150R2F-1-GP

GPU_CRT_BLUE

14
14
OPTIONAL STRAP TO GROUND
FOR RB,GB,BB
SEE DAC1_RGB SHEET

VGA

16
16

2
499R2F-2-GP
L49 2

1 BLM15BB121SN-GP

VGA

AVSSQ

AP32

VDD1DI
VSS1DI

AR28
AP28

R2
R2B

AM19
AL19

G2
G2B

AM18
AL18

B2
B2B

AM17
AL17

C
Y
COMP

AK19
AK18
AK17

V2SYNC
H2SYNC

AL15
AM15

L50 2

VGA

AM21
AL21

A2VSSQ

AK21

VDD2DI
VSS2DI

AH22
AG22

R2SET

AJ21

C620

2
SCD1U10V2KX-4GP

VGA
2

VGA

C624

VGA

R123 1
R141 1

2
0R0402-PAD

1.8V_DELAY

VGA

C224

VGA
AM29
AL29

VGA

A2VDDQ

C627

VGA

C650

1.8V_DELAY

1 BLM15BB121SN-GP

C623

A2VDD

VGA

GPU_CRT_HSYNC
GPU_CRT_GREEN

VGA

2 0R0402-PAD
GPU_CRT_HSYNC
GPU_CRT_VSYNC

AN31 VGA_RSET1
R134
AR32

R3611

VGA

Close to VGA

14

VGA

1
R144

2
715R2F-GP
GPU_EDID_DATA
GPU_EDID_CLK

15
15

AJ15
AH15

DDC3DATA_DP3_AUXN
DDC3CLK_DP3_AUXP

AJ5
AJ4

GPU_CRT_DDCDATA
GPU_CRT_DDCCLK

DDC4DATA_DP4_AUXN
DDC4CLK_DP4_AUXP

AH14
AG14

HDMI_DDCDATA
HDMI_DDCCLK

2
0R0402-PAD

3.3V_DELAY

VGA

C245

VGA

16
16

VGA

17
17

LPVDD
C184

C172

VGA

C161

VGA

VGA

C209
A

VGA

SC1U10V2KX-1GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC10U10V5KX-2GP

SCD1U10V2KX-4GP

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

M8XM_IO
Size
Custom
Date:
5

VGA

C215

3.3V TO 5V LEVEL SHIFT LOGIC REQUIRED

IF DDC1,DDC2 USED ON M8x OR DDC1,DDC2,DDC3
USED ON M7x
DDC3,DDC4 ARE 5V TOLERANT ON M8x

VGA

VGA

VGA_GB R356 1

71.0M82M.00U

VGA

VGA

VGA

C743

AR30
AP30
AR29
AP29

DDC2CLK

THERMAL

2 0R0402-PAD

AN29
AN30

DDC
DP AUX DDC2DATA

DPLL_VDDC

C741

VGA

VGA

C745

DMINUS
DPLUS

VGA

B
BB

DDC1DATA
DDC1CLK

PLL
CLOCKS

HDMI_HDP

VGA_RB R362 1

216-0707005-00-GP

MPVDD
C664

C657

C659

VGA

VGA

1
2

VGA

PCIE_PVDD
C652

DPLL_PVDD
C632

AG19

DY

23 VGA_G792_P

C651

XTALIN
XTALOUT

DPLL_VDDC
TP9

23 VGA_G792_N

OPTIONAL XTAL

AR33
AP33

VGA
C646
SC5D6P50V2CN-1GP

MPVDD
MPVSS

3.3V_DELAY

2
150R2F-1-GP

AR31
AP31

HSYNC
VSYNC
RSET

PCIE_PVDD

A14
B15

VGA

XTAL-27MHZ-37-GP
2

VGA

C618
SC5D6P50V2CN-1GP

MPVDD

AM35

VGA_XIN1
VGA_XOUT1

VGA

SB

DPLL_PVDD
DPLL_PVSS

VGA

VGA_XIN1

PCIE_PVDD

AR20
AP20

VGA
GPU_CORE_S0

R364

DPLL_PVDD

VGA

VREFG

249R2F-GP

AD12

C271

VGA

VGA_VREFG

R155

SCD1U16V2ZY-2GP

VGA

0R3-0-U-GP

VGA

PLACE OR RESISTORS CLOSE TO ASIC

AVDD

DAC2

VGA

1.8V_DELAY

DY

VGA

3.3V_DELAY

R354
147R3F-GP

VGA

SCD1U10V2KX-4GP

VGA_XIN1

90D9R3F-GP

1
R152

17
17
17
17
17
17
17
17

1.1V_DELAY

SC10U10V5KX-2GP

27M_NS

DY

R355
1

VGA_DP

HDMI_CLK
HDMI_CLK#
HDMI_TXD0
HDMI_TXD0#
HDMI_TXD1
HDMI_TXD1#
HDMI_TXD2
HDMI_TXD2#

1.8v?
2

SCD1U10V2KX-4GP

DY

C643

SCD1U10V2KX-4GP

VGA

AG15
AH18
AG18
AG6

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

1.8V_DELAY

R359
1
C653

R154
10KR2J-3-GP

R409
147R3F-GP

AN18
AP18
AR18
AN16
AN17
AN15
AN11
AN12
AN13
AN14

1 BLM15BB121SN-GP

VGA

27M_SS_IN

VGA

AN19
AN20
AP19
AR19

G
GB

DAC1

C261

VGA

SC10U10V5KX-2GP

DY

90D9R3F-GP

GPIO_0
GPIO_1
GENERAL
GPIO_2
PURPOSE
GPIO_3
I/O
GPIO_4
GPIO_5
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BBEN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
GPIO_24_JMODE
GPIO_25_TDI
GPIO_26_TCK
GPIO_27_TMS
GPIO_28_TDO
GEN_A
GEN_B
GEN_C
GEN_D_HPD4
GEN_E
GEN_F
GEN_G

C248

VGA

34 GPU_BL_ON
27M_SS

AG2
AF2
AF1
AE3
AE2
AE1
AD3
AD2
AD1
54
GPIO8
AD5
54
GPIO9
SPICLK_V
AD4
AC3
54
GPIO11
AC2
54
GPIO12
AC1
54
GPIO13
AB3
AB2
43
PWRCNTL_0
27M_SS_IN
AB1
GPIO17
AF5
1
2
3.3V_DELAY
R148
AF4
VGA 10KR2J-3-GP
VGA
1 R157
2 AG4
AG3
43
PWRCNTL_1
10KR2J-3-GP
AD9
AD8
54
GPIO22
AD7
1 R151
2
GPIO24
10KR2J-3-GP
AB4
VGA
AB6
AB7
R158
AB9
AA9
1KR2J-1-GP
AF8
VGA
AF7
AG5
AP9
AR9
AP13
AR13
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

L16 2
C231

AH17
AG17

VGA

1VGA2
1VGA2
1VGA2
1VGA2
1VGA2
1VGA2
1VGA2
1
2

71.0M82M.00U
VGA

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

54
54
54
54
54
54
54

216-0707005-00-GP

R415
1

15

54
54
54
54

AM14
AL14

GPU_TXACLK+ 14
GPU_TXACLK- 14
GPU_TXAOUT0+ 14
GPU_TXAOUT0- 14
GPU_TXAOUT1+ 14
GPU_TXAOUT1- 14
GPU_TXAOUT2+ 14
GPU_TXAOUT2- 14

DVPCNTL__MVP_0
DPA_PVDD
DVPCNTL__MVP_1
DPA_PVSS
DVPCNTL_0
INTEGRATED
DVPCNTL_1
DPB_PVDD
TMDS/DP
DVPCNTL_2
DPB_PVSS
DVPCLK
DVPDATA_0
DPB_VDDR_1
DVPDATA_1 MULTI_GFX
DPB_VDDR_2
DVPDATA_2 EXTERNAL
DPA_VDDR_3
DVPDATA_3 TMDS
DPA_VDDR_4
DVPDATA_4
DVPDATA_5
DPB_VSSR_1
DVPDATA_6
DPB_VSSR_2
DVPDATA_7
DPB_VSSR_3
DVPDATA_8
DPB_VSSR_4
DVPDATA_9
DPB_VSSR_6
DVPDATA_10
DPA_VSSR_5
DVPDATA_11
DPA_VSSR_7
DVPDATA_12
DPA_VSSR_8
DVPDATA_13
DPA_VSSR_9
DVPDATA_14
DPA_VSSR_10
DVPDATA_15
DVPDATA_16
DP_CALR
DVPDATA_17
NC_TPVDDC
DVPDATA_18
NC_TPVSSC
DVPDATA_19
HPD1
DVPDATA_20
DVPDATA_21
DVPDATA_22
R
DVPDATA_23
RB

SCD1U10V2KX-4GP

LPVDD
LPVSS

AR22
AP22
AN23
AN22
AP23
AR23
AP24
AR24
AP25
AR25

AR17
AP17

AN8
AP8
AG1
AH3
AH2
AH1
AJ3
AJ2
AJ1
AK2
AK1
AL3
AL2
AL1
AM3
AM2
AN2
AP3
AR3
AN4
AR4
AP4
AN5
AR5
AP5
AP6
AR6
AN7
AP7
AR7

AL22
AK22

VGA

TXCLK_LP
TXCLK_LN
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

TX5M_DPB3P
TX5P_DPB3N

LPVDD

BLM15BB121SN-GP

GPU_TXBCLK+ 14
GPU_TXBCLK- 14
GPU_TXBOUT0+ 14
GPU_TXBOUT0- 14
GPU_TXBOUT1+ 14
GPU_TXBOUT1- 14
GPU_TXBOUT2+ 14
GPU_TXBOUT2- 14

SDA
SCL

SCD1U10V2KX-4GP

L10 2

AK24
AL24
AN27
AN26
AP27
AR27
AG24
AH24
AK26
AL26

AK6
AM6

1.8V_DELAY

TXCLK_UP
TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

AR16
AP16

DVALID

TX4M_DPB2P
TX4P_DPB2N

LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVSSR_8
LVSSR_9
LVSSR_10
LVSSR_11
LVSSR_12
LVSSR_13
LVSSR_14

GPU_LCDVDD_ON

PSYNC

VGA

LVDDC_1
LVDDC_2

AM24
AN28
AN21
AN24
AN25
AM22
AP21
AP26
AM27
AR21
AR26
AM26
AJ22
AJ24

AJ6

TX3M_DPB1P
TX3P_DPB1N

AR15
AP15

AM7

SC1U10V2KX-1GP

C166
SC1U10V2KX-1GP

AG7

DIGON

VPCLK0
VIPCLK

SCD1U10V2KX-4GP

L14 2
1
BLM15BB121SN-GP

1.8V_DELAY

AK27
AL27

ControlVARY_BL

LVDS channel

VGA

LVDDR_1
LVDDR_2

AR14
AP14

AL7
AK7

TXCBM_DPB0P
TXCBP_DPB0N

C640
C639
C638
C637
C636
C635
C634
C633

1
2

AJ26
AH26

TX2M_DPA3P
TX2P_DPA3N

VPHCTL

SC1U10V2KX-1GP

PART 7 OF 7

VGA

VHAD_0
VHAD_1

AJ9

SC10U10V5KX-2GP

U62F

AR12 HDMI_TXD2#_R
AP12 HDMI_TXD2_R

AM9
AL9

AJ7

DVALID

AR11 HDMI_TXD1#_R
AP11 HDMI_TXD1_R

54

TX1M_DPA2P
TX1P_DPA2N

Placement: close GPU

HDMI_CLK_R
HDMI_CLK#_R
HDMI_TXD0_R
HDMI_TXD0#_R
HDMI_TXD1_R
HDMI_TXD1#_R
HDMI_TXD2_R
HDMI_TXD2#_R

PSYNC

AR10 HDMI_TXD0#_R
AP10 HDMI_TXD0_R

SCD1U10V2KX-4GP

C165
SC1U10V2KX-1GP

54

TX0M_DPA1P
TX0P_DPA1N

1 BLM15BB121SN-GP

DY
DY
DY

AN9 HDMI_CLK#_R
AN10 HDMI_CLK_R

TXCAM_DPA0P
TXCAP_DPA0N
VIP / I2C

VGA

L13 2

ER6

SPICLK_V
GPIO9

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

3.3v?
1.8V_DELAY

VHAD0

DY
DY

150R2F-1-GP
2
2
150R2F-1-GP

1
1

EC95EC96
2

M25P10-AVMN6TP-GP

DY
ER5

SC47P50V2JN-3GP

DY DY

SPI_VCCV
SPI_HOLD#V
SPICLK_RV
SPIDI_RV

8
7
6
5

VCC
HOLD#
C
D

150R2F-1-GP

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

54

S#
Q
W#
VSS

SC4D7P50V2CN-1GP

EC53
SC47P50V2JN-3GP

1
2
3
4

SPIDO_RV
SPI_WP#V

SB

ER7
0R3-0-U-GP
U50

GPIO8

54
54
54
54
54
54
54
54

3D3V_S0

AM12
AL12
AJ12
AH12
AM10
AL10
AJ10
AH10

5
6
7
8

SC
SRN10KJ-6-GP
RN45

GPIO22
ER8 1

PART 2 OF 7

SPI_HOLD#V

U62B

DY

SPI FLASH ROM

DY

4
3
2
1

EC94

SCD1U16V2ZY-2GP

3D3V_S0

Document Number

Monday, March 10, 2008

Rev

P1/P15

SA
Sheet
1

49

of

56

U62E

Part 6 of 7

MECH_1
MECH_2
MECH_3

A35 MECH_1
1
AR1 MECH_2
1
AR35 MECH_3
1

1
2
1

VGA
2

1
2

1
2

C356

VGA

C370

VGA
2

C334

VGA
2

1
2

1
2

1
2

1
2

1
2

C322

VGA

C314

VGA
2

C335

L22

VGA

C357

C383

BLM15BB121SN-GP

VGA

VGA

VGA

C372

VGA

VGA_CORE_VDDCI
C391

3D3V_S0
1

PCI-Express

1
2

2
1

VGA

Q23
FDN304P-1-GP

3.3V_DELAY

VGA

SC1U10V2KX-1GP

71.0M82M.00U

M12
M24
P11
P25

SC10U6D3V5MX-3GP

216-0707005-00-GP

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4

VGA

SC1U10V2KX-1GP

BBP_1
BBP_2

C286

GPU_CORE_S0

C744

SC1U10V2KX-1GP

VGA

Back
Bias

BBN_1
BBN_2

U13
V13

VGA

VSSRHB_1
VSSRHB_2

W13
AA13

Memory I/O
Clock

VGA R156
1
2
0R3-0-U-GP
VGA R164
1
2
GPU_CORE_S0
C329 C342
0R3-0-U-GP VGA

VDDRHB_1
VDDRHB_2

C2
L2

VGA

VGA

VSSRHA_1
VSSRHA_2

B2
L1

1
2

B25
B32

C360

R396
100KR2J-1-GP

VGA

3D3V_S5
2

R679
100KR2J-1-GP
2

2
OPTIONAL RC NETWORK
TO FINE TUNE
POWER SEQUENCING

VGA

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2N7002-11-GP

VGA

C699

VGA

DY
Q25
G

C 2

VGA_PWRGD_2 G

VGA

0R3-0-U-GP

Q26
CH3904PT-GP

75KR2F-GP

R416
1

Q24
2N7002-11-GP

R410
2VGA_PWRGD_1 1

VGA_PWRGD_3
D

DY
VGA

TP72 TPAD30
TP63 TPAD30
TP62 TPAD30

VGA

SC

SCD1U16V2ZY-2GP

VDDRHA_1
VDDRHA_2

SCD1U16V2ZY-2GP

VDDR5_1
VDDR5_2

A25
A32

VGA

VGA

1.1V_DELAY

C321

VGA

SC1U10V2KX-1GP

AN1
AP1

C333

C347

C284

SC1U10V2KX-1GP

1.8V_DELAY

VGA

VGA
R153
1
2
0R3-0-U-GP

PCIE_VDDC

SC1U10V2KX-1GP

VDDR4_1
VDDR4_2

C293

C339

SC1U10V2KX-1GP

AP2
AR2

VGA

VGA

SC1U10V2KX-1GP

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4

C313

C332

SC1U10V2KX-1GP

AE14
AE15
AF12
AE17

VGA

SC1U10V2KX-1GP

VGA

VDD_CT_5
VDD_CT_6
VDD_CT_7
VDD_CT_8

P
O
W
E
R

C355

SC1U10V2KX-1GP

C260

1.8V_DELAY

R418
20KR2F-L-GP

Title

VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4

N13
N15
N18
N21
N23
P14
P17
P19
P22
V18
V21
V23
W14
W17
W19
W22
AA15
AA18
AA21
AA23
AB14
AB17
AB19
AB22
AC13
AC15
AC18
AC21
AC23
AE18
AE22
AE19
AE21
R13
R15
R18
R21
R23
U14
U17
U19
U22
V15
W11

SC1U10V2KX-1GP
SC1U10V2KX-1GP

VGA

SC10U6D3V5MX-3GP

VGA

AA11
AB11
AD10
AF10

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
VDDC_41
VDDC_42
VDDC_43
VDDC_44

VGA

C302

SC1U10V2KX-1GP

C289

SC1U10V2KX-1GP

VGA

VGA

( 3.3V @ 50MA VDDR3)

37,38,41 VCORE_EN

R422
4K7R2F-GP

C371

VGA

R11
R25
U11
U25

3D3V_S5

VGA

C387

VGA

0R3-0-U-GP
1.8V_DELAY

1
2

2
1

C344

VGA

1.8V_DELAY

C191

VGA

VGA

SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP

1
2

1
2

1
2

1
2

VGA

C388

C192

SCD1U16V2ZY-2GP

VGA

VGA

SCD1U16V2ZY-2GP
SC1U10V2KX-1GP

C380

PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11
PCIE_VDDC_12

R26
U26
V25
V26
W25
W26
AA25
AD26
AF26
AA26
AB25
AB26

C199

SC1U10V2KX-1GP

C740

VGA

SC10U6D3V5MX-3GP

VGA

C770

SC1U10V2KX-1GP
SC1U10V2KX-1GP

C378

VGA

SC1U10V2KX-1GP
SC1U10V2KX-1GP

VGA

SC1U10V2KX-1GP
SC1U10V2KX-1GP

C390

C407

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8

R125
1
2
0R3-0-U-GP

PCIE_VDDR
SC1U10V2KX-1GP

VGA

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29

Memory I/O

C759

1.8V_DELAY

43 VGACORE_PWRGD

VGA

SC1U10V2KX-1GP

VGA

SC1U10V2KX-1GP

SC1U10V2KX-1GP

C366

216-0707005-00-GP

71.0M82M.00U
VGA

C358

VGA

AR34
AL33
AM33
AN33
AN34
AN35
AP34
AP35

Core

C737

VGA

SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP

D1
A8
A12
A16
A20
A24
A28
B1
H1
H35
L18
L19
L21
L22
M10
M35
P10
T1
Y1
B35
M1
D35
K10
K12
K24
K26
L14
L15
L17

I/O Internal

C415

VGA

C736

R408

CORE GND

VGA

PART 5 OF 7

SC10U6D3V5MX-3GP

U62D
1.8V_DELAY

SC1U10V2KX-1GP
SC1U10V2KX-1GP

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65

P6
M9
M26
K28
M32
N14
N17
N19
N22
N33
N3
R5
U8
P13
P15
P18
P21
P23
P26
P29
P30
R1
U5
P9
R10
R14
R17
R19
R22
V3
AK9
U10
U15
U18
U21
U23
V7
W8
V10
V14
V17
V19
V22
V1
AK12
V9
W10
W15
W18
W21
W23
AA6
AA10
AA14
AA17
AA19
AA22
AB8
AB10
AB13
AB15
AB18
AB21
AB23
AC14
AC17
AC19
AC22
AF9
AD6
AB5
AD24
W5
AF6
AF14
AF21
AF22
AK10
AF17
AF18
AF19
AA3
AG12
AJ14
AH21
D4
AF15
AG10
AN6
AK15
AJ17
AJ18
AJ19
AF24
AN32
AK3
AN3
AR8
AM1
AK30
V11

SC1U10V2KX-1GP

A2
A34
C3
C5
A4
C18
A21
C23
C11
C13
C14
A18
A11
C26
C33
F35
R7
G10
F15
H17
G21
D29
A29
G1
F14
J15
E19
E22
E24
D7
G9
F26
G29
D33
M5
G4
E10
E12
F17
G18
G22
F30
J35
J18
H19
J21
F7
J12
J24
J26
K30
J32
F33
K6
K9
K14
K15
K17
K18
K19
K21
K22
M28
K3
L33

VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166

SC10U6D3V5MX-3GP

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43

PCI-Express GND

P33
P34
P35
R27
R28
R29
R32
R33
U29
U32
V29
V32
T33
V34
V35
W29
W32
W33
AA29
AA32
AB29
AB32
Y33
AB34
AB35
AC33
AD29
AD32
AF29
AF32
AD33
AF34
AF35
AG27
AG29
AG32
AG33
AJ29
AJ32
AH33
AL34
AL35
AK32

Size
Custom

M8XM_POWER
Document Number

Rev

P1/P15

Date: Monday, March 10, 2008

5

SA
Sheet

50

of

56

U62C
U62G

53
53

CLKA1
CLKA1#

CLKA1
CLKA1#
WDQSA[7..0]

52,53 WDQSA[7..0]

RDQSA[7..0]

52,53 RDQSA[7..0]

DQMA#[7..0]

52,53 DQMA#[7..0]
C

MDA[63..0]

52,53 MDA[63..0]
52,53

MAA[11..0]

MAA[11..0]

52,53
52,53

A_BA0
A_BA1

52,53

A_A12

A_BA0
A_BA1
A_A12

PLACE MVREF DIVIDERS

AND CAPS CLOSE TO ASIC
1.8V_DELAY
1

VGA

R423
**100R2J-2-GP

VGA

1.8V_DELAY
R420
100R2J-2-GP

VGA

**

R183
100R2J-2-GP

VGA
B

VGA
C409

N35
N34

MVREFDA
MVREFSA

AM34

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

M30
K34
G31
E34
B22
F21
B17
D17

RDQSA0
RDQSA1
RDQSA2
RDQSA3
RDQSA4
RDQSA5
RDQSA6
RDQSA7

QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

M31
K35
G32
E35
A22
E21
A17
E17

WDQSA0
WDQSA1
WDQSA2
WDQSA3
WDQSA4
WDQSA5
WDQSA6
WDQSA7

ODTA0
ODTA1

C31
C25

ODTA0
ODTA1

CLKA0
CLKA1

A33
A26

CLKA0
CLKA1

CLKA0#
CLKA1#

B33
B26

CLKA0#
CLKA1#

RASA0#
RASA1#

A31
D24

RASA0#
RASA1#

CASA0#
CASA1#

C32
H26

CASA0#
CASA1#

CSA0_0#
CSA0_1#

A30
B30

CSA0_0#

VGA

CSA1_0#
CSA1_1#

G24
H24

CSA1_0#

R188
100R2J-2-GP

CKEA0
CKEA1

B31
F24

CKEA0
CKEA1

VGA

C29
D22

WEA0#
WEA1#

R187
100R2J-2-GP

WEA0#
WEA1#

NC#AM34

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

NOTE: FOR DUAL RANK CONNECTIONS

USE THE CSxxB_1 CHIP SELECT PINS

1.8V_DELAY

PLACE MVREF DIVIDERS

AND CAPS CLOSE TO ASIC
**
VGA
**

1
R128

VGA

VGA

VGA

2
1KR2J-1-GP

DDR2

MVREF TO 1.8V

100R

40.2R

MVREF TO GND

100R

100R

DDR3

VGA
R161
4K7R2J-2-GP

**

VGA
1

VGA

2
A

C742

VGA

H2
H3
J3
J5
J4
J6
G5
J9
F3
F4
J1
J2
J7
F1
G2
G3

DQMB_0#
DQMB_1#
DQMB_2#
DQMB_3#
DQMB_4#
DQMB_5#
DQMB_6#
DQMB_7#

D12
C10
E7
C6
P3
R4
W3
V8

QSB_0
QSB_1
QSB_2
QSB_3
QSB_4
QSB_5
QSB_6
QSB_7

J14
B10
F9
B6
P2
P8
W2
V6

QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

H14
A10
E9
A6
P1
P7
W1
V5

ODTB0
ODTB1

D2
K5

CLKB0
CLKB1

A3
K1

CLKB0#
CLKB1#

B3
K2

RASB0#
RASB1#

D3
K7

CASB0#
CASB1#

C1
K4

CSB0_0#
CSB0_1#

E1
E2

CSB1_0#
CSB1_1#

L3
M4

MVREFDB
MVREFSB

CKEB0
CKEB1

E3
K8

TESTEN
TEST_MCLK
TEST_YCLK
MEMTEST
PLLTEST

WEB0#
WEB1#
DRAM_RST

71.0M82M.00U
VGA

VGA

R160

F2
M6
AA4 VGA_DRAM_RST

R166
1

1.8V_DELAY

4K7R2J-2-GP

R162
240R2F-1-GP

SCD01U50V2ZY-1GP

**
2

R445
100R2J-2-GP

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8
MAB_9
MAB_10
MAB_11
MAB_A12
MAB_BA2
MAB_BA0
MAB_BA1

216-0707005-00-GP

4K7R2J-2-GP

**
DIVIDER RESISTORS

R443
100R2J-2-GP

B14
A13

VGA_TESTEN
AM30
VGA_TEST_MCLK AA8
VGA_TEST_YCLK AA7
VGA_MEMTEST
AA5
AH19

1.8V_DELAY

216-0707005-00-GP

71.0M82M.00U

MVREFDB
MVREFSB

C419

SCD01U50V2ZY-1GP

**

MVREFDA
MVREFSA

M29
K33
G30
E33
C22
H21
C17
G17

SCD01U50V2ZY-1GP

R184
100R2J-2-GP

VGA

C719
SCD01U50V2ZY-1GP

**

DQMA_0#
DQMA_1#
DQMA_2#
DQMA_3#
DQMA_4#
DQMA_5#
DQMA_6#
DQMA_7#

MEMORY INTERFACE B

CLKA0
CLKA0#

CLKA0
CLKA0#

A_BA0
A_BA1

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

write strobe read strobe

52
52

CSA1_0#

CSA1_0#

H15
G14
E14
D14
H12
G12
F12
D10
B13
C12
B12
B11
C9
B9
A9
B8
J10
H10
F10
D9
G7
G6
F6
D6
C8
C7
B7
A7
B5
A5
C4
B4
M3
M2
N2
N1
R3
R2
T3
T2
M8
M7
P5
P4
R9
R8
R6
U4
U3
U2
U1
V2
Y3
Y2
AA2
AA1
U9
U7
U6
V4
W9
W7
W6
W4

VGA

53

CSA0_0#

CSA0_0#

52

CKEA0
CKEA1

CKEA0
CKEA1

C27
B28
B27
G26
F27
E27
D27
J27
E29
C30
E26
A27
G27
D26
C28
B29

WEA0#
WEA1#

52
53

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
A_A12

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_A12
MAA_BA2
MAA_BA0
MAA_BA1

52
53

WEA0#
WEA1#

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

CASA0#
CASA1#

P27
P28
P31
P32
M27
K29
K31
K32
M33
M34
L34
L35
J33
J34
H33
H34
K27
J29
J30
J31
F29
F32
D30
D32
G33
G34
G35
F34
D34
C34
C35
B34
C24
B24
B23
A23
C21
B21
C20
B20
J22
H22
F22
D21
J19
G19
F19
D19
C19
B19
A19
B18
C16
B16
C15
A15
H18
F18
E18
D18
J17
G15
E15
D15

CASA0#
CASA1#

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

52
53

Part 4 of 7

RASA0#
RASA1#

RASA0#
RASA1#

Part 3 of 7

52
53

ODTA0
ODTA1

MEMORY INTERFACE A

ODTA0
ODTA1

write strobe
read strobe

52
53

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

M8XM_MEMORY
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

51

of

56

CLKA0
CLKA0#

CLKA0
CLKA0#
1

51
51

R192
56R2J-4-GP

R191
56R2J-4-GP

L2
L3

BA0
BA1

A_A12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MDA4
MDA0
MDA5
MDA2
MDA3
MDA6
MDA1
MDA7
MDA23
MDA16
MDA20
MDA18
MDA19
MDA21
MDA17
MDA22

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

U63
A_BA0
A_BA1

51

RASA0#

51

CASA0#

51

WEA0#

51

CKEA0

51

CSA0_0#

51

ODTA0

RASA0#

VGA

VGA

CASA0#

SC470P50V2KX-3GP

U31

VGA

A_BA0
A_BA1

L2
L3

BA0
BA1

A_A12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

MDA26
MDA28
MDA27
MDA31
MDA30
MDA25
MDA29
MDA24
MDA11
MDA14
MDA8
MDA12
MDA15
MDA9
MDA13
MDA10

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

WEA0#
CKEA0
CSA0_0#
ODTA0
WDQSA#[7..0]

51,53 WDQSA[7..0]

RDQSA[7..0]

51,53 RDQSA[7..0]

DQMA#[7..0]

51,53 DQMA#[7..0]

MDA[63..0]

51,53 MDA[63..0]

CASA0#

L7

CAS

DQMA#2
DQMA#0

F3
B3

LDM
UDM

ODTA0

K9

ODT

UDQS
UDQS

(SSTL-1.8) VREF = .5*VDDQ

VRAM_VREF1

VREF

1
2

C757

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

VGA

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

WE

K7

RAS

CASA0#

L7

CAS

DQMA#1
DQMA#3

F3
B3

LDM
UDM

ODTA0

K9

ODT

1.8V_DELAY

RDQSA1
WDQSA#1

F7
E8

LDQS
LDQS

R453
4K99R2F-L-GP

RDQSA3
WDQSA#3

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

VGA
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF2

R452
4K99R2F-L-GP

VGA

HYB18T512161B2F-25-GP
72.18512.M0U

C762
SCD1U16V2ZY-2GP

J2
A2
E2
L1
R3
R7
R8

K3

RASA0#

VGA

B7
A8

VGA

CS

RDQSA0
WDQSA#0

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

C751

LDQS
LDQS

SCD1U16V2ZY-2GP

VGA

C750

2
F7
E8

RDQSA2
WDQSA#2

1
B

L60
VGA
1
2
BLM15BB121SN-GP
VRAM_VDDL1

J1
J7

VDDL
VSSDL

VGA

R451
4K99R2F-L-GP

A1
E1
J9
M9
R1

L8

WEA0#

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDL
VSSDL

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

1.8V_DELAY

VGA

51,53
51,53

A_BA1
A_BA0

51,53

A_A12

A_BA1
A_BA0
A_A12

L26
VGA
1
2
BLM15BB121SN-GP
VRAM_VDDL2
C469
SCD1U16V2ZY-2GP

R450
4K99R2F-L-GP

VDD1
VDD2
VDD3
VDD4
VDD5

CSA0_0#

MAA[11..0]

51,53 MAA[11..0]

RAS

CKE

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

SC1U10V2KX-1GP

WE

K7

SC1U10V2KX-1GP

K3

RASA0#

K2

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

VGA

C470

VGA
2

CS

CKEA0
1.8V_DELAY

SCD1U16V2ZY-2GP

1.8V_DELAY

L8

WEA0#

CK
CK

CSA0_0#

K8
J8

CLKA0#
CLKA0

CKE

K2

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

CKEA0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

CK
CK

K8
J8

CLKA0#
CLKA0

C453

HYB18T512161B2F-25-GP
72.18512.M0U

VGA

VGA
1.8V_DELAY

VGA

VGA

C439

C432

VGA

C756

VGA

C764

C747

VGA
2

1
2

1
2

1
2

1
2

1
2

C448

VGA

<Variant Name>

SCD1U16V2ZY-2GP

VGA

SCD1U16V2ZY-2GP

C426

SCD1U16V2ZY-2GP

VGA

SCD1U16V2ZY-2GP

VGA

C425

SCD01U50V2ZY-1GP

VGA

C440
SCD1U16V2ZY-2GP

VGA

C428
SCD1U16V2ZY-2GP

VGA

C437
SCD1U16V2ZY-2GP

VGA

C430
SCD1U16V2ZY-2GP

C433

VGA

SC10U6D3V5MX-3GP

C423

SCD01U50V2ZY-1GP

VGA

SC10U6D3V5MX-3GP

C434

SC1U10V2KX-1GP

VGA

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C424

SC1U10V2KX-1GP

1.8V_DELAY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM DDR2 32MX16 A

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

52

of

56

CLKA1
CLKA1#

CLKA1
CLKA1#
1

51
51

R196
56R2J-4-GP

R195
56R2J-4-GP
RASA1#

51

RASA1#

51

CASA1#

51

WEA1#

51

CKEA1

51

CSA1_0#

51

ODTA1

VGA

VGA

L2
L3

BA0
BA1

A_A12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

MDA38
MDA35
MDA37
MDA32
MDA34
MDA36
MDA33
MDA39
MDA44
MDA43
MDA47
MDA40
MDA41
MDA46
MDA42
MDA45

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

U64
A_BA0
A_BA1

C449
SC470P50V2KX-3GP

U30

VGA

A_BA0
A_BA1

L2
L3

BA0
BA1

A_A12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

MDA59
MDA60
MDA58
MDA62
MDA63
MDA56
MDA61
MDA57
MDA51
MDA52
MDA48
MDA53
MDA54
MDA49
MDA55
MDA50

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

CASA1#
WEA1#
CKEA1
CSA1_0#
ODTA1
WDQSA#[7..0]

51,52 WDQSA[7..0]

RDQSA[7..0]

51,52 RDQSA[7..0]

DQMA#[7..0]

51,52 DQMA#[7..0]

MDA[63..0]

51,52 MDA[63..0]

CASA1#

L7

CAS

F3
B3

LDM
UDM

K9

ODT

B7
A8

UDQS
UDQS

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

2
1

VREF

C768

VGA

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

K3

WE

RASA1#

K7

RAS

CASA1#

L7

CAS

DQMA#6
DQMA#7

F3
B3

LDM
UDM

ODTA1

K9

ODT

1.8V_DELAY

RDQSA6
WDQSA6

F7
E8

LDQS
LDQS

R459
4K99R2F-L-GP

RDQSA7
WDQSA7

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

VGA
(SSTL-1.8) VREF = .5*VDDQ
VRAM_VREF4

R457
4K99R2F-L-GP

VGA

HYB18T512161B2F-25-GP
72.18512.M0U

C765
SCD1U16V2ZY-2GP

J2
A2
E2
L1
R3
R7
R8

VGA

CS

VGA

RDQSA4
WDQSA4

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

L8

WEA1#

LDQS
LDQS

C755

F7
E8

RDQSA5
WDQSA5

(SSTL-1.8) VREF = .5*VDDQ

VRAM_VREF3

SCD1U16V2ZY-2GP

VGA

C761

CSA1_0#

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

VDDL
VSSDL

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

1.8V_DELAY

VGA

51,52
51,52

A_BA1
A_BA0

51,52

A_A12

A_BA1
A_BA0
A_A12

L61
VGA
1
2
BLM15BB121SN-GP
VRAM_VDDL4
C763
SCD1U16V2ZY-2GP

J1
J7

VDDL
VSSDL

VGA

R454
4K99R2F-L-GP

L62
VGA
1
2
BLM15BB121SN-GP
VRAM_VDDL3

SCD1U16V2ZY-2GP

R458
4K99R2F-L-GP

A1
E1
J9
M9
R1

ODTA1

VDD1
VDD2
VDD3
VDD4
VDD5

CKE

MAA[11..0]

51,52 MAA[11..0]

VGA

RAS

K2

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

SC1U10V2KX-1GP

WE

K7

SC1U10V2KX-1GP

K3

RASA1#

DQMA#5
DQMA#4

1.8V_DELAY

CS

CKEA1
1.8V_DELAY

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

C758

VGA
2

L8

WEA1#

CK
CK

CSA1_0#

K8
J8

CLKA1#
CLKA1

CKE

K2

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

CKEA1

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

CK
CK

K8
J8

CLKA1#
CLKA1

HYB18T512161B2F-25-GP
72.18512.M0U

VGA

VGA
1.8V_DELAY

VGA

VGA

C471

C416

VGA

C445

VGA

C435

C461

VGA
2

1
2

1
2

1
2

1
2

1
2

C465

VGA

<Variant Name>

SCD1U16V2ZY-2GP

VGA

SCD1U16V2ZY-2GP

C466

SCD1U16V2ZY-2GP

VGA

SCD1U16V2ZY-2GP

VGA

C420

SCD01U50V2ZY-1GP

VGA

C753
SCD1U16V2ZY-2GP

VGA

C748
SCD1U16V2ZY-2GP

VGA

C749
SCD1U16V2ZY-2GP

VGA

C773
SCD1U16V2ZY-2GP

C760

VGA

SC1U10V2KX-1GP

C746

SCD01U50V2ZY-1GP

VGA

SC10U6D3V5MX-3GP

C771
SC1U10V2KX-1GP

VGA

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C772

SC10U6D3V5MX-3GP

1.8V_DELAY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM DDR2 32MX16 B

Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

53

of

56

Note:1 VIP3 MUST NOT BE PULLED HIGH ON M82-M

Note:2 GPIO8 MUST NOT BE PULLED HIGH ON M86-M or M7X

3.3V_DELAY

49
49
49
49
49
49
49
49
49
49
49
49

R375
R382
R384
R378
R387
R391
R397
R399
R149
R406
R401
R402

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO8
GPIO9
GPIO11
GPIO12
GPIO13

49

GPIO22

49
49
49
49
49
49
49
49

VIP_0
VIP_1
VIP_2
VIP_3
VIP_4
VIP_5
VIP_6
VIP_7

49
49
49

VHAD0
DVALID
PSYNC

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP

VGA
VGA
DY
DY
DY
VGA
DY
VGA
DY
DY
DY
VGA

2
2
2
2
2
2
2
2
2
2
2
2

R150 1

DY

2 10KR2J-3-GP

R132
R131
R133
R140
R130
R127
R146
R142

1
1
1
1
1
1
1
1

DY
DY
DY
DY
DY
DY
DY
DY

2
2
2
2
2
2
2
2

R366 1
R143 1
R367 1

DY
DY
DY

2 10KR2J-3-GP
2 10KR2J-3-GP
2 10KR2J-3-GP

1
1
1
1
1
1
1
1
1
1
1
1

CONFIGURATION STRAPS

PIN

STRAPS

10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP

VIP1

MESSAGE SIGNAL INTERRUPT ENABLED

NA

VIP3

ENABLE HD AUDIO

BIF_64BAR_EN_A

DY
10KR2J-3-GP
1

10KR2J-3-GP
VGA_Q500
1
2

DY

VGA

10KR2J-3-GP
1

10KR2J-3-GP
1

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

VIP5

64 BIT BARS DISABLED

NA

GPIO0

PCIE FULL TX OUTPUT SWING

TX_DEEMPH_EN

GPIO1

PCIE TRANSMITTER DE-EMPHASIS ENABLED

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

1
1
1
0

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

1
1
0
1

NOTE 2: HDMI MUST ONLY BE ENABLED

ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT

BIF_DEBUG_ACCESS

GPIO4

DEBUG SIGNALS MUXED OUT

GPIO8

ENABLE HD AUDIO

RSVD

BIF_GEN2_EN_A

GPIO5

( M82M ONLY) Note:2

Allows either PCIe 2.5GT/s or 5.0GT/s operation

GPIO_22_ROMCSB
GPIO[13:11,9]

VIP_DEVICE_STRAP_ENA

DISABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

NA
XX X X

VSYNC

IGNORE VIP DEVICE STRAPS

VGA ENABLED

BIF_HDMI_EN

HSYNC

HDMI ENABLE (SEE NOTE 2)

DEBUG_ I2C_ENABLE

GPIO6

Internal use only

ANY UNUSED
GPIO OR DVP
THAT ARE NOT
CONFIG STRAPS
FOR EXAMPLE
DVPDATA20:23
IN THIS DESIGN

MEM_TYPE

Only populate the required straps,

see table and databook

MEMORY TYPE,MAKE AND SIZE INFO

X X X X

X X X X

PSYNC

X X X X

ATI RESERVED CONFIGURATION STRAPS

B

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
VHAD0

1
1
1
1

NOTE 1: HD AUDIO MUST ONLY BE ENABLED

ON SYSTEMS THAT ARE LEGALLY ENTITLED.
IT IS THE RESPONSIBILITY OF THE SYSTEM
DESIGNER TO ENSURE ENTITLEMENT

BIF_AUDIO_EN

R644 R645 R646 R647

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

(M7XM and M86M ONLY) Note:1

TX_PWRS_ENB

BIF_VGA DIS

49
49
49
49

M7x

BIF_AUDIO_EN

ROMIDCFG(3:0)

1.8V_DELAY

M8x

BIF_MSI_DIS

BIOS_ROM_EN

R368 1 VGA_Q400
2 10KR2J-3-GP
R373 1 VGA 2 10KR2J-3-GP
R371VGA
1
2 10KR2J-3-GP
R369DY
1
2 10KR2J-3-GP

DESCRIPTION OF DEFAULT SETTINGS

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RSVD = ATI RESERVED
(DO NOT INSTALL)

VIP0

VIP2

VIP4

VIP6

VIP7

GPIO2

H2SYNC

GPIO3

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

HY5PS121621CFP-25 Hynix
72.51216.F0U

HYB18T512161B2F-25
72.18512.M0U

GPIO_28_TDO

GENERICC

GPIO21_BB_EN

Qimonda 400MHz

<Variant Name>

K4N51163QE-ZC25 Samsung
72.45116.A0U

DVPDATA20
DVPDATA21
DVPDATA22
DVPDATA23

0
1
1
0

HYB18T512161B2F-20
72.18512.N0U

Wistron Corporation

Qimonda 500MHz

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.
Title

STRAPS
Size
A3

Document Number

Date: Tuesday, March 11, 2008

5

Rev

P1/P15

SA
Sheet
1

54

of

56

SPR2
SPRING-14

SPR1
SPRING-14

DY

DY

SPR3
SPRING-7

H2
HOLE

H28
HOLE

H9
HOLE

H1
HOLE

H12
HOLE

H10
HOLE

H8
HOLE

H14
HOLE

H11
HOLE

DY

SPR6

SPR4
SPRING-62-GP

H16
HOLE

H17
HOLE

H13
HOLE

SPR7DY

H4
HOLE

DY

SPRING-58-GP

SC

SC

Keyboard EMI Caps

H22
HOLE

H18
HOLE

H3
HOLE

1
B

31,32

D_MIC_CLKOUT

18,22,36

LPCCLK1

15,19

USBP3+

25,26

LINK1G

SC100P50V2JN-3GP

EC16

SC10P50V2JN-4GP

DY
EC9

SC10P50V2JN-4GP

EC13

SC10P50V2JN-4GP

EC71
SC5P50V2CN-2GP

DY

DY

DY

EC11

CLK_NB_14M

DCBATOUT

EC78

SCD1U25V3ZY-1GP

EC77

EC76

SCD1U25V3ZY-1GP

1
2

EC75

SCD1U10V2KX-4GP

1
2

EC74

EC37 2 DY 1 SC220P50V2JN-3GP KCOL17

1 SC220P50V2JN-3GP KROW8

EC50 2 DY 1 SC220P50V2JN-3GP KCOL16

EC27 2 DY 1 SC220P50V2JN-3GP KROW7

EC38 2 DY 1 SC220P50V2JN-3GP KCOL15

DY 1 SC220P50V2JN-3GP KROW6

EC48 2 DY 1 SC220P50V2JN-3GP KCOL14

EC35 2 DY 1 SC220P50V2JN-3GP KROW5

EC40 2 DY 1 SC220P50V2JN-3GP KCOL13

EC51 2 DY 1 SC220P50V2JN-3GP KROW4

EC47 2 DY 1 SC220P50V2JN-3GP KCOL12

EC34 2 DY 1 SC220P50V2JN-3GP KROW3

EC52 2 DY 1 SC220P50V2JN-3GP KCOL11

EC46 2 DY 1 SC220P50V2JN-3GP KROW2

EC39 2 DY 1 SC220P50V2JN-3GP KCOL10

EC30 2 DY 1 SC220P50V2JN-3GP KROW1

EC49 2 DY 1 SC220P50V2JN-3GP KCOL9

EC44 2 DY 1 SC220P50V2JN-3GP KCOL2

EC33 2 DY 1 SC220P50V2JN-3GP KCOL8

EC31 2 DY 1 SC220P50V2JN-3GP KCOL1

EC28 2 DY 1 SC220P50V2JN-3GP KCOL7

EC42 2

DY

DCBATOUT

1 SC220P50V2JN-3GP KCOL18

EC36 2

H6
HOLE
EC43 2

3,11

EC73

SCD1U10V2KX-4GP

DY

5V_S5

DY

1D8V_S0

EC98

1
2
H19
HOLE

EC97

1D8V_S3

H27
HOLE

H15
HOLE

EC99
SCD1U10V2KX-4GP

VGA

1D8V_S3

H20
HOLE

SB

DCBATOUT

DCBATOUT
GPU_CORE_S0

SCD1U10V2KX-4GP

DY

H25
HOLE

H23
HOLE

SCD1U25V3ZY-1GP

H26
HOLE

H5
HOLE

SCD1U25V3ZY-1GP

H24
HOLE

SCD1U10V2KX-4GP

H7
HOLE

SPRING-58-GP

DY

EC45 2 DY 1 SC220P50V2JN-3GP KCOL6

35,36 KROW[1..8]

EC41 2 DY 1 SC220P50V2JN-3GP KCOL5

35,36 KCOL[1..18]

EC29 2 DY 1 SC220P50V2JN-3GP KCOL4

EC32 2 DY 1 SC220P50V2JN-3GP KCOL3

DY

DCBATOUT_51117

DCBATOUT

DCBATOUT
DCBATOUT

1D2V_S0

1D8V_S0

<Variant Name>

DY

EC6
SCD1U10V2KX-4GP

DY

EC14
SCD1U10V2KX-4GP

1
2

1
2

DY

EC72

SCD1U25V3ZY-1GP

DY

EC15

SCD1U25V3ZY-1GP

EC65

EC5

SCD1U25V3ZY-1GP

DY

EC54

EC26

1
2

EC25

SCD1U25V3ZY-1GP

1
2

EC4

SCD1U25V3ZY-1GP

SC100P50V2JN-3GP

EC17
2

SC100P50V2JN-3GP

EC18
2

DCBATOUT

DCBATOUT

DY

DY
EC8

SC22P50V2JN-4GP

DY
EC12

SC10P50V2JN-4GP

DY

EC70

SC10P50V2JN-4GP

DY

DCBATOUT

DCBATOUT

LINK100

SCD1U25V3ZY-1GP

25,26

15,19ACT_LED#

USBP3- 25,26

LPCCLK0

SCD1U25V3ZY-1GP

18,22,34

SB_AZ_CODEC_BITCLK

SCD1U25V3ZY-1GP

19,31

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

EMI
Size
A3

Document Number

Date: Monday, March 10, 2008

5

Rev

P1/P15

SA
Sheet
1

55

of

56

NOTICE
1.VRAM and SIDE PORT GEOMETRY
2.digital array vendor

Change List
D

GEOMETRY
1.U60

62.10055.111

SKT-CPU638P-GP-U

SKT-CPU638P-GP-U1

SKT-BGA638H176

SKT-BGA638H176

Common Part

1.RS780M_A13
U61
71.RS780.M12
2.SB700_A12
U67 71.SB700.M06
3.KBC U26 71.00773.00G
4.CLKGEN U33 71.09480.A03
5.SPDIF
LOUT1
22.10270.031
6.MOSFET U53,U56 84.07686.037
7.MOSFET U11,U54,U55,U57
84.04634.037
8.H19,H20 34.4W601.001
9.U21
72.18512.M0U(QIMONDA)
10.card1 20.I0043.001
11.C861,C862,C941,C943
78.10324.2FL
12.C843,C844,C942,C944
63.R0034.1DL
13.USB2 22.10218.Z71
14.U70
71.00888.E0G
15.U32 74.51100.079

Common 2nd source

1.U21

72.45116.A0U

For P15
B

1.M82ME_A11
U62
71.M82ME.M01
2.8111C U1 71.08111.E03
3.JMB380 U46
71.00380.003
4.R12 64.24915.6DL
5.VRAM U30,U31,U63,U64
72.18512.M0U(QIMONDA400)

P15

2nd source

1.VRAM U30,U31,U63,U64

72.18512.N0U(QIMONDA500)

For P1

1.8101E U1
71.08101.B0G
2.JMB385 U46
71.JM385.A0G
3. R247,R253,R254,R255,R256,R620,C574
4. C573
63.00000.00L
5.R12 64.20015.6DL
6. R307,R163
64.14005.6DL

63.R0034.1DL
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CHANGE LIST
Size
A3

Document Number

Date: Tuesday, March 11, 2008

5

Rev

P1/P15

SA
Sheet
1

56

of

56