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CO Assignment#1

The document contains questions about computer organization and register transfer level design. It asks the reader to identify correct answers, design combinational logic circuits for register operations, and analyze the outputs of an adder-subtractor circuit and memory transfer statements.

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kawthar Almousa
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41 views

CO Assignment#1

The document contains questions about computer organization and register transfer level design. It asks the reader to identify correct answers, design combinational logic circuits for register operations, and analyze the outputs of an adder-subtractor circuit and memory transfer statements.

Uploaded by

kawthar Almousa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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COMPUER ORGANIZATION (CE-313)

Assignment #1

QUESTION NO. 1: ENCIRCLE THE CORRECT ANSWER:

(i) According to the DeMorgan’s Law, (x+y)’ = _________________

(a) x’y’ (b) (xy)’ (c) x’+y’ (d) All of the these

(ii) The output of 2-input EX-OR gate is always zero when both inputs are ___________________

(a) One is 1 and other is 0 (b) Different (c) Similar (d) None of these

(iii) A ________________ circuit is connected arrangement of logic gates with a set of inputs and outputs.

(a) Binary (b) Sequential (c) Logical (d) Combinational

(iv) A combinational circuit that performs the arithmetic addition of two bits is called ________________

(a) Binary Adder (b) Full Adder (c) Half Adder (d) Digital Adder

(v) ________________ is a binary cell capable of storing one bit of information.

(a) Flip-flop (b) Binary sequencer (c) Toggle device (d) Memory

(vi) The operations executed on data stored in registers are called _____________________

(a) Logical operations (b) Nano operations (c) Binary operations (d) Micro operations

(vii) The examples of micro-operations are __________________

(a) Delete, Clear, Download (b) Save, Delete, Drop (c) Save, browse, kill (d) Shift, Clear, Load

(viii) The register transfer (x + y) : R2  R1 means ________________

a) If x and y are both 1 then contents of R1 are transferred to R2


b) If x = 1 or y = 1 or both are 1 then contents of R1 are transferred to R2
c) If x = 1 or y = 1 or both are 1 then contents of R2 are transferred to R1
d) None of the above

(ix) Rather than connecting wires between all registers a ___________________ is used.

(a) Zigzag Path (b) Common Diode (c) Common bus (d) Wireless connection

(x) The three-state gate is a digital circuit that exhibits three states, two of the states are signals
equivalent to logic 1 and 0, the third state is a _____________________

(a) low voltage state (b) is high current state (c) high-impedance state (d) None of these
QUESTION NO. 2:

Combinational Circuits, Flip flops, Sequential Circuits.

1. Design the circuits for the following:

(i) Having a digital system that has 2 Registers (A and B) each of 2 bit size. Implement the Bus
Circuit that Selects any ONE of them to be provided as an input to any other circuit.
(ii) Having a digital system that has 3 Registers (A, B and C) each of 3 bit size. Implement the Bus
Circuit that Selects any TWO of them to be provided as an input to any other circuit.
(iii) Having the following two micro-operations:
a. X : R3 R2 + R1
b. X' : R3 R3 – 1
Implement the logic circuit that can perform the two micro-operations, and select only one of
them at a time. Registers are of size 2 bits.
(iv) Having the following two micro-operations:
a. X : R3 R2 – R1
b. X' : R3 R3 + 1
Implement the logic circuit that can perform the two micro-operations, and select only one of
them at a time. Registers are of size 2 bits.

QUESTION NO. 3

Register Transfer and Microoperations

1. The Adder-Subtractor circuit of Figure 4-7 has the following values for input mode M and the data
inputs A and B. In each case determine the values of outputs: S3, S2, S1, S0 and C4

S# M A B

a. 0 0111 0110

b. 0 1000 1001

c. 1 1100 1000

d. 1 0101 1010

e. 1 0000 0001
2. The following transfer statements specify a memory. Explain operation in each case.

a. R2  M[AR]

b. M[AR]  R3

c. R5  M[R5]

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