▣ The term PIC stands for “Peripheral

Interface Controller” .
▣ These 8-bit micro controllers have become very
important now -a -days in industrial
automation and embedded applications etc.
 PIC M C U was developed by General
Instruments in 1975. (Microelectronics
division) (CP1600).
 In 1985, General Instruments converted their
Microelectronics division to Microchip
technology. (PIC1640 and PIC1650).
 In 1993, Microchip technology launched the 8-
bit PIC 16C84 with EEPROM.
 In 1998, Improved version of PIC 16C84 with
flash memory was evolved (PIC 16F84)
The 8-bit PIC microcontroller is divided into
following four categories on the basis of internal
architecture:
1. Base Line PIC
2. Mid-Range PIC
3. Enhanced Mid-Range PIC
4. PIC18
Base Line Mid-Range Enhanced Mid-Range PIC18

No. of Pins 6-40 8-64 8-64 18-100

Program Memory Up to 3 KB Up to 14 KB Up to 28 KB Up to 128 KB

Data Memory Up to 134 Bytes Up to 368 Bytes Up to 1.5 KB Up to 4 KB

Instruction Length 12-bit 14-bit 14-bit 16-bit

No. of instruction set 33 35 49 83

Speed 5 MIPS 8 MIPS Up to 16 MIPS

5 MIPS*

In addition of baseline In addition of

· SPI In addition of Mid-range Enhanced Mid-range
• Comparator
· I2C · High Performance • CAN
• 8-bit ADC
Feature · UART ·Multiple • LIN
• Data Memory
· PWM communication • USB
• Internal Oscillator
· 10-bit ADC peripherals • Ethernet
· OP-Amps • 12-bit ADC

Families PIC10,PIC12, PIC16 PIC12, PIC16 PIC12F1XXX, PIC16F1XXX PIC18

All the major features of mid range PIC are
divided into different categories:
▣ Core Features

▣ Architectural Features

▣ Peripheral Features
Core pertains to the basic features that are required to
make the device operate
▣ Device Oscillator (Crystal, RC)
▣ Reset logic (Master Clear, POR, BOR, WDT)
▣ CP U Operation (W, Status, PCL, PCLATH, FSR,
INDF)
▣ A LU operation (8)
▣ Device Memory Map Organization
▣ Interrupt Logic
▣ Instruction set (35)
▣ Low Power Consumption (< 2mA @5V), 4-
20MHz.
These features gives information regarding internal
details and basic functionality of a controller:
▣ Harvard Architecture
▣ Long word Instructions
▣ Single word Instructions
▣ Single Cycle Instructions
▣ Instructions Pipelining
▣ Reduced Instruction set (35)
▣ Register File Architecture
▣ Orthogonal Instruction set (symmetric)
▣ Eight-level deep hardware stack
These features add power to microprocessor or
microcontroller which includes ease in interfacing to
external world and internal tasks:
▣ General purpose I/O

▣ T0, T1,T2

▣ CCP- Capture, Compare and PWM

▣ SSP – Synchronous serial port

▣ USART- Serial Communication Interface

▣ Comparators

▣ ADCs- 8 or 10 bits

▣ L C D Drivers
Harvard Architecture
RISC Feature
CPU pipelines instruction fetching and execution in order to achieve
an execution of one instruction at every cycle
Instruction set Simplicity : just 35 instructions.
Speed : PIC executes most of its instructions in 0.2 s or five
instructions per microsecond.

 Power-on-reset and brown-out protection ensure that the chip

operates only when the supply voltage is within specifications.
Brown-out detection circuitry for Brown-out Reset (BOR)

 Watch dog timer: resets the PIC if the chip malfunctions or

deviates from its normal operation at any time.

 Powerful output pin control: single instruction can select and

drive a single output pin high or low in its 0.2 s instruction
Salient features (Contd..)

Programmable timer options:

Three timers (T0/T1/T2) can characterize inputs, control outputs and
provide internal timing for the program execution.

Synchronous Serial Port (SSP) with SPITM and I2C

Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI)

Interrupt control:
Up to 12 independent interrupt sources can control when the CPU will
deal with each sources.

I/O port expansion:

With the help of built in Serial Peripheral Interface (SPI) the number of
I/O ports can be expanded. EPROM/DIP/ROM options are provided.

PIC16CXX microcontroller family has enhanced core features, eight-

level deep stack, and multiple internal and external interrupt sources.
▣ The Harvard Architecture

5
PIC

368 Bytes of
Memory for
Data

8 KB of Memory
For Programs

14-bit program
words
The Central Processing Unit (CPU) is responsible for using
the information in the program memory (instructions) to
control the operation of the device. Many of these
instructions operate on data memory. To operate on data
memory, the Arithmetic Logical Unit (ALU) is required. In
addition to performing arithmetical and logical operations,
the A LU controls status bits (which are found in the
STATUS register). The result of some instructions force
status bits to a value depending on the state of the result.
The CP U controls the program memory address bus, the
data memory address bus, and accesses to the stack.
The CPU registers are
▣ Working Register (W)

▣ Status – Register

▣ FSR – File Select Register

▣ INDF

▣ PCLATH

▣ Program Counter

▣ PCL

▣ Eight Level Stack

Working Register

▣▣ Called as
Accumulator. many instructions as
▣ ▣ used by source
of an operand.
▣ destination for the result of instruction
execution.
▣ It is an 8-bit register

Temporary holding register.

R.Hariharan AP / EEE -
Status Register:
It contains the arithmetic status of the A LU, the RESET
status and the bank select bits for the data memory.

C: Carry/borrow bit
DC: Digit carry/borrow
bit Z: Zero bit
NOT_PD: Reset Status bit (Power-down
mode bit) NOT_TO: Reset Status bit (time-
out bit)
RPO: Register bank Select
▣ FSR – (File Select Register):
It is the pointer used for indirect addressing. In
the indirect addressing mode the 8-bit register
file address is first written into FSR. It is a
special purpose register that serves as an
address pointer to any address through out the
entire register file.
▣ INDF – (Indirect File):
It is not a physical register .Addressing this
INDF will cause indirect addressing. Any
instruction using the INDF register actually
access the register pointed to by the FSR.
▣ PCL:
PCL is actually the lower 8-bits of the 13-bit
program counter. It can be read like any other
register.
▣ PCLATH (Program Counter Latch):
The upper 3-bits of PCLATH remains zero and
serves no purpose, it is only when PC2 is
written to that PCLATH is automatically
written into the PC at the same time.
It has three memory blocks.
▣ Program memory

▣ Data memory

▣ Stack
▣ The 6x/7x family controllers have either 2k or
4k address of program memory. Normally a
program memory of 2k addresses needs only a
11-bit program counter to access any address
(211=2048=2k).
▣ A program memory of 4k address needs a 12-bit
program counter. But this PIC family uses 13-bit
program counter allowing the controllers to an
8k-program memory without changing the CPU
structure.
▣ As the PIC 16c6x/7x family of micro-
controllers uses Harvard Architecture it
enables the devices exceptionally fast execution
speed for a given clock rate. In the Harvard
Architecture separate buses are used for Data
and Instruction as shown in the diagram.

▣ Instructions are fetched from program memory

using buses that are distinct from the buses
used for accessing variables in data memory,
I/O ports etc. Every instruction is coded as a
single 14-bit word and fetched over a 14-bit
wide bus.
▣ Two addresses in the program memory address
space are treated in a special way by the CPU.
The first address H’ 000’ being a go to mainline
instruction the second special address, H’ 004’
being a ‘go to in service’ instruction can be
assigned to this address to make the CPU to
jump to the beginning of the Interrupt Service
routine located elsewhere in the memory space.
Program memory :
Place where user can write the assembly
code.

Reset Vector :
Interrupt Vector :
PC = 0000h

PC = 0004h

Reset
Interrupt
Power ON
Page PC LATCH Start End
Number Position Position
Bit 4 Bit 3

0 0 0 0000h 7FFh
1 0 1 0800 FFFh
2 1 0 1000 17FFh
3 1 1 1800 1FFFh
Data
Memory
(Register
Files)

General
Purpose Special
Registers Function
(GPR) Registers
(SFR)

Control the Control

the
“Core”
“Periphera
ls”
Data Memory is also known as Register File.
Register File consists of two components.
▣ General purpose register file ( RAM).

▣ Special purpose register file (similar to SFR in

8051).
Data Memory map

Bank 0 Bank 1
00h – 7Fh 80h – FFh

RAM

Bank 2 Bank 3
100h – 17Fh 180h – 1EFh
RP1 RPO BANK ADDRESS
(Status Reg)

00 Bank 0 00h - 7Fh

01 Bank 1 80h – FFh
10 Bank 2 100h – 1FFh
11 Bank 3 180h – 1FFh

Bank 0 0 0 0 0 0 0 0 0 0 00

0 0 1 1 1 1 1 1 1 7F

Bank 1 0 1 0 0 0 0 0 0 0 80

0 1 1 1 1 1 1 1 1 FF
STACK
part of RAM
PC is associated with 8 level stack
Stack is used for storing data temporarily while CPU is in execution.
Before the microcontroller executes a subroutine or an interrupt
occurs, the address of the instruction to be executed next is
pushed onto the stack.
CPU can get back to main program when it executes RET
instruction at end of the subroutine

Stack overflow or Underflow condition: after the stack has been

pushed eight times, the ninth push overwrites the value that was
stored with the first push.
Register Addressing Modes
There are 3 types of addressing modes in PIC
Immediate Addressing
Direct Addressing
Indirect Addressing

 The PIC16CXX can directly or indirectly address its register

files or data memory.
 The PIC16CXX has an orthogonal instruction set that makes it
possible to carry out any operation on any register using any
addressing mode.
Direct Addressing
Uses 7 bits of 14 bit instruction to identify a register file address
8th and 9th bit comes from RP0 and RP1 bits of STATUS register.
Direct Addressing

= 7 Bits
Indirect Addressing

Full 8 bit register address is written the special

function register FSR
INDF is used to get the content of the address pointed
by FSR
In-direct Addressing

INDF - all bank 0x 00 Location

FSR - all bank 0x 04 Location

Bank 0
0 Bank 1
00h - FFh

Bank 2
1 100h – 1FFh
Bank 3
4 Oscillator Pulse = 1 Instruction Cycle
If using Oscillator = 4 MHz
1 Instruction Cycle = 1µs
Conditional branching = 2 µs
Instruction Set
Every Instruction is coded in a 14 bit word
Each instruction takes one cycle to execute
Only 35 instructions to learn (RISC)
Uses 7 bits of 14 bit instruction to identify register file
address
For most instructions, W register is used as a source
register
The result of an operation can be stored back to the W
register or back to source register
Addition

MOVLW 25H; WREG=25

ADDLW 0X34; ADD 34H TO WREG
MOVWF 0x07 Result in register file
memory location 07 Bank 0
PERIPHERAL FEATURES
▣ The PIC16CXX/17CXX is a family of low-cost,
high-performance, CMOS, fully-static, 8-bit
microcontrollers.
▣ There are Three Timers : Timer 0, Timer
1, Timer 2
▣ Timer 0: 8-bit timer/counter with 8-bit
prescaler
▣ Timer 1: 16-bit timer/counter with
prescaler
can be incremented during sleep via external
crystal/clock
▣ Timer 2: 8-bit timer/counter with 8-bit period
register, pre-scaler and post-scaler
▣ Capture/Compare/PWM (CCP) module(s)
▣ Capture is 16-bit, max resolution is 12.5 ns,
Compare is 16-bit, max resolution is 200ns,
PWM max resolution is 10-bit
▣ Synchronous Serial Port (SSP) with SPITM and
I2C
▣ Universal Synchronous Asynchronous Receiver
Transmitter (USART/SCI)
▣ Parallel Slave Port (PSP) 8-bits wide, with
external RD, WR and CS controls
▣ Brown-out detection circuitry for Brown-out
Reset (BOR)
▣ PIC16CXX microcontroller family has
enhanced core features, eight-level deep stack,
and multiple internal and external interrupt
sources.
The PIC architectures have several limitations:
▣ Only a single accumulator
▣ A small instruction set
▣ Memory must be directly referenced in
arithmetic and logic operations, although
indirect addressing is available via 2 additional
registers
▣ Register-bank switching is required to access
the entire R A M of many devices
The transfer of one bit of data at time
consecutively over a communication channel
is called Serial Communication. There are
three protocols of serial communication:

USART : It stands for Universal synchronous and Asynchronous

Receiver and Transmitter which provides a serial communication in
two devices. In this protocol data is transmitted and received bit by
bit through a single wire according to the clock pulses. To send and
receive data serially the PIC microcontroller has two pins TXD and
RXD.
SPI Protocol: SPI stands for Serial Peripheral Interface. It is used to
send data between PIC microcontrollers and other peripherals like
sensors, shift registers and SD cards. Three wire SPI communications
is supported in PIC microcontroller between two devices on a
common clock source. SPI protocol has greater data handling
capability than that of the USART.

I2C Protocol: I2C stands for Inter Integrated Circuit, and this
protocol is used to connect low speed devices like microcontrollers,
EEPROMS and A/D converters. PIC microcontroller support two wire
Interface or I2C communication between two devices which can
work as both Master and Slave device.
Synchrnous Serial
Port Module

Serial Peripheral Interface (SPI)

Inter-Integrated Chip (I2C)
USART
I 2 C Subroutines

St The chip issuing the Start condition first pulls

ar the SDA (data) line low, and next pulls the
t SCL (clock) line low.

St The Bus Master first releases the SCL and

op then the SDA line.
I2C
TEMPERATURE SENSOR

Analog outputs

PIC OUT1 OUT0

+5V

OUT1 OUT0 +5V

VDD
4 AD1
RC4/SDI/SDA SDA
AD0
3
RC3/SCK/SCL SCL GND

Maximum integreted products MAX518

Dual 8-bit DAC’s
(8-pin DIP or SO-8)
2
128 X 8 EEPROM TEMPERATURE SENSOR Dual DAC

+5V +5V +5V

VS OUT1 OUT0
Vcc VDD
0.1µF 0.1µF 0.1µF
Unused pins A2
24LC01B WP LM75
AD1
A1 MAX518
A0 AD0
Vss GND GND
SDA SCL SDA SCL SDA SCL

PIC
SDA

SCL

B’1010000’ B’1001000’ B’0101100’

selectable selectable
PCslave address
3pins required:
(RC5/SD0;
RC4/SDI;
RC3/SCLK)
Serial Peripheral
Interface (SPI)
Shift register interface
To obtain large number of extra I/O pins
3pins required: (RC5/SD0;RC4/SDI;RC3/SCLK)
SPI FOR O/P PORT EXPANSION
Clear flag Flag set up on completion
of transfer

SSPIF
9 micro second (osc= 4Mhz)
Write to SSPBUF

SCK

SDO bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0

Timing with negative going clock

pulse(CKP=1)
RD7

SSPIF

9 micro second (osc= 4Mhz)

Write to SSPBUF

First shift

SCK

SDI

SPI reads
Input bit here

Read SSPBUF

TIMING DIAGRAM
Not sequence
b0 b7 b6 b5 b4 b3 b2 b1

PIC RD7
6 5 4 3 14 13 12 11
RC5 (unrelated input) 1
74 hc165 shift register Load
RC4/SDI Data out Data in 10
Clock Serial 2
GND
Vcc enable clock
16 15 8
MSB first
+5v 0.01 µ F
RC3/SCK

SPI USE FOR INPUT PORT EXPANSION

The number of ports in a PIC microcontroller depends on the
model, but most PIC microcontrollers have five ports: Port A, Port
B, Port C, Port D, and Port E:

• PIC16F877a
• This microcontroller has 40 pins and five ports. The ports are
arranged as follows:
• Port A: Has five pins
• Port B: Has eight pins
• Port C: Has eight pins
• Port D: Has eight pins
• Port E: Has three pins
I/O ports

•Port A:This port is 5-bit wide and can be used for both input and
output. The status of TRISA register decided whether it is used as
input or output port.
•Port B:It is an 8-bit port. This port also can be used as input and
output. Moreover in input mode four of its bits are variable
according to the interrupt signals.
•Port C:It is also an 8-bit port and can be used as both input and
output port which is determined by the status of the TRISC register.
•Port D:This 8-bit port, unlike Port A, B and C is not an input/output
port, but is used as acts as a slave port for the connection to
the microprocessor When in I/O mode Port D all pins should have
Schmitt Trigger buffers.
•Port E:It is a 3-bit port which is used as the additional feature of
the control signals to the A/D converter
Read PB data and transfer to PC continuously after adding 05
Clrf TRISC port c: o/p
Setf TRISB port b: i/p
L1: Movf port B,W
Addlw 05
Movwf port c
Goto L1
7.Timers:
Timers and counters are important as timers can tell the time and
count. PIC microcontroller can have up to four timers (depending
upon the family) Timer0, Timer1, Timer2 and Timer3. Timer0 and
Timer2 are of 8-bits while the Timer1 and Timer3 are of 16-bits,
which can also be used as a counter.

The microcontroller PIC16F877 has 3 different timers:

PIC Timer0. PIC Timer1. PIC Timer2.

A PIC18 microcontroller may have up to 5 timers:

Timer0…Timer 4. - Timer0, Timer1, and Timer3 are 16-bit
timers whereas Timer2 and Timer4 are 8-bit. -
CCP MODULE:
A CCP module works in the following three modes:
•Capture Mode: In this mode time is captured when a signal is
arrived, or we can say that, when the CCP pin goes high it captures
the value of the Timer1.
•Compare Mode: It works same as an analog comparator, which
means that when timer 1’s value reaches some reference value it
will give an output signal.
•PWM Mode: This mode provides a 10 bit resolution pulse and duty
cycle that is programmable.
TIMER0 SCALAR CIRCUIT

TMRO(H’01) 2 cycle delay prescalar

Osc/4
8 bit counter

Over flow

Scalar circuits

With osc=4 MHZ and prescalar set to divide by eight over flow will occur
(and TO1F will ) Every 2048 microsecond
MINIMAL USE OF TIMER 0

X X 0 X 1 X X X

PSA 1:Prescalar assigned low

0:Prescalar assigned to timer 0

1:Timer 0 clock source is RA4/TOCK

TOSC
0:Timer 0clock source is OSC/4
INITIALIZATION OF PRESCALER
TOCS = 0, timer 0 clock source is
OSC/4

PSA = 0,prescalar assigned to

Timer 0
OPTION _REG
x x 0 x 0 0 1 0
(H’81)

Prescalar divided by

0 0 0 2
0 0 1 4
0 1 0 8
0 1 1 16
1 0 0 32
1 0 1 64
1 1 0 128
1 1 1 256
TMRO(H’01

8 bit counter 2-cycle delay

TIMER0
Other interrupt sources
Set

Interuppt
CPU

1 1
TOIF:TMRO over flow interrupt flag
TOLE: TMRO over flow interrupt enable bit
CIE: Clobal interrupt enable bit
TMR2
8-bit resettable counter
(H’11’)
Count Reset count count

TIMER2 equal

PR2
(H’92’

set
76 5 43 21 0
PIR1 1
(H’0C’)
TMR2IF

Interrupt
CPU
PEIE TMR2IE
GIE
76 5 43 21 0 76 5 43 21 0
1 1 PIE1
INTCON 1
(H’8C’)
(H’0B’/H’8B’)
7 6 5 4 3 2 1 0
T2 CON
(H’12’;) Prescaler
0 0 C=1
0 1 C=4
1 x C=16
Undefined bit
0 Disable timer2
1 Enable timer2

0000 A=1
0001 A=2
0010 A=3
…. ……
….. ……
1110 A=15
1111 A=16
PR2
(H’92’)
00000000 B=1
00000001 B=2
00000010 B=3
00000100 B=4
…. …
…. …
11111110 B=255
11111111 B=256
TMRO(H’01

8 bit counter 2-cycle delay

TIMER0
Other interrupt sources
Set

Interuppt
CPU

1 1
TOIF:TMRO over flow interrupt flag
TOLE: TMRO over flow interrupt enable bit
CIE: Clobal interrupt enable bit
TMR2
8-bit resettable counter
(H’11’)
Count Reset count count

TIMER2 equal

PR2
(H’92’

set
76 5 43 21 0
PIR1 1
(H’0C’)
TMR2IF

Interrupt
CPU
PEIE TMR2IE
GIE
76 5 43 21 0 76 5 43 21 0
1 1 PIE1
INTCON 1
(H’8C’)
(H’0B’/H’8B’)
CCP in Capture Mode CCP in Capture Mode - Main use of CCP
is to capture event arrival time –
An event is represented by a signal edge. –

The PIC18 event can be one of the following: 1. every falling

edge 1. every falling edge 2. every rising edge 3. every 4th rising
edge 4. every 16th rising edge

Applications of Capture Mode • Event arrival time recording •

Period measurement • P l idth t Pulse width measurement •
Interrupt generation • Event counting • Time reference • Duty cycle
measurement
CCP1 COMPARE MODE:
In this mode, the microcontroller constantly compares the value
stored in the 16-bit CCPR1 register with the value stored in the
TMR1 or TMR3 register. If the value in the CCPR1 register matches
the Timer value, it can change the logic state of the RC2/CCP1
output pin and generate the CCPIF (Interrupt Flag). The specific logic
state depends on the configuration of bits in the control register
(CCP1M3 – CCP1M0).
PIC uses TIMER2 for generating the PWM signals. Lets relate the above
concepts with the PIC registers.
Period:PR2 register is used to specify the PWM Period. The PWM period
can be calculated using the following formula. $$PWM Period = [(PR2) +
1] * 4 * TOSC * (TMR2 Prescale Value)$$
DutyCycle:CCPR1L and CCP1CON<5:4> are used to specify the
DutyCycle.The CCPR1L contains the eight MSbs and the CCP1CON<5:4>
contains the two LSbs.
PWM Signal Generation: Once the PWM is configured and Timer2 is
enabled, TMR2 starts incrementing depending on the prescalar. Once
the TMR2 value is equal to dutyCycle(CCPR1L+CCP1CON<5:4>) the
PWM pin will be pulled LOW. The timer still continues to increment till it
matches with the period PR2. After which the PWM pin will be pulled
HIGH and TMR2 is reset for next cycle.
PIC16F877A PWM Registers
The below table shows the registers associated with PIC16F877A PWM.

Register Description
CCPxCON This register is used to Configure the CCP module for
Capture/Compare/PWM opertaion.
CCPRxL This register holds the 8-Msb bits of PWM, lower 2-bits will be
part of CCPxCON register.
TMR2 Free running counter which will be compared with CCPR1L and
PR2 for generating the PWM output.
ADC
It converts the analog voltage levels to digital voltage values. In PIC
Microcontroller, ADC has 8-channels and has resolution of 10-bit,
which means that if we have to convert an analog voltage between
0V to 5V the converter will divide it to 2^10 levels (1024 levels). The
special function registers ADCON0 and ADCON1 control the
operation of ADC. The converter stores the lower 8 bits in ADRESL
register and the upper bits in the ADRESH register. Reference
voltage of 5V is required for the operation of the converter.
•DATA EEPROM:
This memory allows storing the variables as a result of burning the
written program. It is readable and writable during normal operation
(over the full VDD range). This memory is not directly mapped in the
register file. It is indirectly addressed through the SFRs. There are six
SFRs which are used to read and write to this memory (EECON1,
EECON2, EEDATA, EEDATH, EEADR, EEADRH).
INTERRUPTS:
There are 20 internal interrupts and three external interrupt sources
in PIC microcontrollers which are related with different peripherals
like ADC, USART, Timers, and CCP etc.
DAC
There are no analog outputs in PIC Microcontroller. To get
analog output we have to use external Digital-to-Analog Converter
(DAC). It can convert 8 bits of digital number from the eight digital
outputs of PIC microcontroller.