COENG 7: Hardware Description

Languages
UNIT 1
The Importance of Hardware
Description Languages (HDLs)
Introduction
• Hardware Description Languages (HDLs) are vital tools for modern
digital designers.
• Learning SystemVerilog or VHDL enables faster digital system
specification and streamlines debugging.
• Debug cycles are more efficient with code changes rather than
schematic rewiring.
The Role of HDLs
• HDLs are essential for both simulation and synthesis in digital design.
• Logic simulation helps test systems on a computer before hardware
implementation.
• Logic synthesis converts HDL code into digital logic circuits.
Guiding Principle
• Key Point: Remember, when writing HDL code, you're describing real
hardware, not writing a program.
• Avoid the common beginner's mistake of writing HDL code without
considering the implied hardware.
• Begin by sketching a block diagram of your system, specifying
combinational logic, sequential circuits, etc.
• Write HDL code for each portion, using correct idioms to convey the
intended hardware.
What is a Hardware Description Language
(HDL)?
• In computer engineering, an HDL is a specialized language for
describing electronic circuits, primarily digital logic circuits.
• HDL allows precise, formal descriptions for automated analysis,
simulation, and synthesis.
• Synthesis converts HDL descriptions into netlists, which guide
integrated circuit creation.
HDL Structure
• HDLs resemble programming languages like C or ALGOL.
• They consist of expressions, statements, and control structures.
• Notably, HDLs explicitly incorporate the concept of time.
Application of HDLs
• Key Point: HDLs are integral to Electronic Design Automation (EDA)
systems, particularly for complex circuits.
• EDA systems are crucial for designing application-specific integrated
circuits, microprocessors, and programmable logic devices.
Digital Building Blocks: Adders in
Hardware Description Languages
Types of Adders
• Half Adder: Basic adder for single-bit addition.
• Full Adder: More advanced adder with carry-in and carry-out.
• Carry Propagate Adders: Include ripple-carry, carry-lookahead, and
prefix adders.
• Faster adders tend to be more complex and resource-intensive.
The Role of HDLs
• HDLs are essential for specifying carry propagate adders (CPAs).
• Modern synthesis tools assist in selecting cost-effective
implementations meeting speed requirements.
• HDLs streamline the design process and allow for optimization.
HDL Example - SystemVerilog
module adder #(parameter N = 8)
(input logic [N–1:0] a, b,
input logic cin,
output logic [N–1:0] s,
output logic cout);
assign {cout, s} = a + b + cin;
endmodule
HDL Example - VHDL
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD_UNSIGNED.ALL;
entity adder is generic(N: integer := 8);
port(a, b: in STD_LOGIC_VECTOR(N–1 downto 0);
cin: in STD_LOGIC;
s: out STD_LOGIC_VECTOR(N–1 downto 0);
cout: out STD_LOGIC);
end;
architecture synth of adder is
signal result: STD_LOGIC_VECTOR(N downto 0);
begin
result <= (“0” & a) + (“0” & b) + cin;
s <= result(N–1 downto 0);
cout <= result(N);
end;
Full Adder
HDL Example Explanation
• The provided examples demonstrate a generic adder in SystemVerilog
and VHDL.
• These adders include parameters for bit width and handle carry-in
and carry-out.
• The logic for addition is specified in both languages, showcasing HDL's
conciseness and flexibility.
Design Languages in Digital
Circuits
Design Languages in Digital Circuits
• Very High-Speed Integrated Circuit Hardware Description Language
(VHDL) originated in 1980 under a Department of Defense (DoD)
requirement.
• It aimed to provide a common design methodology, self-
documentation, and reusability for digital circuit design.
• VHDL became an IEEE standard in 1987 (IEEE Std 1076-1987) and has
seen revisions in 1993, 2000, and 2002 (latest: 1076-2002).
• VHDL has various associated standards related to modeling and
synthesis.
Portability and Reusability
• HDL code is contained in ASCII text files, making it transportable
between EDA tools, computers, tool versions, and design teams.
• VHDL supports three primary coding styles:
1. Structural Description: Describes circuit structure using logic gates and
interconnect wiring.
2. Dataflow Description: Depicts data transfer between inputs, outputs, and
signals.
3. Behavioral Description: Defines design behavior through algorithms,
resembling high-level software programming languages.
• Dataflow and behavioral descriptions use similar constructs, except
for process statements in behavioral descriptions.
VHDL Design Elements
• In VHDL, a design consists of an entity declaration and an architecture
body.
• The entity defines I/O, parameters, and serves as a black box with
visible connections.
• The architecture body describes the internal workings and can include
structural, dataflow, or behavioral descriptions.
Example: Two-Input AND Gate (Dataflow
Level)
• Examine a dataflow-level description of a two-input AND gate.
• Top part defines reference libraries.
• Middle part declares the entity (And_Gate) and its I/O connections
(ports).
• Bottom part identifies the architecture, using logical AND operator to
specify operation.
• Comments are denoted with "--."
Example: Two-Input AND Gate (Dataflow
Level)
Example Test Bench
• A test bench is used to simulate designs.
• It mimics circuit structure but lacks inputs and outputs.
• Test bench stimulus and design instances are specified within the test
bench.
Example Test Bench