Module 5
Module 5
● CISC − CISC stands for complex instruction set computer. It allows the
user to insert a single instruction as an alternative to many simple
instructions.
● RISC − RISC stands for Reduced Instruction Set Computers. It reduces
the operational time by shortening the clock cycle per instruction.
Applications of Microcontrollers
Interrupts: Interrupts is a sub-routine call that given by the microcontroller when some
other program with high priority is request for acquiring the system buses.
Interrupts provide a method to postpone or delay the current process, performs a sub-
routine task and then restart the standard program again.
Types of interrupt in 8051 Microcontroller:
Let's see the five sources of interrupts in 8051 Microcontroller:
Banks
bit-addressable area
scratch-pad area.
The banks contain different general-purpose registers such as R0-R7, and all such
registers are byte-addressable registers that store or remove only 1-byte of data.
Banks and Registers
The B0, B1, B2, and B3 stand for banks, and each bank contains eight general-
purpose registers ranging from ‘R0’ to ‘R7’. All these registers are byte-addressable.
possible. These banks are selected by the Program Status Word (PSW) register.
PSW (Program Status Word) Register
● This register reflects the status of the operation that is carried out in the
controller.
shown below. The physical address of the PSW starts from D0h and the
Parity Flag (P): The address of the parity flag is D0. While performing
arithmetic operations, if the result is 1, then the parity flag is set – otherwise,
reset.
RS1 and RS0
The RS1 and RS0, the bits in the PSW register, are used to select different memory
locations (bank0 to bank4) in the RAM.
Special Function Registers (SFR)
● These registers contain all peripherally related registers like P0, P1,
registers.
address registers.
Accumulator
● If you want to use a bit-addressable register, you can use a single bit of
the register
operations.
B-Register
The B-register is a bit and byte-addressable register. You can access 1-bit or
all 8-bits. The B register is only used for multiplication and division operations.
Port Registers
The 8051 microcontroller consists of 4-input and output ports (P0, P1, P2, and
● The 8051 microcontroller consists of two 16-bit timers and counters such
● Both the timers consist of a 16-bit register in which the lower byte is
● The Timer can be used as a counter as well as for timing operation that
Types of Shift Register
● Shift registers are mainly used for the storage of digital data.
● The shift registers are bit-addressable registers that store only one bit of
data.
● i.e. first 128 registers and this part of RAM is divided in several blocks.
● The first 128 bytes of internal data memory are both directly and
indirectly addressable.
● The upper 128 bytes of data memory (from 0x80 to 0xFF) can be
addressed only indirectly.
IO ADDRESSING
The 8051 has four important ports. Port 0, Port 1, Port 2 and Port 3. These ports
allow the microcontroller to connect with the outside world. The four ports of 8051
microcontrollers have certain specific functions and corresponding features
● Each port has 8 pins. Thus the four ports jointly comprise 32 pins.
● All ports are bidirectional.
● We can modify their functions using software and hardware that they
connect to.
● To configure ports as an input port 1 must be written to that port
● To configure it as an output port 0 must be written to it.
Port 0
● Port 0 of the 8051 has two main functions: To be used as a simple
input-output port and to access external memory in conjunction
with Port 2.
Port 1
● It has only one function – to act as an Input-Output port.
Port 2
● Its main functions are kind of similar to those of Port 0. It can be used
as an input-output port. And can access external memory in
conjunction with Port 0.
Port 3
Just like Port 2, Port 3 can function as an input-output port.
Each interrupt can be enabled or disabled by setting bits of the IE register and the whole
interrupt system can be disabled by clearing the EA bit of the same register.
We can change the priority levels of the interrupts by changing the corresponding
bit in the Interrupt Priority (IP) register .
A low priority interrupt can only be interrupted by the high priority interrupt, but
not interrupted by another low priority interrupt.
The stack is a section of a RAM used by the CPU to store information such as data or
memory address on temporary basis. The CPU needs this storage area considering
limited number of registers.
How Stacks are Accessed
● As the stack is a section of a RAM, there are registers inside the CPU to point to
it.
● The register used to access the stack is known as the stack pointer register.
● The stack pointer in the 8051 is 8-bits wide, and it can take a value of 00 to
FFH.
● When the 8051 is initialized, the SP register contains the value 07H.
● This means that the RAM location 08 is the first location used for the stack.
● The storing operation of a CPU register in the stack is known as a PUSH,
and getting the contents from the stack back into a CPU register is called a
POP.
Pushing into the Stack
● In the 8051, the stack pointer (SP) points to the last used location of the
stack.
● When data is pushed onto the stack, the stack pointer (SP) is incremented by
1.
● When PUSH is executed, the contents of the register are saved on the stack
and SP is incremented by 1.
● To push the registers onto the stack, we must use their RAM addresses. For
example, the instruction "PUSH 1" pushes register R1 onto the stack.
Popping from the Stack
Popping the contents of the stack back into a given register is the opposite to the
process of pushing.
With every pop operation, the top byte of the stack is copied to the register
specified by the instruction and the stack pointer is decremented once.
Immediate addressing mode:
● In this type of addressing mode, instead of giving the data directly, the register
name is given.
● Data from one register is moved to other register
● Generally the data is stored in general purpose registers, thus it is named as
register addressing mode.
MOV R1 , A ;
it means access to the data is moved from register A to register R1. However the data
is not removed from A register, it is just copied.
Direct addressing mode:
In this type, the address of the data location is given in the instruction , This operation
is only for internal RAM and SFRs because it provides an address of only 8-bit.
MOV 15H , 25H ; move data from 25H location to location 15H .
Indirect register addressing mode:
This addressing mode is for both internal RAM and external RAM.
Indirect addressing mode in internal RAM:
MOV A , @R0 ;
This means copying the data from the location stored in R0.
R0 has data 10, which is address of 23.
It means copy 23 to register A
Indirect addressing mode in external RAM:
MOVX A , @DPTR ; for external RAM, MOVX is used.
DPTR is a 16-bit address register, but the data in it is 8-bit only
Absolute addressing mode in 8051
Description: Instruction first compares the number in the accumulator with the
directly addressed byte. If they are equal, the program proceeds with execution.
Otherwise, a jump to the specified address will be executed.
CJNE A,#data,rel - Compares immediate data to the accumulator and jumps
if not equal
A: accumulator
Data: constant in the range of 0-255 (0-FFh)
Description: Instruction first compares the number in the accumulator with the
immediate data. If they are equal, the program proceeds with execution.
Otherwise, a jump to the specified address will be executed.
CJNE Rn,#data,rel - Compares immediate data to the register Rn and jumps
if not equal
Rn: Any R register (R0-R7)
Data: Constant in the range of 0 - 255 (0-FFh)
Description: Instruction first compares immediate data to the register Rn. If they
are equal, the program proceeds with execution. Otherwise, a jump to the
specified address will be executed.
CJNE @Ri,#data,rel - Compares immediate data to indirectly addressed
register and jumps if not equal
Ri: Register R0 or R1
Data: Constant in the range of 0 - 255 (0-FFh)
Description: This instruction first compares immediate data to indirectly
addressed register. If they are equal, the program proceeds with execution.
Otherwise, a jump to the specified address in the program will be executed.
DJNZ Rn,rel - Decrements the Rn register by 1 and jumps if not 0
Rn: any R register (R0-R7)
addr: jump address
Description: This instruction first decrements the value in the Rn register. If the result
is 0, the program proceeds with execution. Otherwise, a jump to the specified address
in the program will be executed.
Description: This instruction checks if the value stored in the accumulator is 0. If not, a
jump to the specified address will be executed. Otherwise, the program proceeds with
the first following instruction
Description: This instruction first checks whether the carry flag is set. If not, a jump to
the specified address will be executed. Otherwise, the program proceeds with the first
following instruction.
LCALL addr16 - Long subroutine call
addr16: Subroutine Address
Description: This instruction unconditionally calls a subroutine located at the specified
address.
This instructions are used to copy the content of source operand to Destination
operand
MOVC A,@A+DPTR - Moves the code byte relative to the DPTR to the
accumulator
Description: Instruction first adds the 16-bit DPTR register to the accumulator. The
result of addition is then used as a memory address from which the 8-bit data is moved
to the accumulator.
LOGIC INSTRUCTIONS
Boolean instructions/bit oriented instructions
Bit instructions
8051 programs