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VPY_assigment_2

The document outlines the course structure for a VLSI Physical Design course, specifically focusing on Week 2 assignments and topics. It includes various questions related to algorithms, floorplanning, and circuit design, along with their respective answer options. The assignment submission deadline is noted, and there are references to specific concepts in VLSI design such as the Kernighan-Lin algorithm and simulated annealing.

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R INI BHANDARI
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14 views

VPY_assigment_2

The document outlines the course structure for a VLSI Physical Design course, specifically focusing on Week 2 assignments and topics. It includes various questions related to algorithms, floorplanning, and circuit design, along with their respective answer options. The assignment submission deadline is noted, and there are references to specific concepts in VLSI design such as the Kernighan-Lin algorithm and simulated annealing.

Uploaded by

R INI BHANDARI
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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NPTEL » VLSI Physica! Design ‘About the Course Unit 4 - Week 2 ‘Course outtine Lect & Peaniaing ftscureFoopemng ‘Agere (tect 0 Pn Ascent fetes 1: Pcomei Po 1) Lec 1: Pact (Pat E tac 18 Pacer Pa 3 4 ‘ute: Wook 2Assanment 2 Tost Tarsorits Lie neraotiveSeeson Week 2 Assignment 2 ‘Ted date for submiting this asgnment ha passa Due on 2020-02-12, 23:58 IST. 'As per ourrecores you have not submtoa ths assent 9) inthe worst case, the run time of the Kernighan-Lin algorithm for partitioning increases as: ‘point ‘8 Linear in the number of circuit nodes. b._ square of the number of circuit nodes. 6. Ghbe of the number of circuit nodes. 4d, Exponential in the number of circuit nodes, t,t anor iio. Accepts Aree: 2) Consider two rectangular blocks X and Y with their centers located in the co-ordinates (20,20) 1 point ‘and (50,30) respectively during loorplanning. There are 10 wires that connect the two blocks. What willbe the wire length estimate between X and? 8. 400 units b. 487 units 600 units 4d, None of these. ‘Accent Answers: 8) Which of the following is/are true? pom a. For a planar triangulated partition graph, i is always possible to find a rectangular floorplan. ». For a planar triangulated partition graph, it may not be always possible to find a rectangular floorplan, Ifthe partition graph contains a complex triangle, its not possible to find 2 rectangular floorplan. 4 Ifthe partition graph does not contain any complex triangle, its not possible to find a rectangular floorplan, yo reves caret scp ene: © Four blocks B1, 82, B3 and B are placed in a floorplan with center co-ordinates as (10,20), 20,70), (40,20) and (60,40) respectively. The numbers of wires connecting B1 and 82 is 5, 2 and B3 is 10, B2 and BA is 7, and B1 and Bd is 3. The estimated wire length will be units, ‘copie Anewor (pet ner) 120 1 point 5) Forwhich of the following combinational ciceuit modules, will the set af input lines form a set of 1 point functionally equivalent pins? b. dinput ExOR gate 6 2t0-1 multiplexer A circuit realizing the function F=AB+B.C#AC ‘copie Answer © Consider a 4-terminal net with terminal co-ordinates (20,20), (40,20), (50/40) and (70,20), respectively. The estimated length of the net using the complete graph topology will be units. ‘copie Anewors (ype na) 1 point D Consider a 4-terminal net with terminal co-ardinates (20,10), (40,20), (50,40) and (70,20) respectively. The estimated length of the net using the semiperimeter topology will be nits. one nena incomet. ‘copie Anewors GipeRery 80 1 point © Which of the following is/are true for algorithms based on simulated annealing? pom 1, The cost of a solution sometime increase across iterations b. The probability of accepting 2 worse solution decreases as the number of ‘6. Given sufficient time, it guarantees the generation of optimum solution. 4. Allof these, t,o anomeric. ‘Aecentes Aree: % concider the farce directed placement problem apalied to a SxS grid. Assume that four black ‘ont A,B, C and D are already pre-placed on the grid locations (0,4), (2,2), (1,0) and (4,2) respectively. A nev block S is required to be placed, where the weights with respect to the already placed blocks are: wsx=12, wse=5, wsc=10, and vise=4, The zero-force target location of S (using rounding off when required) will be: (02) b. (4,2) & 2h 4. 2a) . osname. ‘Accented Aree: 1 ome 9) with respect to modeling af interconnects during placement, which ofthe following topologies ‘most closely resembles the actual routing paths? 2. Complete graph b. Minimum spanning tree Rectangular Steiner tree 4. Semirperimeter ‘Aesop Anewor

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