GOPALAN COLLEGE OF

ENGINEERING AND MANAGEMENT.

(ISO 9001:2015 certified)
Affiliated to Visvesvaraya Technological University (VTU), Belagavi, Karnataka
Recognised by Govt. of Karnataka

DEPARTMENT OF ELECTRONICS &

COMMUNICATION ENGINEERING.

Electronic Principles & Circuits.

THEORY
PRACTICAL MANUAL
BEC303

III-SEMESTER
2023-2024

81/1, 182/1, Hoodi Village, Sonnenahalli, K.R. Puram, Bengaluru, Karnataka-

560048.
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
ENGINEERING

VISION
To excel in technical education and research in the area of electronics and
communication engineering to produce skilled, trained and competent individuals with
motivation to meet the present day challenges of the society.

MISSION
M1 : To import quality education to enable students to face the challenge in the fields of
Electronics and Communication.

M2 : To develop spirit of innovation, creativities, and research among students and

faculty members.

M3 : To inculcate ethical, moral values and lifelong learning skills in students to address
the societal needs.

PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

PEO1: Recognize, synthesize and apply the acquired knowledge in basic sciences and
mathematics in solving Electronics and Communication Engineering problems.

PEO2:Inculcate the habit of team work using modern methods to achieve project
objectives.

PEO3:Involve in lifelong self-learning, career enhancement and adapt to changing

multidisciplinary professional and social needs.

PROGRAM SPECIFIC OUTCOMES (PSOs)

PSO 1: Electronics : Students will be able to apply fundamentals of electronics in various
domains of analog and digital systems.

PSO 2: Communication : Design and analyze various functional elements of different

modes of communication systems and signal processing.
PRACTICAL COMPONENT OF IPCC
(Experiments can be conducted either using any circuit simulation software or discrete
components).

Sl. Page
Experiments
NO No

Design and Test

1 (i) Bridge Rectifier with Capacitor Input Filter
(ii) Zener voltage regulator

Design and Test

2 Biased Clippers – a)Positive, b) Negative , c) Positive-Negative
Positive and Negative Clampers with and without Reference.

Plot the transfer and drain characteristics of a JFET and calculate

3 its drain resistance, mutual conductance
and amplification factor.

Plot the transfer and drain characteristics of n-channel MOSFET

4 and calculate its parameters, namely;
drain resistance, mutual conductance and amplification factor.

5 Design and test (i) Emitter Follower , (ii) Darlington Connection

Design and plot the frequency response of Common Source

6
JFET/MOSFET amplifier

Test the Op amp Comparator with zero and non zero reference and
7
obtain the Hysteresis curve.

Design and test Full wave Controlled rectifier using RC triggering

8
circuit.

Design and test Precision Half wave and full wave rectifiers using
9
Op amp

10 Design and test RC phase shift oscillator

Exp No: 1 Design and Test
(i) Bridge Rectifier with Capacitor Input Filter
(ii) Zener voltage regulator

Aim: to design and Test the Bridge Rectifier with Capacitor Input Filter
.
Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Junction Diodes IN4001N 4

2 CRO 1
30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:
Positive Half Cycle of rectifier

During the positive cycle of the AC input, the upper corner of the bridge is comparatively
positive where diodes D1 and D2 are connected. In addition, the lower corner of the bridge is
comparatively negative where diodes D3 and D4 are connected.
In this situation, the diode D2 is forward biased as its anode is connected to
comparatively higher potential and diode D1 is reversed biased as its cathode is connected to the
comparatively higher voltage. Similarly, at the lower corner, the diode D3 is forward biased as its
cathode is connected comparatively lower voltage and diode D4 is reversed biased as its anode is
connected to the comparatively higher voltage.
For the positive cycle, the current flows from the upper corner of the bridge through
diode D2, then through the load resistor from point a towards point b and diode D3, completing its
path to the lower corner.

Negative Half Cycle of rectifier:

During the negative cycle of the AC input, the upper corner of the bridge is comparatively
negative where diodes D1 and D2 are connected. In addition, the lower corner of the bridge is
comparatively positive where diodes D3 and D4 are connected.

In this situation, the diode D1 is forward biased as its cathode is connected to comparatively
lower potential and diode D2 is reversed biased as its anode is connected to the comparatively
lower voltage. Similarly, at the lower corner, the diode D4 is forward biased as its anode is
connected to a comparatively higher voltage and diode D3 is reversed biased as its cathode is
connected to the comparatively higher voltage.

For the negative cycle, the current flows from the lower corner of the bridge through diode D4,
then through the load resistor from point a towards point b and diode D1, completing its path to the
higher corner.
For a complete input sinusoidal cycle, the output of the full-wave bridge rectifier repeats twice. In
other words, the cycle of the time period of output is π instead of 2π. So, the average of the output
waveform will be,
Ripple factor of the rectifier:

Where vr(pp) is the ripple voltage (peak-peak) and vdc value of the filtered output. The
formulas for vdc and vr(pp) is given below.

Design:
Without Filter
Let Vo(dc) = 10V, Idc =100mA. for FWR output wave, Vdc= 2Vm/π

Vm = Vo(dc) x π/2 = 15.7V

Vin(rms) = Vm/√2 = 11.1V (Use 12V transformer)

Vdc=Idc x RL

So RL =Vdc/Idc = 10V/100mA =100 ohm

With Filter
Vdc=Vm-Vr(p-p)/2

Let Ripple factor, r = 0.04 or 4%, Vo(dc) = 15V , Idc =100mA

r = 1 / (4 x√3 fCRL)

Take C= 470uF
Wkt Vdc =2Vm/π Vrms= Vm/√2
Calculations:
Ripple factor, r = rms value of ac component / Value of dc component

= Vo(ac)/Vo(dc) or Iac/Idc

% Efficiency η = output power /Input power =Idc2 * 100 /( Iac2+ Idc2))

% Regulation = [(VFL –VFL)/VFL]*100

Circuit Diagram:
Nature of the waveforms:

Procedure:
1) Configure the full-wave rectifier circuit as shown in the circuit diagram. Note down all the
values of the components being used.
2) Connect the primary side of the transformer to the a.c. Mains and secondary to the input of
the circuit.
3) Measure the input a.c. voltage (Vac) and current (Iac) and the output a.c. (Vac) and d.c.
(Vdc) voltages using multimeter for at least 3 values of load resistor
(Be careful to choose proper settings of multimeter for ac and dc measurement).
4) Feed the input and output to the oscilloscope (we will use oscilloscope here only to trace
the output waveform) and save the data for each measurement. MEASURE THE INPUT
AND OUTPUT VOLTAGES SEPARATELY.
5) Multiply the Vac at the input by √2 to get the peak value and calculate Vdc Using the
formula Vdc = 2Vmax/ π. Compare this value with the measured Vdc at the output.
6) Calculate the ripple factor and efficiency.
7) Connect the capacitor across the output for each load resistor. Measure the output a.c. and
d.c. voltages once again and calculate the ripple factor. Trace the input and output
waveforms in oscilloscope and notice the change. (If time permits you could also use
different values of capacitors and study the output)
Tabulation:

Full wave Rectifiers

Readings
Vin (ac)= ------------------ VNL = -----------------( With load removed or
keeping load resistance >100K

Ripple=
RL Iac(mA) Idc(mA) Vo(dc) Vo(ac) Efficiency Regulation
Vo(ac)/Vo(dc)

with C filter
Idc(mA) Vm VR--(P--P) V(dc)= Vm- Vr--(P—P/2) Vr_rms= Vr(P—P)/(2√3) γ=Vr-rms/Vdc

Result & conclusion:

1) The bridge rectifier converts both halves of the AC input cycle into DC output
2) The rectifier uses four diodes that’s why it is considered expensive
3) The average output of the Bridge rectifier is twice that of a half-wave rectifier
4) The ripple voltage of a full-wave bridge rectifier with a capacitor filter is less than that of
a half-wave rectifier

Applications
Viva Vice:
1) Why add capacitors to a full-wave bridge rectifier?

Ans: The capacitor at the full-wave bridger rectifier smooth the pulsating DC and reduce
the ripples. As from the above formula, the ripple voltage reduces by increasing the
capacitor value.
Exp No: 1 Design and Test (ii) Zener voltage regulator
Aim: To design and Test the Zener diode can be used for voltage regulator.
Apparatus Required:

SL Equipment
NO Name of the Component Specifications/Range Quantity

1 Zener Diode 1

2 Variable DC power supply 1

30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Voltmeter, milliammeter 1 1

7 Breads board & ------------------------- 1

Connecting wires &

8 Rheostat ------------------------- 1 set

THEORY:

A Zener diode, also known as a breakdown diode, is a heavily doped semiconductor

device that is designed to act in the opposite direction. Zener diode is commonly used as a voltage
regulator to maintain a constant DC output voltage
When provided reverse bias feedback, the Zener diode operates as a voltage regulator,
generating a little leakage current till a constant voltage is achieved. A Zener diode has a typical
current flow from anode to cathode. The Zener diode behaves like a general-purpose diode with a
silicon PN junction whenever loaded in a forward direction. This forward flow can be reversed if
the voltage surpasses a particular limit. The constant voltage aids the Zener diode’s voltage
regulation.

Design:
a) Line Regulation

In this type of regulation, series resistance and load resistance are fixed, only input voltage is
changing. Output voltage remains the same as long as the input voltage is maintained above a
minimum value.

Percentage of line regulation can be calculated by =

where V0 is the output voltage and VIN is the input voltage and ΔV0 is the change in
output voltage for a particular change in input voltage ΔVIN.
b) Load Regulation

In this type of regulation, input voltage is fixed and the load resistance is varying. Output volt
remains same, as long as the load resistance is maintained above a minimum value.

Percentage of load regulation =

where is the null load resistor voltage (ie. remove the load resistance and measure the
voltage across the Zener Diode) and is the full load resistor voltage

Design a Voltage Regulator

When selecting the zener diode, be sure that its maximum power rating is not exceeded.
Imax Maximum current for Zener diode

VZ Zener Diode standard voltage

Vin Input voltage(it is known)
Vs Voltage across series resistance
VL Voltage across the load resistance
IS Current passing through the series resistance
IZ Current passing through the Zener diode
IL Current passing through the load resistance

Calculating voltage and current

The total current drawn from the source is the same as that through the series resistor

The current through the load resistor is

and the zener diode current is

If the voltage source is greater than Vz
and
If the voltage source is less than Vz

and

Circuit Diagram:

Vin = Unregulated supply Vz = Regulated supply

Working :

The capacity of a Zener diode to keep a constant voltage regardless of changes in source
or load current is critical in this application. A voltage regulation device’s general role is to give a
constant output voltage to a load connected in parallel to it, regardless of variations in the load’s
energy drawn (Load current) or fluctuations and instability in the supply voltage. If the current
remains within the limit of the min and max reverse currents, the Zener diode will produce a
constant voltage.

To restrict the current that flows through the Zener diode, a resistor is connected in
series with the diode, and also the input voltage is connected across as shown in the image,
and the output voltage is chosen to take across the Zener diode with . Because
the reverse bias features of the Zener diode are required to control the voltage, it is wired in
reverse bias mode, and with a cathode linked to the circuit’s positive rail.

Whenever the load is connected, a small valued resistor would result in a big diode current
and electricity, which would raise the power dissipation need of the diode, which could exceed the
Zener’s maximum power rating and harm it.

The value of the resistor can be determined by the formula.

Where, is the value of series resistance and is the input voltage and is Zener voltage.
Using this method, it is simple to assure that the resistor value chosen does not result in a current
flow greater than the Zener can tolerate.

One minor issue with Zener diode-based regulatory circuits is that although attempting to
moderate the input voltage, the Zener might generate electrical noise just on the supply rail.
Although it may not be a problem in most cases, a big value decoupling capacitor placed across
the diode may address the problem. This helps to keep the Zener’s output stable.

OR
Zener diode is a P-N junction diode specially designed to operate in the reverse biased
mode. It is acting as normal diode while forward biasing. It has a particular voltage known as break
down voltage, at which the diode break downs while reverse biased. In the case of normal diodes
the diode damages at the break down voltage. But Zener diode is specially designed to operate in
the reverse breakdown region.

The basic principle of Zener diode is the Zener breakdown. When a diode is heavily
doped, it’s depletion region will be narrow. When a high reverse voltage is applied across the
junction, there will be very strong electric field at the junction. And the electron hole pair generation
takes place. Thus heavy current flows. This is known as Zener break down.
So a Zener diode, in a forward biased condition acts as a normal diode. In reverse
biased mode, after the break down of junction current through diode increases sharply. But the
voltage across it remains constant. This principle is used in voltage regulator using Zener diodes.
The figure shows the zener voltage regulator, it consists of a current limiting resistor RS
connected in series with the input voltage Vs and zener diode is connected in parallel with the load
RL in reverse biased condition. The output voltage is always selected with a breakdown voltage
Vz of the diode

Procedure:

Tabulation:

Result & conclusion:

Application of Zener Diode as a Voltage Regulator

The following are some of the most important applications of a Zener voltage regulator.

1) Within the emitter follower regulator, a Zener voltage regulator is used.

2) It is utilised with a modest load current range and maintains a steady output DC voltage.
3) It is used to control or change the circuit’s output voltage.
4) It is employed in analog and digital circuits that need to be precise with their references.
5) It is utilised in current source and sink circuits.
6) It is used to fine-tune linear and switch power supply voltage and current.
7) Error amplifiers use it as well.

Viva Vice:
Exp No: 2 Design and Test
Biased Clippers – a)Positive, b) Negative , c) Positive-Negative
Positive and Negative Clampers with and without Reference.

Aim: To design and Test the Biased Clippers – a)Positive, b) Negative , c) Positive-Negative
Positive and Negative Clampers with and without Reference .
Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Junction Diodes IN4001N 4

2 CRO 1
30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:

SERIES POSITIVE CLIPPER.

I ) in a series positive clipper, a diode is connected in series with the output, as shown in
Fig 1(a). During the positive half of the input voltage, terminal A is positive with respect to B. This
reverse biases the diode and it acts as an open switch Therefore all the applied voltage drops
across the diode and none across the resistor As a result of this there is no output voltage during
the positive half cycle of the input voltage.
During the negative half cycle of the input voltage, terminal B is positive with respect to
A. Therefore it forward biases the diode and it acts as a closed switch. Thus there is no voltage
drop across the diode during the negative half cycle of the input voltage. All the input voltage is
dropped across the resistor as shown in the output waveform.

Clippers prevent either or both polarities of a wave from exceeding a specific amplitude
level. However, a positive Clipper is that which removes or clips the positive half completely.
Hence the circuit of the Fig 2.1 is called a positive Clipper Here it may be noted the diode acts as
a series switch between the source and load. Due to this reason, the circuit is called a series
positive clipper.

Merits:

1) Clips the positive peaks of the input signal to a preset clipping level
2) Produces a clipped output waveform symmetrical around 0 volts
3) A simple circuit using just a diode, resistor, and voltage source
4) The clipping level is easily adjusted via the DC bias voltage
5) Can modify waveform shape and reduce the peak-to-average ratio
6) Often used for AM modulation to limit modulation index

Demerits:

1) Distorts the signal by flattening/clipping positive peaks

2) May introduce high-frequency harmonics due to clipping
3) Clipper output still contains negative peaks of the input signal
4) Clipping level very sensitive to diode forward voltage drop
5) Power dissipation across the diode if clipping large signals
6) Input and output impedance mismatch can distort wave shapes

Applications of Series Positive Clipper Circuits

AM Radio Transmitters

1) Used to limit audio modulation index to 100%

2) Clips positive audio peaks to prevent over-modulation
3) Keeps transmitted signal within the bandwidth

Waveform Clamping

1) Clips signals to precise voltage levels

2) Shifts waveform vertically by controlling clip level
3) Creates precise trigger levels for digital circuits

Peak Reduction

1) Reduces peak-to-average power ratio

2) Allows transmitting higher average power in radio systems
3) Prevents signal peaks from causing distortions

Wave Shaping

1) Modifies waveform by flattening tops of peaks

2) Changes waveshape to approach square or trapezoid
3) Alters harmonics and frequency content

Noise Reduction

1) Clipping can reduce noise and hum amplitude

2) Lower noise peaks result in a higher signal-to-noise ratio.
II) SERIES-POSITIVE CLIPPER WITH BIAS

The clipping takes place during the positive cycle only when the input voltage is greater than the
battery voltage (i.e. Vi > VB). The chipping level can be shifted up or down by varying the bias voltage (V B)

III) SERIES NEGATIVE CLIPPER

During the positive half cycle of the voltage, terminal A is positive with respect to
terminal B There for the diode is forward biased and it acts it as a closed switch As a result, all the
input voltage appears across the resistor as shown in Fig 3(b). During the negative half cycle of
the input voltage, terminal B is positive with respect to the terminal A. Therefore the diode is
reverse biased and it acts as an open switch, Thus there is no voltage drop across the resistor
during the negative half cycle as shown in the output waveform.

It may be observed that if it is desired to remove or clip the negative half-cycle of the
input, the only thing to be done is to reverse the polarities of the diode in the circuit shown in Fig 1
such a clipper is then called a series negative clipper
Merits:

 Clips the negative peaks of the input signal to a set clipping level
 Produces a clipped waveform symmetrical around 0 volts
 A simple circuit using a diode, resistor, and DC bias voltage
 The clipping level is easily adjusted via the bias voltage
 Can modify waveform shape and reduce the peak-to-average ratio
 Often used in AM transmitters to limit modulation index

Demerits:

 Distorts signal by flattening/clipping negative peaks

 May introduce high-frequency harmonics due to clipping
 The output signal retains positive peaks of the input waveform
 Clipping level very sensitive to diode forward voltage drop
 Power dissipation in diode for large input signals
 Impedance mismatch can further distort the clipped shape

IV) SERIES-NEGATIVE CLIPPER WITH BIAS

In this circuit, clipping takes place during the negative half cycle only when the input
voltage Vi > VB the clipping level can be shifted up or down by varying the bias voltage ( -VB)
V) SHUNT OR PARALLEL POSITIVE CLIPPER

A parallel clipper circuit uses the same diode theory and circuit operation a resistor and
diode are connected in series with the input signal and the output signal is developed across the
diode. The output is in parallel with the diode hence the circuit name is parallel clipper the parallel
clipper can limit either the positive or negative alternation of the input signal Fig shows the circuit
of a shunt positive clipper In this circuit. The diode acts as a closed switch when the input voltage
is positive (i.e. Vi > 0 and as an open switch when the input voltage is negative (i.e. V i< 0) the
output waveform is the same as that of a series positive clipper in the parallel clippers the alp will
develop when the diode is cut off.

VI) SHUNT OR PARALLEL POSITIVE CLIPPER WITH BIAS

The positive terminal of the battery is connected to the cathode of the diode. This
causes the diode to be reversed-biased at all times except when the input signal is more positive
than the bias voltage(i e Vi > VB). it will be interesting to know that if the polarity of the bias voltage
is reversed, the resulting circuits will be as shown in (b) Here the input signal lying above the
voltage —VB has clipped the waveforms of the output voltage is also shown with figures.
VII) SHUNT OR PARALLEL NEGATIVE CLIPPER

The negative clipper has allowed to pass the positive half cycle of the input voltage and
clipped the negative half cycle completely Fig shows the shunt (parallel) negative clipper.

In such a circuit the diode acts as a closed switch for a negative input voltage (i.e. V i <
O) and as an open switch for a positive input voltage (i.e. V i O) the output waveform of the Circuit
is the same as that of the series negative clipper.

VIII) SHUNT OR PARALLEL NEGATIVE CLIPPER WITH BIAS

In such a circuit clipping take place during the negative half cycle only when the input
voltage (Vi < VB) the clipping level can be shifted up or down by varying the bias voltage (—VB). It
will be interesting to know that if the polarity of the bias voltage is reversed, then the resulting
circuits will be as shown in Fig 8 (b) Here the entire signal below the voltage level VII has been
clipped off.
IV) DUAL (COMBINATION) DIODE CLIPPER
The type of clipper combines a parallel negative clipper with a negative bias (D 1 and B2)
and a parallel positive bias (D 1 and B1). Hence the combination of a biased positive clipper and a
biased negative clipper is called a combination or dual diode clipper. Such a clipper circuit can clip
at both two dependent levels depending upon the bias voltages. Fig 9(a) shows the circuit of a
dual (combination) clipper.

Let us suppose a sinusoidal ac voltage is applied at the input terminals of the circuit.
Then during the positive half cycle, the diode D 1 is forward biased, while diode D2 is reverse.
biased. Therefore the diode D1 will conduct and will act as a short circuit. On the other hand, diode
D2 will act as an open circuit. However, the value of output voltage cannot exceed the voltage level
of VB1 as Shown in Fig .

Similarly, during the negative input half-cycle, diode D2 acts as a short circuit while the
diode D1 as an open circuit However the value of output voltage cannot exceed the voltage level of
VB2 It may be noted that the clipping levels of the circuit be varied by changing the values of
VB1 and VB2 If the values of VB1 and VB2 are equal, the circuit will clip both the positive and
negative half cycles at the same voltage level. Such a circuit is known as a symmetrical clipper

Clamping Circuits
A circuit that places either the positive or negative peak of a signal at a desired D.C level is known
as a clamping circuit. A clamping circuit introduces (or restores) a D.C level to an A.C signal. Thus
a clamping circuit is also known as D.C restorer, or D.C reinserted or a baseline stabilizer. The
following are two general types of clamping.

1. Positive clamping occurs when negative peaks raised or clamped to ground or on the zero
level In other words, it pushes the signal upwards so that negative peaks fall on the zero
level.
2. Negative clamping occurs when positive peaks raised or clamped to ground or on the zero
level In other words, it pushes the signal downwards so that the positive peaks fall on the
zero level.
I) POSITIVE CLAMPER

During the negative half cycle of the input voltage, the diode conducts heavily and behaves
as a closed switch At the negative peak, the capacitor is charged to maximum voltage V slightly
beyond the negative peak, the diode is shunt off and the capacitor charged to Vm behaves as a
battery during the positive half cycle of the input signal. The diode is reversed biased and the
output voltage will be equal to Vm + V this gives positive clamped voltage and is called positive
clamper circuit.

II) Positive Clamper With Bias

The circuit of positive clamper with positive biased Here a battery of 10 V is added in such a
way that the clamping take place positively at 10V. Similarly, it is possible to clamp the input wave
form positively at -10V by reversing the battery connections.
III) NEGATIVE CLAMPER

A negative clamper during the positive half cycle of the input signal, the capacitor is
charged to Vm, with the polarity shown in Fig . Observe that voltage across the capacitor is
opposing the input voltage V. This gives negative clamped voltage and is called negative clamper
circuit.

Negative Clamper With Bias

The circuit of negative clamper with positive bias. With no input signal the capacitor
charges to the battery voltage and the output is positive because the negative side of the batter is
grounded. The output waveform is clamped to +10V, the value of the battery. Since this is a
negative clamper (cathode to ground), the top of the output wave touch the +10V reference line.

USES OF CLAMPING CIRCUITS

Clamping circuit are used to shift any part of the input signal waveform and can be
maintained at a specified voltage level Such circuit are used in television receivers to restore the
original d.c reference signal (corresponding to the brightness level of the picture) to the video
Signal The clamping of peak (i.e. 2Vm, 3Vm, 4Vm etc.,) Such to circuit are known as voltage
multipliers These circuit are used to supply power to thigh voltage/low current devices like cathode
ray tubes used in Television receivers, oscilloscopes and computer displays.

Voltage Multiplier
Voltage multiplier is a circuit which produces an output d.c voltage whose value is a multiple of
peak a.c input voltage (i.e., 2Vm, 3Vm, 4Vm and so on). SILK circuits are used as a power supply
for high voltage/low current device like cathode ray tubes.
Exp No: 3 Plot the transfer and drain characteristics of a JFET and
calculate its drain resistance, mutual conductance and amplification factor.
AIM: a) To Draw the drain and transfer characteristics of a given FET.
b) To find the drain resistance (rd) amplification factor (μ) and Tran conductance (g m) of a given
FET. Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 FET BFW-10 1

2 CRO 1
30 MHz
3 Regulated power supply 9--9 / 12--12 1

4 Voltmeter 1 each
(0-20V)
5 Ammeter 1 each
(0- 100mA),
6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:
The Field Effect Transistor or Simply FET uses the voltage that is applied to their input
terminal, called the Gate to control the current flowing through them resulting in the output current
being proportional to the input voltage, the Gates to source junction of the FET is always reversed
biased. As their operation relies on an electric field (hence the name field effect) generated by the
input Gate voltage, this then makes the Field Effect Transistor a “VOLTAGE” operated device. The
Field Effect Transistor is a three terminal unipolar semiconductor device that has very similar
characteristics to those of their Bipolar Transistor counterpart’s i.e., high efficiency, instant
operation, robust and cheap and can be used in most electronic circuit applications to replace their
equivalent bipolar junction transistors (BJT). The Field Effect Transistor has one major advantage
over its standard bipolar transistor, in that input impedance, (R in) is very high, (thousands of
Ohms). This very high input impedance makes them very sensitive to input voltage signals. There
are two basic configurations of junction field effect transistor, the N-channel JFET and the P-
channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the
flow of current through the channel is negative (hence the term N-channel) in the form of
electrons. A FET is a three terminal device, having the characteristics of high input impedance and
less noise, the Gate to Source junction of the FET is always reverse biased. In amplifier
application,
the FET is always used in the region beyond the pinch-off.

The characteristics curves example shown above, shows the four different regions of operation for
a JFET and these are given as: Ohmic Region-When VGS =0 the depletion layer of the channel is
very small and the JFET acts like a voltage controlled resistor. Cutoff region- This is also known as
the pinch-off region were the Gate Voltage, VGS is sufficient to cause the JFET to act as an open
circuit as the channel resistance is at maximum. Saturation or Active Region – The JFET becomes
a good conductor and is controlled by the Gate-Source voltage, (VGS) while the Drain-Source
voltage, (VDS) has little or no effect. Breakdown Region-The voltage between the Drain and the
Source, (VDS) is high enough to causes the JFET’s resistive channel to break down and pass
uncontrolled maximum current.

Circuit Diagram

PROCEDURE:
1) All the connections are made as per the circuit diagram.
2) To plot the drain characteristics keep VGS constant at 0V.
3) Vary the VDS and observe the values of VDS and ID.
4) Repeat the above steps 2, 3 for different values of VGS.
5) All the readings are tabulated.
6) To plot the transfer characteristics, keep VDS constant at 1V.
7) Vary VGS and observe the values of VGS and ID.
8) Repeat steps 6 and 7 for different values of VDS.
9) The readings are tabulated.
10) From drain characteristics, calculate the values of dynamic resistance (rd) by using
the formula rd=∆ DS∆ D
11) From transfer characteristics, calculate the value of trans conductance (gm) By using
the gm) =∆ D/∆VGS.
12) Amplification factor (μ) = ∆ DS /∆VGS.
Tabulation
DRAIN CHARACTERISTICS

VGS=0V VGS=-0.5 V VGS=-1 V VGS=-1.5 V VGS=-2.0 V

VDS in ID in VDS in ID in VDS in ID in VDS in ID in VDS in ID in
volts mA volts mA volts mA volts mA volts mA

TRANSFER CHARACTERISTICS
VGS=-0.5 V VGS=-1 V VGS=-1.5 V VGS=-2.0 V
VDS in ID in mA VDS in ID in mA VDS in ID in mA VDS in ID in mA
volts volts volts volts

Result and conclusion:

EXP 4 : Plot the transfer and drain characteristics of n-channel
MOSFET and calculate its parameters, namely; drain resistance, mutual
conductance and amplification factor.

Aim: Plot the transfer and drain characteristics of n-channel MOSFET and calculate its
parameters, namely; drain resistance, mutual conductance and amplification factor.

Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Junction Diodes IN4001N 4

2 CRO 1
30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:
Transistors. Because these two terminals are normally connected to each other (short-
circuited) internally, only three terminals appear in electrical diagrams. The MOSFET is by far the
most common transistor in both digital and analog circuits, though the bipolar junction transistor
was at one time much more common.

The main advantage of a MOSFET over a regular transistor is that it requires very little current
to turn on (less than 1mA), while delivering a much higher current to a load (10 to 50A or more).

In enhancement mode MOSFETs, a voltage drop across the oxide induces a conducting channel
between the source and drain contacts via the field effect. The term "enhancement mode" refers to
the increase of conductivity with increase in oxide field that adds carriers to the channel, also
referred to as the inversion layer. The channel can contain electrons (called an nMOSFET or
nMOS), or holes (called a pMOSFET or pMOS), opposite in type to the substrate, so nMOS is
made with a p-type substrate, and pMOS with an n-type substrate (see article on semiconductor
devices). In the less common depletion mode MOSFET, detailed later on, the channel consists of
carriers in a surface impurity layer of opposite type to the substrate, and conductivity is decreased
by application of a field that depletes carriers from this surface layer.
Circuit Diagram

Procedure:
Step 1: start by Designing the circuit using bread board

Step 2: Note down the readings

Step 3: do the calculations for drain resistance, mutual conductance and amplification factor.

Step 4: Disconnect the circuit.

Observation
Drain characteristics
1. Connect the circuit as per the circuit diagram.
2. Set the gate voltage VGS =0V.
3. Vary the VDS in steps of 1V and note down the corresponding Id.
4. Repeat the same procedure for VGS =-1V.
5. Plot the graph for VDS Vs Id for constant VGS.

VGS = 0V VGS = -1V

ID = (mA) VDS = (V) ID = (mA)
VDS = (V)

Transfer characteristics
1. Connect the circuit as per the circuit diagram.
2. Set the drain voltage VDS =5V.
3. Vary the VGS in steps of 1V and note down the corresponding Id.
4. Repeat the same procedure for VDS =10V.
5. Plot the graph for VGS Vs Id for constant VDS.

VDS = 5 V VDS = 10 V
ID = (mA) ID = (mA)
VGS = 0V VGS = 0V
Graph:
Output characteristics: Input characteristics:

FET Parameter Calculations:

Drain Resistance rd= ΔVDS/ ΔId

Tran conductance gm= ΔId/ ΔVGS

Amplification Factor=μ= rd* gm

Result: Thus the drain and transfer characteristics of given FET is plotted.

Drain Resistance rd=

Tran conductance gm=

Amplification Factor=μ=
EXP 5 : Design and test (i) Emitter Follower ,

Theory : important features of Emitter Follower are −

1) It has high input impedance

2) It has low output impedance
3) It is ideal circuit for impedance matching

All these ideal features allow many applications for the emitter follower circuit. This is a current
amplifier circuit that has no voltage gain.

Construction

The constructional details of an emitter follower circuit are nearly similar to a normal
amplifier. The main difference is that the load RL is absent at the collector terminal, but present at
the emitter terminal of the circuit. Thus the output is taken from the emitter terminal instead of
collector terminal.

The biasing is provided either by base resistor method or by potential divider method. The
following figure shows the circuit diagram of an Emitter Follower.

Operation
The input signal voltage applied between base and emitter, develops an output voltage V o across
RE, which is in the emitter section. Therefore,

Vo=IERE

The whole of this output current is applied to the input through feedback. Hence,

Vf=Vo
As the output voltage developed across RL is proportional to the emitter current, this emitter
follower circuit is a current feedback circuit. Hence,

β= Vf / Vo=1

It is also noted that the input signal voltage to the transistor (= V i) is equal to the difference of
Vs and Vo i.e.,

Vi=Vs−Vo

Hence the feedback is negative.

The major characteristics of the emitter follower are as follows −

1. No voltage gain. In fact, the voltage gain is nearly 1.

2. Relatively high current gain and power gain.
3. High input impedance and low output impedance.
4. Input and output ac voltages are in phase.

(ii) Darlington Connection.

Theory:
The emitter follower has reasonably high input impedance and may be used wherever input
impedance up to about 500 K Ohms is needed. For higher input impedance, we may use 2
transistors to form what is called a Darlington pair. When the output is taken from the Emitter
terminal of the transistor, the network is referred to as an Emitter follower. The output voltage is
always less than the input voltage due to the drop between the base and emitter. However, the
voltage gain is usually approximated to one. In addition, the output is having the same polarity as
the input voltage. Hence it is said to follow the input voltage with an in-phase relationship. This
accounts for the terminology ‘Emitter – follower’. For ac analysis, the collector is grounded,
therefore the circuit is actually a common-collector configuration. This circuit presents high
impedance at the input and low impedance at the output. It is therefore frequently used for
impedance matching purposes, where a load is matched to the source impedance for maximum
signal transfer through the system.
The Darlington connection shown is a connection of two transistors whose result is a
current gain that is the product of the current gains of the individual transistors. Hence the
Darlington pair operates as one ‘Super beta’ transistor offering a very high current gain. Thus the
Darlington Emitter follower is a CC configuration that has the following characteristics:

1) Voltage gain → almost unity

2) Current gain →very high, a few thousands

3) Input impedance → high, hundreds of Kilo ohms

4) Output impedance → low, tens of ohms

Darlington Emitter follower with Bootstrap
The biasing network reduces the input impedance of the amplifier. This is because
of the considerable amount of current it takes. By h parameter model input impedance is the
parallel combination of input resistance of the transistor and of the biasing network. The biasing
network resistance is always less than the resistance of the transistor. To improve the resistance
of the circuit, a series circuit consisting of a resistor and a capacitor is connected between the
emitter and the base. This process of connecting output to input through a resistor under ac
conditions is called Bootstrapping
Darlington emitter follower without bootstrap
Procedure:
1. To find Q-point: Connect the circuit without Ac supply .Set Vcc=10V. Measure the DC voltage
(using CRO/multimeter) at the (VB2), Collector (VC2) emitter (VE2) w.r.t ground. Then determine
VCE2= VC2 – VE2, IC2=IE2=VE2 / RE
2. Q point = (Vce2, Ic2)
3. Connect the signal generator and apply a sine wave of peak-to-peak amplitude 1V, 1kHz from
the signal generator and note down the output wave form.
4. Gradually increase the input signal until the output signal get distorted. When this happens
slightly reduce the input signal amplitude such that output is maximum undistorted signal. Then
measure the magnitude of the input and output waveform. Calculate the Voltage gain.
5. Connect the bootstrap circuit Rb and Cb between the emitter and base as shown in the circuit.
Repeat the steps 3 to 5

To measure Zi and Zo:

Procedure
1. Connect the circuit as shown in figure.
2. Set the DRB to minimum resistance (0Ω), I/P sine wave amplitude to 1V p-p, I/P sine wave
frequency to 10 KHz.
3. Measure Vo (p-p). Let Vo=Va
4. Increase DRB till Vo=Va/2.the corresponding DRB value gives Zi.
To measure Zo (Output Impedance):
Procedure:
1. Connect the circuit as shown in figure. Set the DRB to its maximum resistance value, I/P sine
wave amplitude to 1V p-p, Frequency to 10 KHz.
2. Measure Vo p-p, let Vo = Vb
3. Decrease DRB till Vo =Vb/2.

The corresponding DRB value gives Zo.

To find the current gain:

Ai=Io/Ii= (Vo/Zo)/(Vi/Zi) = (Vo/Vi) * (Zi/Zo)

Current gain Ai ≈ Zi / Zo, since (Vo/Vi) = 1

Darlington emitter follower without bootstrap

Vi=signal generator 1v(p-p), Vo = measured using CRO, R1 = 1MΩ, R2 = 1.5 MΩ, Re= 2.2kΩ,
Vcc = 10V, C1 = C2 =0.1 µ F (ceramic).

To measure Zi and Zo

To measure Zi (Input Impedance)

To measure Zo (Output Impedance)

Darlington emitter follower without bootstrap

Design of Bias circuit

Let Vce = 5V, Icq=2mA, β= 100 (Q point of transistor Q2)

Then Vcc = 2Vce=2 x 5 =10V

Ie = Ic = 2 mA

VRe = Vcc - Vce= 10 – 5 = 5V

Re= VRe / Ie = 5V / (2mA) = 2.2K Ω (Choose

VR2 -Vbe1 - Vbe2 – VR3 = 0 and VR2 = Vbe1 + Vbe2 + VRe

= 0.6 + 0.6 + (Ie.Re)

= 1.2 + (5) = 6.2V

VCC = VR1 + VR2

VR1= Vcc – VR2 = 10 – 6.2 = 3.8 V

Ie1= Ib2 = Ic / hfe = 2 mA / 100 = 0.2mA.

Ib1=Ie1 / hfe = 0.2mA / 100 = 0.02mA

R1 = VR1/ (10 (Ib1)) = 3.8 / (10 x 0.02mA) = 1.9 MΩ Choose R1=1 MΩ

R2= VR2 / (9 Ib) = 7.2 / (9 x 0.02mA) = 3.4 MΩ Choose R2=1.5 MΩ

Result: Thus the Darlington’s Emitter follower was designed and studied

Parameters
Av=Vo/Vi Zi Zo Ai

Without Bootstrap

With Bootstrap
Exp No: 6 Design, setup and plot the frequency response of
Common Source JFET/MOSFET amplifier and obtain the bandwidth.

Aim:
Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Junction Diodes IN4001N 4

2 CRO 1
30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:
with the field effect transistor (FET) , the use of RC coupling can present quite a
problem when a load resistance is placed in the drain current. Drain current is set by the bias
voltage applied to the gate of the FET and unfortunately the drain current versus gate voltage
characteristic of the FET varies from sample to sample of the same transistor type. If a resistance
loaded drain is used, gate bias must be set to suit the individual transistor. Resistor Rs is used to
provide DC feedback for stabilization of the operating point but this must be by-passed by
capacitor Cs to prevent negative feedback at signal frequency. The value of Cs should be selected
such that its reactance is not greater than one tenth of the value of Re at the lowest frequency of
operation.

Capacitor C3 provides DC isolation between the collector circuit and the following
load circuit or following stage.
Circuit Diagram

Vi=signal generator 100mv(p-p), Vo = measured using CRO, RG=2.2MΩ,

RD=2.7KΩ, Rs=1KΩ,
RL=10KΩ, Cs=47μF (electrolytic), Cc1= Cc2 = 0.1 μ F (ceramic).

To measure Zi

To measure Zo:

Tabular column:

Take the readings for 100 Hz to 1MHz in 100kHz steps, Note down Vi (P-P)……

Frequency (Hz) Output Voltage Voltage Gain Gain in dB=20 log (Vo/Vi)
(P-P) (Volts) Av=Vs/Vi
Design:
Assume the gain of the FET amplifier to be equal to 10
From specifications of FET BFW 10,
Let ID = 2mA , IDSS = 10mA, VP = -3V VGS = -2V
Let VDD= 10V then VDS= 10/2 = 5V
ID= IDSS[1-VGS/VP]2
Simplifying we get VGS=1.67V
We know Vs = ID × Rs
Assuming ID = Is=2mA
Vs = Is × Rs
Therefore Rs = Vs = -VGS = 1.67 = 820Ω
Is Is 2mA
To find RD,

VDD = VDS+ID*RD+Vs
RD = [VDD - VDS - Vs ]/ ID = [10-5-1.67]/2mA= 1.6 KΩ
Choose RD=1.5KΩ
The input resistance of FET is very high hence R G=2MΩ
Choose RG=2.2MΩ
Bypass capacitor CS=0.22µF
Coupling capacitors CC1 = CC2 = 0.1µF

Frequency Response.

f1: Lower Cut-Off Frequency

f2: Higher Cut-Off Frequency
AV:Voltage Gain = 20log10(V0/Vi)
AVmid: Voltage Gain at mid-band
f2-f1:Band width of the amplifier 3dB = 20log10(0.707)
Procedure:
1. Connect the circuit as shown above.
2. Apply a sine wave signal of amplitude 100 mV from signal generator.
3. Keep the frequency of the signal generator in mid band range i.e., around 2 KHz. Increase
amplitude of the input signal till the output signal is undistorted.(CRO at output).
4. Measure Vi amplitude =__________V for corresponding maximum undistorted output.
5. Measure Vo amplitude =__________V
6. The ratio of (Vo/Vi) max gives the maximum undistorted gain of the amplifier.
7. Now vary the input sine wave frequency from 100 Hz to 1 MHz in suitable steps. Measure
output voltage amplitude at each step using CRO.(See that amplitude of Vi remains constant
throughout the frequency range.)
8. Tabulate the results in the tabular column shown below.
9. Plot the frequency response i.e., frequency versus Gain in dB, determine Bandwidth and G.B.W
product.
To measure Zi:
Procedure:
1. Connect the circuit as shown in above figure
2. Set the following
 DRB to 0Ω
 Input sine wave amplitude to say 50 mV
 Input sine wave frequency to any mid frequency say 10 KHz.
3. Measure amplitude of Vop-p. Let Vo=Va say
4. Increase DRB (keeping Vi constant) till Vo=Va/2.The corresponding DRB gives the input
impedance Zi in RC coupled amplifier

To measure Zo:
Procedure:
1. Connect the circuit as shown in the above figure
2. Set the following
 DRB to its maximum resistance value.
 Input sine wave amplitude to about 50 mV
 Input sine wave frequency to 10 KHz.
3. Measure Vop-p. Let Vo=Vb
4. Decrease DRB from its maximum value till Vo=Vb/2.The corresponding DRB gives the output
impedance Zo.

Result:-
Thus the single stage FET Amplifier was designed and studied.

Gain =
Bandwidth =
Gain-Bandwidth product =
Input Impedance =
Output Impedance =
EXP NO 7: Test the Op amp Comparator with zero and non
zero reference and obtain the Hysteresis curve.

Circuit Diagram:

Inverting Op-amp Comparator with Hysteresis

For the inverting comparator circuit above, VIN is applied to the inverting input of the op-
amp. Resistors R1 and R2 form a voltage divider network across the comparator providing the
positive feedback with part of the output voltage appearing at the non-inverting input. The amount
of feedback to the non-inverting input is determined by the resistive ratio of the two resistors used
and which is given as:

Voltage Divider Equation

Where: β (beta) can be used to indicate the feedback fraction.

When the input signal is less than the reference voltage, VIN < VREF, the output
voltage will be HIGH, VOH and equal to the positive saturation voltage. As the output is HIGH and
positive, the value of the reference voltage on the non-inverting input will be approximately equal
to: +β*V called the Upper Trip Point or UTP.
As the input signal, VIN increases it becomes equal too this upper trip point
voltage, VUTP level at the non-inverting input. This causes the comparators output to change state
becoming LOW, VOL and equal to the negative saturation voltage as before.
But the difference this time is that a second trip point voltage value is created because a
negative voltage now appears at the non-inverting input which is equal to: -β*V as a result of the
negative saturation voltage at the output. Then the input signal must now fall below this second
voltage level, called the Lower Trip Point or LTP for the voltage comparators output to change or
switch back to its original positive state.
So we can see that when the output changes state, the reference voltage at the non-
inverting input also changes creating two different reference voltage values and two different
switching points. One point being called the Upper Trip Point (UTP), while the other is called
the Lower Trip Point (LTP). The difference between these two trip points is known as Hysteresis.
The amount of hysteresis is determined by the feedback fraction, β of the output voltage
fed back to the non-inverting input. The advantage of positive feedback is that the resulting
comparator Schmitt trigger circuit is immune to erratic triggering caused by noise or slowly
changing input signals within the hysteresis band producing a cleaner output signal as the op-amp
comparators output is only triggered once.
So for positive output voltages, VREF = +β*Vcc, but for negative output voltages, VREF = -
β*Vcc. Then we can say that the amount of voltage hysteresis will be given as:

An operational amplifier is to be used with positive feedback to

produce a Schmitt trigger circuit. If resistor, R1 = 10kΩ and resistor, R2 = 90kΩ,
what will be the values of the upper and lower switching points of the reference
voltage and the width of the hysteresis if the op-amp is connected to a
dual ±10v power supply.
Given: R1 = 10kΩ, R2 = 90kΩ. Power supply +Vcc = 10v and -Vcc = 10v.
Feedback fraction
Then the reference voltage VREF, switches between +1V and -1V as the output saturates
from one level to the other. Hopefully we can see from this simple example that the width of this
hysteresis, 2 volts in total, can be made larger or smaller simply by adjusting the voltage divider
ratio of the feedback resistors R1 and R2.
NO 8:
Design and test Full wave Controlled rectifier using RC triggering circuit.

Aim: Design and test Full wave Controlled rectifier using RC triggering circuit.

Apparatus Required:

Equipment
S L NO Name of the Component Quantity
Specifications/Range

1 Diodes BY127 4

2 CRO 1
30 MHz
3 SCR TYN 616 1

4 Resistors 1 each
1K, 470K Pot
5 Capacitor 1 each
0.1 µF
6 Multimeter 1 1

7 Breads board & LAMP 100W 1 each

Connecting wires & CRO

8 ------------------------- 1 set
Probes

THEORY:
Procedure

1) Conduct the circuit as shown in the circuit diagram

2) Very the pot meter R1 gradually in step by step, note down the corresponding values of Vn & Vm
from CRO and Vodc from the DC voltmeter. The readings are tabulated in the tabular column.

3) If the firing angle ranges from 0 to , then the firing angle α is calculated by using

a formula in degrees.

4) The conduction angle β is calculated by using a formula, β = 180 - α.

5) The current and power is calculated by Watts respectively.

6) A graph of Vo v/s α, Vo v/s β, Io v/s α, Io v/s β, Podc v/s α, Podc v/s β are to be
plotted.

7) Compare practical output voltage with theoretical output voltage,

8) Repeat the steps 1 and 2 for different values of alpha by verying the pot Meter
resistance.

9) Draw the waveforms.

Tabular column

Time in (ms) Firing angle α Conduction angle β Average Voltage

(DC output)
Expected waveform:
EXP 9. Design and test Precision Half wave and full wave
rectifiers using Op amp.
Aim: to design and Test the Precision Half wave and full wave rectifiers using Op
amp .
Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Junction Diodes IN4001N 4

2 CRO 1
30 MHz
3 A step-down transformer, 9-0-9 / 12-0-12 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:

A half wave rectifier is a rectifier that produces positive half cycles at the output for
one half cycle of the input and zero output for the other half cycle of the input.

Observe that the circuit diagram of a half wave rectifier shown above looks like an
inverting amplifier, with two diodes D1 and D2 in addition.

The working of the half wave rectifier circuit shown above is explained below

1) For the positive half cycle of the sinusoidal input, the output of the op-amp will be
negative. Hence, diode D1 will be forward biased.
2) When diode D1 is in forward bias, output voltage of the op-amp will be -0.7 V. So, diode
D2 will be reverse biased. Hence, the output voltage of the above circuit is zero volts.
3) Therefore, there is no (zero) output of half wave rectifier for the positive half cycle of a
sinusoidal input.
4) For the negative half cycle of sinusoidal input, the output of the op-amp will be positive.
Hence, the diodes D1 and D2 will be reverse biased and forward biased respectively. So,
the output voltage of above circuit will be −
5) Therefore, the output of a half wave rectifier will be a positive half cycle for a negative
half cycle of the sinusoidal input.

Circuit Diagram of Precision Half wave Rectifier

Circuit Diagram of Precision Full wave Rectifier

The above circuit diagram consists of two op-amps, two diodes, D1 & D2 and five
resistors, R1 to R5. The working of the full wave rectifier circuit shown above is explained below –

1) For the positive half cycle of a sinusoidal input, the output of the first op-amp will be
negative. Hence, diodes D1 and D2 will be forward biased and reverse biased respectively.
2) Then, the output voltage of the first op-amp will be −
3) Observe that the output of the first op-amp is connected to a resistor R4, which is connected
to the inverting terminal of the second op-amp. The voltage present at the non-inverting
terminal of second op-amp is 0 V. So, the second op-amp with resistors, R4 and R4 acts as
an inverting amplifier.
4) The output voltage of the second op-amp will be

Applications: The precision diodes are used in

1) half wave rectifier,

2) Full-wave rectifier,

3) peak value detector,

4) Clipper and clamper circuits.

Exp No: 10 Design and set-up the RC-Phase shift
Oscillator using FET, and calculate the frequency of output
waveform.
Aim: To Design and testing for the performance of BJT-RC Phase shift Oscillator for
f0 <10k Hz.

Apparatus Required:

Equipment
S L NO Name of the Component Specifications/Range Quantity

1 Transistor SL100 1

2 CRO 1
30 MHz
3 Power supply (0-30V) 1

4 Resistors 1 each

5 Capacitor 1 each

6 Multimeter 1 1

7 Breads board & ------------------------- 1

Connecting wires & CRO

8 Probes ------------------------- 1 set

THEORY:
RC phase shift Oscillator basically consists of an amplifier and feed back network
consisting of resistors and capacitors in ladder fashion. The basic RC circuit is as shown below.

The current I is in phase with Vo, whereas the capacitor voltage Vc lags
the current I by φ ( →Ideal value).
OR the output voltage Vo leads the I/P voltage Vi by angle φ is adjusted in practice, equal to .
RC network is used in feedback path. In Oscillator, feedback network must introduce a phase shift
of to obtain total phase shift around a loop as .Thus three Rc network each provide 600
phase shift is cascaded, so that it produces total phase shift. The Oscillator circuit consisting
amplifier and Rc feedback network is as shown below.
Circuit Diagram:
Procedure:

1) Make the circuit connections as shown in Fig.1, the output Vo is obtained on CRO

2) The 10 KΩ pot is adjusted to get a stable output on the CRO.

3) The frequency of Oscillations is measured using CRO and then compared with the
theoretical values.

4) With respect to output at point P, the waveforms at point Q, R and S are observed on the

CRO. We can see the see the phase shift at each point being
respectively.

Note:
The value of all three capacitors C is changed and the frequency of Oscillation can be
changed to new value and is measured again.
Result:

Designed Frequency =______________________

Actual Frequency =______________________

Phase Shift between

P & Q=____________________
P & R=______________________