CN106102226A - Restaurant LED point light source control system of lamp decoration - Google Patents
Restaurant LED point light source control system of lamp decoration Download PDFInfo
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- CN106102226A CN106102226A CN201610450847.9A CN201610450847A CN106102226A CN 106102226 A CN106102226 A CN 106102226A CN 201610450847 A CN201610450847 A CN 201610450847A CN 106102226 A CN106102226 A CN 106102226A
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- 238000005034 decoration Methods 0.000 title claims abstract description 18
- 230000000694 effects Effects 0.000 claims abstract description 5
- 238000001514 detection method Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 11
- 230000007704 transition Effects 0.000 claims description 10
- 238000012216 screening Methods 0.000 claims description 5
- 230000001186 cumulative effect Effects 0.000 claims description 4
- 230000005611 electricity Effects 0.000 claims description 3
- 230000001360 synchronised effect Effects 0.000 claims description 3
- 238000004064 recycling Methods 0.000 claims description 2
- 230000000630 rising effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
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- Electric Clocks (AREA)
- Circuit Arrangement For Electric Light Sources In General (AREA)
Abstract
The present invention relates to a kind of restaurant LED point light source control system of lamp decoration, set up lock in time, enable the system to keep synchronizing for a long time, capacity of resisting disturbance is strong.The ac power input end of each lamp controller is all connected on the terminals of socket, switching load and removes load, so, without order wire, when after ON switch, under the software collaboration of lock in time and each lamp controller controls, jointly complete the overall light decorative effect of LED.
Description
(1) technical field:
The present invention relates to a kind of restaurant LED point light source control system of lamp decoration, set up lock in time, enable the system to keep permanent
Synchronizing, capacity of resisting disturbance is strong.The ac power input end of each lamp controller is all connected on the terminals of socket, switching load
And remove load, so, without order wire, when after ON switch, in the software collaboration control of lock in time and each lamp controller
Under system, jointly complete the overall light decorative effect of LED.
(2) background technology:
Thered is provided the control system of power supply by power network, its each electronic equipment or intermodule are all to be communicated by special circuit,
Correct the timing time of each electronic equipment or electronic module, reach to run simultaneously purpose.Owing to using special circuit communication to make
Wiring complicates and increases cost, if timing time is not corrected by line traffic, then due to tradition timing error, runs number
After hour, its accumulation timing error can make system control action inconsistent, is likely to result in system crash, often changes at some and sets
Meter, its products application of occasion that wiring installation amount is big is restricted.
(3) summary of the invention:
The LED decoration system of preset collaborative Synchronization Control, the LED of such as internal control mode is used between existing each LED
Decorations, it is to use conventional timing mode to realize Synchronization Control, owing to the timing cumulative error of conventional timing mode is big, each LED
Completing whole lamp decoration style in can only being limited in finite time, its light decorative effect can not be made the most complicated, the present invention relates to restaurant
LED point light source control system of lamp decoration sets up the lock in time corrected by grid cyclic wave, enables the system to keep synchronizing for a long time, anti-interference
Ability is strong, and general cafe will be in the face of the multiple service supporting with food and drink, and such as wedding, party, celebration etc. will be done interim
Light source and the layout of lamp decoration and control, on the main switchboard in restaurant, miniature circuit breaker comprises multichannel independent air switch, and it is to lead
Rail is installed and presser type wiring is easy to loading and unloading, and each air switch controls a road electric appliance load, and such as socket, illumination are one
Road electric appliance loads etc., need to select an air switch according to system, all or part electrical equipment controlled by this air switch
The socket of load, switch change lamp decoration use into, and other is constant.Several lamp controller, the alternating current of each lamp controller are installed
Source input is all connected on the terminals of described socket, device for switching and removes device for switching, so, without order wire, when connecing
After logical described air switch, under the software collaboration of lock in time and each lamp controller controls, jointly complete the overall of LED
The light the brightest, the darkest, dreamlike of light decorative effect, such as rule, mutually beat and pile up, the various Display patterns such as flowing, and protect
Holding permanent synchronization, rule shows.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three examination points and realizes sentencing the identification of cycle signal
Fixed, the recycling cycle time sets up lock in time, it is achieved the synchronous operation of each lamp controller in system.
The cycle identification circuit of each lamp controller is as in figure 2 it is shown, by three voltage comparators using hysteresis loop comparators
Composition, all comprises filter circuit in each voltage comparator, the reference voltage of its voltage comparator is provided by mu balanced circuit.System
Clock timer and synchrotimer are set.If be detected that adjacent two cycle signals are very, then take out this two phases
The adjacent clock timer timing time between cycle signal zero passage, is sequentially stored in cycle time memory cell, during this cycle
Between memory element can deposit 100 cycle times, be often stored in a cycle time when being filled with, the most first remove be stored at first
The cycle time, and calculate meansigma methods Tz of the cycle time being stored in and preserve, utilize Tz value to differentiate cycle signal to be identified, with fall
The impact of low power network frequency fluctuation, uses three to screen point simultaneously and reduces erroneous judgement probability.
Three comparators are respectively used to three and screen point, i.e. screen point 0, examination point 1, screen point 2, as shown in Figure 1.In week
At the cycle zero passage of ripple positive half cycle ascent stage, i.e. screening point 0 and arrange voltage zero-crossing comparator, remaining two comparator is respectively provided with
In the cycle positive half cycle ascent stage, point 1 and the examination point 2 at 50% to 70% place are screened by 35% to 50% place of crest voltage.
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, and clock timer resets and starts timing, works as cycle
During voltage zero-cross, it is arranged on the output voltage upset of voltage zero-crossing comparator V0 screening point 0, in its voltage trailing edge produces
Disconnected, record its zero crossing break period Th0 and close interruption；Hereafter, the output of voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning
Voltage, when week, wave voltage reached the threshold voltage of V1, output voltage overturns from high to low, and scanning records its flip-flop transition of Th1；
Voltage comparator V2 output voltage Th2 flip-flop transition at point 2 screened in same scanning record.By Th0 and voltage zero-crossing comparator V0
Output voltage setting value Ts0 flip-flop transition make comparisons；Output voltage setting value flip-flop transition of Th1 and voltage comparator V1
Output voltage setting value Ts2 flip-flop transition of Ts1 and Th2 and voltage comparator V2 is made comparisons, respectively if at allowable error
In the range of, then this discriminator signal detected is true, is otherwise false.Above-mentioned judge that discriminator signal, as true time, calculates this cycle
Clock timer timing time Tzu between signal zero passage with the cycle signal zero passage that an adjacent front discriminator signal is true time, will
It is made comparisons with meansigma methods Tz of cycle time, if less than setting cycle time error Tzv, cycle signal is true, at this moment
Preserving Tzu and take 20ms and be added with synchrotimer timing time, the value that will add up is stored in synchrotimer.
When clock timer starts timing with cycle voltage zero-cross, then timing is to opening the break period between 16ms to 18.5ms
Open interruption during setting value Tk, close during pass break period setting value Tn between clock timer timing to 25ms to 27ms and interrupt.
After system boot, clock timer starts timing, when first cycle voltage zero-cross being detected, is arranged on examination
The output voltage upset of voltage zero-crossing comparator V0 of point 0, thus produce interruption, the time T0 taking out cycle voltage over zero protects
Depositing, reset by clock timer and start timing, at this moment cycle time voltage crosses zero Th0 is 0, and single-chip microcomputer is as stated above simultaneously
Scan and judge discriminator signal.Due to detection is first cycle, and clock timer is to start meter when cycle voltage zero-cross
Time, the value of its Th0, Th1 and Th2 must deduct open the difference of break period setting value Tk plus cycle time 20ms, if three
Individual discriminator signal is true, i.e. for the first time opens the break period next time and takes Tk.Being otherwise fictitious time, now the clock timer time must add
Upper T0, continues detection.
When detecting first and during adjacent second cycle voltage zero-cross, owing to not preserving the cycle time of detection,
Therefore the clock timer timing time between twice cycle signal zero passage is to make comparisons with cycle time 20ms, it is determined that cycle signal
For true time, then take out clock timer cumulative time T1=T0+Tk when opening interruption and be stored in synchrotimer as initial time
In, clock timer of having no progeny in opening reset, otherwise judges cycle signal as fictitious time, now the clock timer time must add T1,
Continue first cycle of detection the most again.After first cycle signal of detection is very, recover above-described week
Ripple signal determining.
As it is shown in figure 1, if be detected that cycle signal is false, opens the break period and all open the break period at this next time
After, when meansigma methods Tz of time delay cycle time, open interruption, and have no progeny in opening time delay Tns time close and interrupt, pass is set when interrupting
Between be when cycle signal screen point 0 time do not produce interruption, at this moment must be at the setting time point more than Ts0 allowable error scope
Starting scanning, and scanning examination point 1 is with when screening point 2, voltage comparator output voltage does not produce upset, all interrupts in pass
Time Tns closes and interrupts and stop scanning, and Tns is:
Tns=Tn-Tk
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all timing opens interruption to Tks, and weight after resetting
Newly start timing, close during timing to Tns and interrupt, so that the synchrotimer time is corrected by cycle time voltage crosses zero.
Repeat said process.If the upper cycle signal detected described in is true, and when this cycle judges, discriminator signal is
Vacation, or the cycle time detected compare with meansigma methods Tz of cycle time and exceed setting cycle time error Tzv, or clock meter
Time device timing to close break period setting value Tns time, voltage zero-crossing comparator V0 output voltage does not overturns, and does not produce interruption,
Then closing when clock timer timing to Tns and interrupt, at this moment remember that not counting cycle N is 1 and stores, open the break period is next time
Opening the break period in last time and open interruption after Tz, clock timer is had no progeny in opening and is reset and timing, Central Shanxi Plain during timing to Tns
Disconnected, judge the cycle signal true and false the most every time, though if false or this detection discriminator signal is true last time is false, then take N, will
Restore in memorizer after N+1.
When detecting that cycle signal is true time, then take out N in memorizer and preserve, and by N zero setting in memorizer, and recover to make
Using setting value Tks, the value at this moment taking (N+1) × 20ms is added in synchrotimer.
The system synchronization time is the time of synchrotimer, adds current the most just in time of clock timer of timing.
When judging to screen the some signal true and false, Th0, Th1, Th2 are by setting flip-flop transition with voltage comparator output voltage
Definite value Ts0, Ts1, Ts2 make comparisons and see the most overproof, judge to screen a some signal true and false, can select: Th0, Th1, Th2 are
This cycle discriminator signal of true time is true, or Th0 is true, and one of Th1, Th2 are true time simultaneously, or Th1, Th2 are true time, should
Cycle discriminator signal is true, depending on to judging that cycle signal true and false difference requires.
If system fault, when N is more than a setting value between 25 to 70, due to lamp decoration control synchronized each in system
Device processed, the Tz value of its detection may be different with N value, at this moment, and power network frequency cumulative error, it is likely to result in the synchrotimer time
Cannot by true cycle signal being detected time corrected, when detecting that cycle signal is true time, at this moment use clock timing
The accumulative clocking value of device is directly added in synchrotimer, and to reduce the asynchronous time of system, accumulative clocking value is N × Tz+
20ms.In the case of power network normal operation, N is much smaller than 25.
The cycle time error Tzv allowed and setting value flip-flop transition of voltage comparator output voltage, by test assessment
Take its meansigma methods to obtain.
(4) accompanying drawing explanation:
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structural representation；
Fig. 3 is the circuit structure block diagram portion of restaurant LED point light source control system of lamp decoration.
(5) detailed description of the invention:
Fig. 3 is the circuit structure block diagram of restaurant LED point light source control system of lamp decoration, including: LED 10, lamp decoration control
Device 11 processed, cycle discriminator circuit 12, electrical equipment 13, wherein in cycle discriminator circuit 12 and Fig. 2, single-chip microcomputer U0 divides equally
It is not included in each lamp controller 11, electrical equipment 13 finger original electrical equipment in on-off circuit.
Fig. 2 is the structural representation of cycle discriminator circuit 12, by: input circuit S0, voltage zero-cross detection module
V0 and voltage comparator V1 voltage comparator V2 is constituted.During wherein single-chip microcomputer U0 refers to each lamp controller 11
Single-chip microcomputer.Input circuit S0, for mains AC voltage is passed through resistance and the dividing potential drop of diode, is converted to voltage ratio relatively
The input voltage that device is the most stable.Single-chip microcomputer U0 uses 89C55WD voltage zero-cross detection module V0, voltage comparator
V1, voltage comparator V2 all use special voltage comparator LM339, and its reference voltage is the voltage stabilizing electricity using stabilivolt
The threshold voltage of burning voltage comparator is carried out on road.
When mains AC voltage cycle signal zero passage, the output voltage saltus step of voltage zero-cross detection module V0, single
Sheet machine U0 produces interruption, records the break period, and single-chip microcomputer U0 is additionally operable to scanning voltage comparator V1 and voltage ratio simultaneously
The relatively output voltage of device V2, records bound-time, is used for judging power network cycle signal thus produces when output voltage saltus step
Raw lock in time.
Claims (2)
1. the present invention relates to restaurant LED point light source control system of lamp decoration, it is characterized in that, this air switch is controlled all or
The socket of part electric appliance load, switch change lamp decoration use into, and other is constant, installs several lamp controller, each lamp controller
Ac power input end be all connected on the terminals of described socket, switching load and remove load, at lock in time and each lamp
Under the software collaboration of decorations controller controls, jointly complete overall light decorative effect；
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three and screens the some realization identification decision to cycle signal,
The recycling cycle time sets up lock in time, it is achieved the synchronous operation of each lamp controller in system；
The cycle identification circuit of each lamp controller is made up of, when system is arranged three voltage comparators using hysteresis loop comparator
Clock timer and synchrotimer, if be detected that adjacent two cycle signals are very, then take out this two adjacent weeks
Clock timer timing time between ripple signal zero passage, is often stored in a cycle time, the most first when being filled with 100 cycle time
Remove the cycle time being stored at first, and calculate meansigma methods Tz of the cycle time being stored in and preserve, utilize Tz value to differentiate
Cycle signal to be identified；
Three comparators are respectively used to three and screen point, i.e. screen point 0, examination point 1, screen point 2, in the cycle positive half cycle ascent stage
Cycle zero passage at, i.e. screen point and 0 voltage zero-crossing comparator be set, remaining two comparator is separately positioned on the positive half cycle of cycle
Rising section, point 1 and the examination point 2 at 50% to 70% place are screened by 35% to 50% place of crest voltage；
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, and clock timer resets and starts timing, when week wave voltage
During zero passage, it is arranged on the output voltage upset of voltage zero-crossing comparator V0 screening point 0, produces at its voltage trailing edge and interrupt,
Record its zero crossing break period Th0 and close interruption；Hereafter, the output electricity of voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning
Pressure, when week, wave voltage reached the threshold voltage of V1, output voltage overturns from high to low, and scanning records its flip-flop transition of Th1；With
Voltage comparator V2 output voltage Th2 flip-flop transition at point 2 screened in sample scanning record, if all allowed by mistake above-mentioned flip-flop transition
In the range of difference, then this discriminator signal detected is true, is otherwise false, above-mentioned judges that discriminator signal, as true time, calculates this week
Clock timer timing time Tzu between ripple signal zero passage with the cycle signal zero passage that an adjacent front discriminator signal is true time,
It being made comparisons with meansigma methods Tz of cycle time, if less than setting cycle time error Tzv, cycle signal is true, this
Shi Baocun Tzu also takes 20ms and is added with synchrotimer timing time, and the value that will add up is stored in synchrotimer；
When clock timer starts timing with cycle voltage zero-cross, then timing set to the break period of opening between 16ms to 18.5ms
Open interruption during value Tk, close during pass break period setting value Tn between clock timer timing to 25ms to 27ms and interrupt；
After system boot, clock timer starts timing, when first cycle voltage zero-cross being detected, is arranged on examination point 0
The output voltage upset of voltage zero-crossing comparator V0, thus produce interruption, the time T0 taking out cycle voltage over zero preserves,
Being reset by clock timer and start timing, at this moment cycle time voltage crosses zero Th0 is 0, and single-chip microcomputer is swept as stated above simultaneously
Retouching and judge discriminator signal, the value of its Th0, Th1 and Th2 must deduct open break period setting value Tk plus cycle time 20ms
Difference, if three discriminator signals are true, i.e. for the first time open the break period takes Tk next time, is otherwise fictitious time, now clock
Timer periods must continue detection plus T0；
When detecting first and during adjacent second cycle voltage zero-cross, it is determined that cycle signal is true time, then take out in opening
Clock timer cumulative time T1=T0+Tk time disconnected is stored in synchrotimer as initial time, clock meter of having no progeny in opening
Time device reset, otherwise judges cycle signal as fictitious time, now the clock timer time must be plus T1, and continuation is the most again
Detect first cycle, after first cycle signal of detection is very, recover above-described cycle signal determining；
If be detected that cycle signal is false, open the break period all after this opens the break period, when time delay cycle next time
Between meansigma methods Tz time open interruption, and have no progeny in opening time delay Tns time close and interrupt, arranging the pass break period is when cycle signal exists
Screening is fictitious time, is all closing the interruption of break period Tns pass and is stopping scanning, and Tns is:
Tns=Tn-Tk
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all timing opens interruption to Tks, and again opens after resetting
Beginning timing, closes during timing to Tns and interrupts, so that the synchrotimer time is corrected by cycle time voltage crosses zero；
Repeat said process, if described in the upper cycle signal that detects be true, when this cycle judges, discriminator signal is false,
Or the cycle time detected compare with meansigma methods Tz of cycle time and exceed setting cycle time error Tzv, or clock timing
Device timing is to when closing break period setting value Tns, and voltage zero-crossing comparator V0 output voltage does not overturns, and does not produce interruption, then
When clock timer timing to Tns close interrupt, at this moment remember that not counting cycle N is 1 and stores, open next time the break period be
Opening the break period last time and open interruption after Tz, clock timer is had no progeny in opening and is reset and timing, Central Shanxi Plain during timing to Tns
Disconnected, judge the cycle signal true and false the most every time, though if false or this detection discriminator signal is true last time is false, then take N, will
Restore in memorizer after N+1；
When detecting that cycle signal is true time, then take out N in memorizer and preserve, and by N zero setting in memorizer, and recover use and set
Definite value Tks, the value at this moment taking (N+1) × 20ms is added in synchrotimer；
The system synchronization time is the time of synchrotimer, adds current the most just in time of clock timer of timing；
When judging to screen the some signal true and false, select: it is true that Th0, Th1, Th2 are this cycle discriminator signal of true time, or Th0 is
Very, one of Th1, Th2 are true time simultaneously, or Th1, Th2 are true time, and this cycle discriminator signal is true, depending on to judging cycle letter
Depending on number true and false difference requires, when a setting value between N is more than 25 to 70, the accumulative clocking value using clock timer is straight
Connecing and be added in synchrotimer, accumulative clocking value is N × Tz+20ms.
Restaurant the most according to claim 1 LED point light source control system of lamp decoration, it is characterised in that including:
LED 10, lamp controller 11, cycle discriminator circuit 12, wherein single-chip microcomputer U0 and cycle discriminator circuit
12 are included in each lamp controller 11 respectively, cycle discriminator circuit 12, by: input circuit S0, voltage zero-cross are examined
Surveying module V0, voltage comparator V1 and voltage comparator V2 to constitute, input circuit S0 is for by mains AC electricity
Pressure, by resistance and the dividing potential drop of diode, is converted to the input voltage that voltage comparator is the most stable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610450847.9A CN106102226B (en) | 2016-06-20 | 2016-06-20 | Restaurant LED point light source control system of lamp decoration |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610450847.9A CN106102226B (en) | 2016-06-20 | 2016-06-20 | Restaurant LED point light source control system of lamp decoration |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106102226A true CN106102226A (en) | 2016-11-09 |
| CN106102226B CN106102226B (en) | 2017-10-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610450847.9A Active CN106102226B (en) | 2016-06-20 | 2016-06-20 | Restaurant LED point light source control system of lamp decoration |
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| Country | Link |
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| CN (1) | CN106102226B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3602994A (en) * | 1970-03-12 | 1971-09-07 | Gen Electric | Pulse generator system responsive to spindle motor rotational phase signal for providing digital pulses at rate dependent upon motor speed |
| US3850123A (en) * | 1973-08-21 | 1974-11-26 | Continental Can Co | Can registration and position system |
| CN1092190A (en) * | 1993-03-09 | 1994-09-14 | 江苏省无锡市照明总公司 | Microcomputerized wireless monitoring method for road lamps |
| CN101373951A (en) * | 2007-08-23 | 2009-02-25 | 李代甫 | Method for digital discrimination and apparatus thereof |
| CN101902861A (en) * | 2010-08-10 | 2010-12-01 | 友达光电股份有限公司 | Driving method and driving circuit of light emitting diode |
-
2016
- 2016-06-20 CN CN201610450847.9A patent/CN106102226B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3602994A (en) * | 1970-03-12 | 1971-09-07 | Gen Electric | Pulse generator system responsive to spindle motor rotational phase signal for providing digital pulses at rate dependent upon motor speed |
| US3850123A (en) * | 1973-08-21 | 1974-11-26 | Continental Can Co | Can registration and position system |
| CN1092190A (en) * | 1993-03-09 | 1994-09-14 | 江苏省无锡市照明总公司 | Microcomputerized wireless monitoring method for road lamps |
| CN101373951A (en) * | 2007-08-23 | 2009-02-25 | 李代甫 | Method for digital discrimination and apparatus thereof |
| CN101902861A (en) * | 2010-08-10 | 2010-12-01 | 友达光电股份有限公司 | Driving method and driving circuit of light emitting diode |
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| CN106102226B (en) | 2017-10-13 |
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Effective date of registration: 20201123 Address after: 215400 No.1 Ziwei Road, Liuhe Town, Taicang City, Suzhou City, Jiangsu Province (Hall on the second floor of high level talent entrepreneurship center) Patentee after: Suzhou milli Culture Media Technology Co.,Ltd. Address before: The riverside road in Taijiang District of Fuzhou City, Fujian Province, No. 180 350004 Patentee before: FUZHOU TAIJIANG DISTRICT SUPERMAN ELECTRONICS Co.,Ltd. |