Introdução aos Microcontroladores 2025.1
Introdução aos Microcontroladores 2025.1
1
João Marcelo Teixeira
● Processor Core: The CPU of the controller. It contains the arithmetic logic unit, the
control unit, and the registers (stack pointer, program counter, accumulator register,
register file, . . . ).
● Memory: The memory is sometimes split into program memory and data memory. In
larger controllers, a DMA controller handles data transfers between peripheral
components and the memory.
● Interrupt Controller: Interrupts are useful for interrupting the normal program flow in
case of (important) external or internal events. In conjunction with sleep modes, they
help to conserve power.
● Timer/Counter: Most controllers have at least one and more likely 2-3 Timer/Counters,
which can be used to timestamp events, measure intervals, or count events.
Fundamentos :: Introdução
● Digital I/O: Parallel digital I/O ports are one of the main features of microcontrollers.
The number of I/O pins varies from 3-4 to over 90, depending on the controller
family/type.
● Analog I/O: Apart from a few small controllers, most microcontrollers have integrated
analog/digital converters, which differ in the number of channels (2-16) and their
resolution (8-12 bits).
● Interfaces: Controllers generally have at least one serial interface which can be used to
download the program and for communication with the development PC in general and
other interfaces like SPI and SCI.
● Watchdog Timer: The watchdog timer is used to reset the controller in case of software
“crashes”.
● Debugging Unit: Some controllers are equipped with additional hardware to allow
remote debugging of the chip from the PC.
Fundamentos :: Termos frequentemente usados
● Microprocessor: This is a normal CPU (Central Processing Unit) as you can find in a
PC. Communication with external devices is achieved via a data bus, hence the chip
mainly features data and address pins as well as a couple of control pins. All peripheral
devices (memory, floppy controller, USB controller, timer, . . . ) are connected to the
bus.
● Microcontroller: A microcontroller already contains all components which allow it to
operate standalone, and it has been designed in particular for monitoring and/or control
tasks. In consequence, in addition to the processor it includes memory, various
interface controllers, one or more timers, an interrupt controller, and last but definitely
not least general purpose I/O pins which allow it to directly interface to its environment.
Fundamentos :: Termos frequentemente usados
● Mixed-Signal Controller: This is a microcontroller which can process both digital and
analog signals.
● Embedded System: A major application area for microcontrollers are embedded
systems. In embedded systems, the control unit is integrated into the system. As an
example, think of a cell phone, where the controller is included in the device.
● Real-Time System: Controllers are frequently used in real-time systems, where the
reaction to an event has to occur within a specified time. This is true for many
applications in aerospace, railroad, or automotive areas, e.g., for brake-by-wire in cars.
Fundamentos :: Termos frequentemente usados
● Embedded Processor: This term often occurs in association with embedded systems,
and the differences to controllers are often very blurred. In general, the term “embedded
processor” is used for high-end devices (32 bits), whereas “controller” is traditionally
used for low-end devices (4, 8, 16 bits).
● Digital Signal Processor (DSP): Signal processors are used for applications that need
to —no surprise here— process signals. An important area of use are
telecommunications, so your mobile phone will probably contain a DSP. Such
processors are designed for fast addition and multiplication, which are the key
operations for signal processing.
Componentes :: Processador
É a parte principal
de qualquer microcontrolador.
Componentes :: Processador
● RISC: The RISC architecture has simple, hard-wired instructions which often take only
one or a few clock cycles to execute. RISC machines feature a small and fixed code
size with comparatively few instructions and few addressing modes. As a result,
execution of instructions is very fast, but the instruction set is rather simple.
● CISC: The CISC architecture is characterized by its complex microcoded instructions
which take many clock cycles to execute. The architecture often has a large and
variable code size and offers many powerful instructions and addressing modes. In
comparison to RISC, CISC takes longer to execute its instructions, but the instruction
set is more powerful.
Componentes :: Processador
● Von Neumann Architecture: In this architecture, program and data are stored together
and are accessed through the same bus. Unfortunately, this implies that program and
data accesses may conflict (resulting in the famous von Neumann bottleneck), leading
to unwelcome delays.
● Harvard Architecture: This architecture demands that program and data are in
separate memories which are accessed via separate buses. In consequence, code
accesses do not conflict with data accesses which improves system performance. As a
slight drawback, this architecture requires more hardware, since it needs two busses
and either two memory chips or a dual-ported memory (a memory chip which allows
two independent accesses at the same time).
Componentes :: Memória
● Register File: A (usually) relatively small memory embedded on the CPU. It is used as
a scratchpad for temporary storage of values the CPU is working with - you could call it
the CPU’s short term memory.
● Data Memory: For longer term storage, generic CPUs usually employ an external
memory which is much larger than the register file. Data that is stored there may be
short-lived, but may also be valid for as long as the CPU is running. Of course,
attaching external memory to a CPU requires some hardware effort and thus incurs
some cost. For that reason, microcontrollers usually sport on-chip data memory.
● Instruction Memory: Like the data memory, the instruction memory is usually a
relatively large external memory (at least with general CPUs). Actually, with
von-Neumann-architectures, it may even be the same physical memory as the data
memory. With microcontrollers, the instruction memory, too, is usually integrated right
into the MCU.
Componentes :: Memória
Componentes :: Memória
Componentes :: Memória
Componentes :: Memória
● Big Endian: Big Endian architectures store the high byte first. So, if you write the word
0x1234 to address 0x0100, the high byte 0x12 goes to address 0x0100, and the low
byte 0x34 to address 0x0101. The name is derived from this order: The Big End of the
word is stored first – therefore, it is called Big Endian.
● Little Endian: Little Endian architectures access memory the other way around (Little
End of the word first). Here, the low byte is stored first. Writing 0x1234 at address
0x0100 on a little endian architecture writes 0x34 to address 0x0100 and 0x12 to
address 0x0101.
Componentes :: Entrada/saída digital
Digital I/O, or, to be more general, the ability to directly monitor and control
hardware, is the main characteristic of microcontrollers.
Componentes :: Entrada/saída digital
Data Direction Register (DDR): Each bidirectional port has its own DDR, which contains
one bit for each pin of the port. The functionality of a pin (input or output) is determined by
clearing or setting its bit in the DDR.
Port Register (PORT): This register is used to control the voltage level of output pins.
Assuming a pin has been configured to output, then if its bit in the PORT register is set, the
pin will be high; if the bit is cleared, the pin will be low.
Port Input Register (PIN): The PIN register is generally read-only and contains the current
state (high or low) of all pins, whether they are configured as output or as input. It is used to
read the state of input pins, but it can also be used to read the state of output pins to verify
that the output was taken over correctly. A write to this register generally has no effect.
Componentes :: Entrada/saída analógica
Componentes :: Entrada/saída analógica
Componentes :: Entrada/saída analógica
Componentes :: Interrupções
Microcontrollers tend to be deployed in systems that have to react to events.
Componentes :: Interrupções
Sequência do tratamento de uma interrupção:
● Set interrupt flag: The controller stores the occurence of the interrupt condition in the
IF.
● Finish current instruction: Aborting half-completed instructions complicates the
hardware, so it is generally easier to just finish the current instruction before reacting to
the event. Of course, this prolongs the time until reaction to the event by one or more
cycles.
● Identify ISR: The occurence of an event does not necessarily imply that an ISR should
be called. If the corresponding IE bit is not set, then the user does not desire an
interrupt.
● Call ISR: After the starting address has been determined, the controller saves the PC
etc. and finally executes the ISR.
Componentes :: Interrupções
Interrupção vs Polling
● event occurs infrequently ● the operator is human
● long intervals between two events ● no precise timing is necessary
● the state change is important ● the state is important
● short impulses, polling might miss ● impulses are long
them ● the signal is noisy
● event is generated by HW, no ● there is something else to do in main
bouncing effects or spikes anyway, but not too much
● nothing else to do in main, could
enter sleep mode
Componentes :: Temporizador
● Geralmente apresentam resolução de 8 ou 16 bits
● Seu uso pode variar desde delays simples até medição de intervalos para geração de
ondas
● São comumente usados como contadores
● Podem ser usados também para gerar um rótulo de tempo para eventos externos e
PWM
● É possível alimentar o temporizador com um oscilador externo
Componentes :: Outros
Example: Watchdog Timer
A popular example for a watchdog operating properly and successfully recognizing a
program error while at the same time being unable to do anything about it is NASA’s Mars
Pathfinder mission of 1997a . The Pathfinder successfully landed on the surface and began
its mission of gathering data. However, after a couple of days, it began to experience system
resets which entailed data loss. As it turned out, the reason lay with the watchdog timer: The
operating system, the embedded real-time system VxWorks, used the priority inheritance
protocol to manage access to mutually exclusive sections (which may only be executed by at
most one task at any time). However, this protocol suffers from the so-called priority
inversion problem, which can cause a high-priority task to be delayed by a task of lower
priority. This occured in the pathfinder mission, and since the delayed high-priority task was
responsible for resetting the watchdog, the watchdog timed out and reset the system. This
was actually not a bad idea, even though it cost NASA some data, since in a way it did
resolve the situation. However, the reset did not remove the cause of the problem, which
simply arose from the conditions on Mars, so the problem occured again and again.
Componentes :: Watchdog Timer
A popular example for a watchdog operating properly and successfully recognizing a
program error while at the same time being unable to do anything about it is NASA’s Mars
Pathfinder mission of 1997a . The Pathfinder successfully landed on the surface and began
its mission of gathering data. However, after a couple of days, it began to experience system
resets which entailed data loss. As it turned out, the reason lay with the watchdog timer: The
operating system, the embedded real-time system VxWorks, used the priority inheritance
protocol to manage access to mutually exclusive sections (which may only be executed by at
most one task at any time). However, this protocol suffers from the so-called priority
inversion problem, which can cause a high-priority task to be delayed by a task of lower
priority. This occured in the pathfinder mission, and since the delayed high-priority task was
responsible for resetting the watchdog, the watchdog timed out and reset the system. This
was actually not a bad idea, even though it cost NASA some data, since in a way it did
resolve the situation. However, the reset did not remove the cause of the problem, which
simply arose from the conditions on Mars, so the problem occured again and again.
Interfaces de Comunicação :: SCI (UART)
Interfaces de Comunicação :: SPI
Simple synchronous point-to-point interface based on a master-slave principle
● MOSI (Master Out, Slave In): This line is used by the master to transmit data to the
slave.
● MISO (Master In, Slave Out): This line is used by the slave to transmit data to the
master.
● SCK (System Clock): This line is used by the master to transmit the clock signal.
● SS (Slave Select): This line is used by the master to select a slave.
Interfaces de Comunicação :: I2C
I2C is a synchronous bus that operates on a master-slave principle. It uses two
single-ended wires SCL (Serial Clock Line) and SDA (Serial Data Line) for
half-duplex communication.
Desenvolvimento do Software :: Ciclo de
Desenvolvimento
Desenvolvimento do Software :: Linguagem
Assembly
Representação mnemônica da linguagem de máquina
≃
Desenvolvimento do Software :: Bootloader
Piece of software already residing in the controller’s memory that takes over new
user programs and installs them in the controller. In that case, programming can
be done for example via the UART interface of the controller, so there may not be
any need for more than a simple (or no) programming adapter.
Desenvolvimento do Software :: Debugging
● No Debugger
● ROM Monitor
● Instruction Set Simulator
● In-Circuit Emulator
● Debugging Interfaces (JTAG, BDM)
Hardware
● Switch/Button
● Matrix Keypad
● Potentiometer
● Phototransistor
● Position Encoder
● LED
● Numeric Display
● Multiplexed Display
● Motors
Referência
https://ti.tuwien.ac.at/ecs/teaching/courses/mclu/theory-material/Microcontroller.pdf