TYPES OF ASIC

TYPES OF ASIC (APPLICATION SPECIFIC INTEGRATED CIRCUIT)

ASIC

FULL-CUSTOM SEMI-CUSTOM PROGRAMMABLE

STANDARD CELL GATE ARRAY

PLDs FPGAs
BASED BASED

STRUCTURED
CHANNELED CHANELLESS
GATE

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FULL CUSTOM
► In Full-Custom ASIC, all the logic cells, circuits and layouts are designed specifically for that
particular ASIC from the ground up. The designer may choose a full-custom ASIC design only
if he thinks that either the existing libraries are not fast enough or the logic cells are not
small or the power consumption is high.

► The main advantages of full-custom ASICs over other IC designs are it delivers the highest
possible performance at the smallest possible die size. But this high performance and small
size comes at a price of increased design time, complex design and overall cost of the IC
itself.

► Some of most common full-custom ASISs are Microprocessors, Memories, Analog

Processors, Analog / Digital Communication devices, Sensors, Transducers, high-voltage ICs
for Automobiles, etc.

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FULL CUSTOM
► The following is a sample design of a CMOS based 2-input NAND gate, where every layer is
defined.

RAGHAVENDRA ANJANAPPA Image Source - https://www.electronicshub.org/

SEMI CUSTOM
► In this type of design logic cells are taken from standard libraries .i.e. they are not
handcrafted as in Full custom design. Some masks are customized while some are taken
from the predesigned library.
► Based on the type of logic cells taken from the library and amount of customization allowed
for interconnects these ASICs are divided into two types-

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STANDARD CELL BASED
► To know these IC first let us understand what a standard cell library stands for. Some of the
logic cells such as AND gates, OR gates, multiplexers, flip-flops are predesigned by designers
using different configurations, standardized and stored in the form of a library. This
collection is known as standard cell library.

► In standard cell-based, ASIC logic cells from these standard libraries are used. On the ASIC
chip standard cell area or flexible block are made up of standard cells arranged in the form of
rows. Along with these flexible blocks mega cells like microcontrollers or even
microprocessors are used on-chip. These mega cells are also known as Mega functions,
system level macros, fixed blocks, Functional standard blocks.

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STANDARD CELL BASED
► The figure represents a standard cell ASIC with a single standard cell area and four fixed
blocks. Mask layers are customized. Here designer can place standard cells anywhere on the
die. These are also known as C-BIC.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

GATE ARRAY BASED
► This type of semi-custom ASIC have predefined transistors on the silicon wafer .i.e. the
designer cannot change the placement of the transistors present on the die. Base array is
the predefined pattern of the gate array and the base cell is the smallest repetitive cell of the
base array.

► The designer only has liability to change interconnection between transistors using the first
few metal layers of the die. The designer chooses from the gate array library. These are often
called as Masked Gate Array. Gate Array Based ASIC are of three types. They are Channeled
Gate Array, Channel less gate array and a structured gate array.

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CHANNELED GATE ARRAY
► In this type of gate array, wiring space is left between rows of transistors. These are similar
to CBIC as space is left for interconnection between blocks but in channeled gate array cell
rows are fixed in height whereas in CBIC this space can be adjusted.
► Some of the main features of this gate array are- this gate array uses predefined spaces
between rows for interconnection. Manufacturing time is two days to two weeks.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

CHANNELLESS GATE ARRAY
► There is no free space left for routing between rows of cells as seen in the channeled gate
array. Here routing is done from above the gate array cells as we can customize the
connection between the metal 1 and transistors. For routing, we leave the transistors lying in
the path of routing unused. The manufacturing lead time is about two weeks.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

STRUCRURED GATE ARRAY
► This type of gate array has an embedded block
along with gate array rows as seen above.
Structured gate array has a higher area efficiency
of CBIC. Like Masked gate array these have lower
cost and faster turnaround. Here the fixed size of
the embedded function poses a limitation on the
structured gate array. For example, is this gate
array contains an area reserved for 32k bit
controller but if in an application we only require
an area for 16k bit controller the remaining area
gets wasted. All the gate array have a turnaround
time of two days to two weeks and all have
customized interconnect.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

PRGRAMMABLE ASIC
There are two types of programmable ASICs. They are PLD and FPGA

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PLDs (Programmable Logic Devices)
► These are the standard cells readily available. We
can program a PLD to customized a part of the
application, so they are considered as ASIC. We
can use different methods and software to
program a PLD. These contain a regular matrix of
logic cells usually programmable array logic along
with flip-flops or latches. Here interconnects are
present as a single large block.
► PROM is a common example of this IC. EPROM
uses MOS transistors as interconnect so by
applying high voltage we can program it. PLDs
have no customized logic cells or interconnect.
These have a fast design turnaround.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

FPGAs (Field Programmable Gate Array)
► Where PLDs have programmable array logic as logic cells FPGA has gate array-like
arrangement. PLDs are smaller and less complex than FPGAs. Due to its flexibility and
characteristics, FPGA is replacing TTL in microelectronic systems. Design turnaround is
only a few hours.

► The core consists of programmable basic logic cells which can perform both
combinational and sequential logic. We can program logic cells and interconnect using
some methods. Basic logic cells are surrounded by the matrix of programmable
interconnects and the core is surrounded by programmable I/O cells.

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FPGAs (Field Programmable Gate Array)
► FPGA usually comprises of
configurable logic blocks,
configurable I/O blocks,
programmable interconnects, clock
circuitry, ALU, memory, decoders.

RAGHAVENDRA ANJANAPPA Image Source - https://www.elprocus.com/

Advantages & Disadvantages of ASIC

► The small size of ASIC makes it a high ► As these are customized chips
choice for sophisticated larger systems. they provide low flexibility for
► As a large number of circuits built over a programming.
single chip, this causes high-speed ► As these chips have to be
applications. designed from the root level they
► ASIC has low power consumption. are of high cost per unit.
► As they are the system on the chip, ► ASIC have larger time to market
circuits are present side by side. So, very margin.
minimal routing is needed to connect
various circuits.
► ASIC has no timing issues and post-
production configuration.
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FPGAs Vs ASIC

RAGHAVENDRA ANJANAPPA Image Source - https://sigenics.com/blog

REFERENCES

https://www.elprocus.com/
https://sigenics.com/blog

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