INTEGRATED ELECTRONICS

Lecture#19-21-IC Biasing
CONTENTS

• IC Biasing
• Current Source & Current Mirrors
• BJT Current Source with Base Current
Compensation
• Improvements of current mirror circuits
• Wilson Current Mirror
• MOS Current Mirror
• MOS Current Steering Circuit
INTRODUCTION

• Integrated-circuit fabrication technology imposes constraints

• large capacitors are not available
• very small capacitors are easy to fabricate
• One objective is to realize as many functions as possible
using MOS transistors only.
• Reduction of device size is of great concern.
WHY CURRENT SOURCE NEEDED
FOR IC BIASING?

• Resistors take too much space on the chip. Source

degeneration with resistor is not implemented in ICs.
• The goal of a good bias is to ensure drain current (ID) and
Drain source voltage VDS would not change (e.g., due to
temperature variation). One can force ID to be constant using a
current source.
IC BIASING

• Biasing in IC design is based on the use of constant- current

sources.
• A constant dc current (called a reference I) is generated at
one location and is then replicated at various other locations
for biasing the various stages through a process known as
current steering.
CURRENT SOURCE & CURRENT
MIRRORS
• Used to bias integrated circuits.
• A current mirror is a circuit designed to copy a current
through one active device by controlling the current in
another active device of a circuit, keeping the output current
constant regardlessof loading.
• Biasing in IC is based on the use of constant current
source on IC chip with a number of amplifier stages.
• Constant DC current called the reference current is
generated at one location and then replicated at various
other locations.

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CURRENT SOURCE CIRCUITS

• Simplest: two-transistor current source

• need to improve approximation of IO = IREF
• need to improve stability of IO by having higher RO (output
resistance)
• Improved current source topologies
• basic three-transistor: better approximation of IO = IREF
• Cascode: higher RO by factor of β
• Wilson: higher RO by factor of β/2
• Widlar: higher RO by (1 + gmRE’)
TWO TRANSISTOR CURRENT
SOURCE
TWO TRANSISTOR CURRENT SOURCE

• also called current mirror: two matched

transistors, Q1 & Q2
• Q1 is diode-connected
• Q1 & Q2 have the same VBE voltages
• Reference current IREF established by
R1 :
TWO TRANSISTOR CURRENT
SOURCE/CURRENT MIRROR

• Output current is mirror image of input current

than it is called current mirror.
• 𝐼𝑂 = 𝐼𝑅𝐸𝐹
𝐼𝑂
• 𝐼 𝑅𝐸𝐹
=1
• If the current transfer ratio greater than one it would be
n times of input called current source.
• If the current transfer ratio is 2 so…
• 𝐼𝑂 = 2𝐼𝑅𝐸𝐹
𝐼𝑂
• =2
𝐼 𝑅𝐸𝐹

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CASE-I
• When β is finite there would be error in current
transfer ratio.
• β is infinite is an ideal case not practical.
• 𝐼𝑂 = 𝐼𝑅𝐸𝐹
𝐼𝑂
• =1
𝐼 𝑅𝐸𝐹
• If its not be exactly 1 there would be error.
• The total current which is going to circuit is 𝐼𝑅𝐸𝐹
• 𝐼𝑅𝐸𝐹 = IC + IB …………………….(1)
• IC = β IB
𝐼𝐶
• IB =
β
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CASE-I

• Now IB is divided in IB1 and IB2

• IB = IB1 + IB2
𝐼 𝐼
• IB = +
β β
2𝐼
• IB =
β
• Put the values of IB in equation (1)
2𝐼
• 𝐼𝑅 𝐸 𝐹 = IC + β
2
• 𝐼𝑅 𝐸 𝐹 = IC (1+ β)

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CASE-I
𝐼𝑂 𝐼𝐶
• =
𝐼 𝑅𝐸𝐹 IC (1+ 2 )
β
𝐼𝑂 1
• 1+
= ≠1 2
𝐼 𝑅𝐸𝐹
β
• For perfect current mirror current transfer
ratio should be equal to 1. But in this case it is
not equal to 1 due to finite value of β.

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CASE-II (IDEAL CASE)

• When β is infinite
𝐼𝑂 1
• =
1+ 2 =1
𝐼 𝑅𝐸𝐹
∞
• It is an ideal case but there is no transistor whose value of β
would be ∞.
• 𝐼𝑅𝐸𝐹 = IC + IB
• IC = β IB
• I 𝐼𝐶 𝐼𝐶
B= β = ∞ = 0
• 𝐼𝑅𝐸𝐹 =IC
• 𝐼𝑂
= 𝐼𝐶 = 1
𝐼 𝑅𝐸𝐹 IC

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CASE-III (FOR CURRENT SOURCE)

• If our output is multiple of input then current

transform ratio:
• IREF = IC + IB
• IB = IB1 + IB2
IC m I𝐶
• IB = +
β β
1 m
• IB = IC (β + β )
1+ m
• IB = IC ( β )

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CASE-III (FOR MULTIPLE OUTPUTS)

• 𝐼𝑅𝐸𝐹 = IC + IB
1+𝑚
• 𝐼 𝑅𝐸𝐹 = IC+ IC( β )
1+𝑚 )
• 𝐼 𝑅 𝐸 𝐹= I C(1+ β
𝐼𝑂 𝐼𝐶
• 𝐼 𝑅𝐸𝐹
= 1+𝑚
IC (1+ )
β
𝐼𝑂 1
• = 1+ 1+𝑚
𝐼 𝑅𝐸𝐹
β
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CASE-III (FOR MULTIPLE OUTPUTS)

• IREF is not directly applied, like in op-amp

we give +ve voltage to pin 4 and –ve to pin
7 to bias internal operation.
• To set IREF we connect a resistance internally in
circuit.
•I = +𝑣 − 𝑉 𝐵 𝐸
REF
𝑅

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EXAMPLE

• Design a two transistor current sources

assuming that transistors are matched with
parameters VBE = 0.6 V, β = 100. The bias
voltage are to be V+ = 5V, V- = 0V and
designated output current 100µA. Calculate
IREF = ? and R = ?.

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EXAMPLE
2
• 𝐼𝑅 𝐸 = I C (1+ )
β
𝐹
2
• 𝐼𝑅𝐸𝐹 = 100 x 10−6 1+
100
• 𝐼𝑅𝐸𝐹 = 1002 x 10−4Amp
• 𝐼𝑅𝐸𝐹 =102µA
+𝑣 − 𝑉 𝐵 𝐸 5−0.6
• IREF = = 102 x10−6 =
𝑅 𝑅
4.4
• R= = 43Kῼ
102 x10−6

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Improved current source topologies

BJT CURRENT SOURCE WITH BASE CURRENT COMPENSATION

Q3
IB3
IE3
Q1 Q2
IB1 IB2

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BJT CURRENT SOURCE WITH BASE CURRENT COMPENSATION

• This method is used for to reduce the error voltage for

modifying base current
• IC = β 𝐼𝐵
• IREF = IC + IB3………………………………(1)
𝐼C3
• I B3= β …………………………..(2)
• α = 𝐼𝐶
𝐼𝐸
• IC = α IE
• For Q3
• IC3 = α IE3
β
• I C3= 1+β x IE 3

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BJT CURRENT SOURCE WITH BASE CURRENT COMPENSATION

𝐼𝐶3
• IB3 =
β
β
1+β
IE3
• IB3 =
β
𝐼𝐸3
• IB3 = ………………..(3)
1+β
• IE3 = IB1 + IB2
•I = 𝐼𝐶 𝐼𝐶
+ =
2𝐼𝐶
E3 β β β
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BJT CURRENT SOURCE WITH BASE CURRENT COMPENSATION

• Put value IE3 in equation (3)

• I = 2𝐼𝐶
B3 • Advantages:
β(1+β) • Better approximation of IO to IREF
• IO less sensitive to variation in β
• IREF = IC + IB3

2
• IREF = IC (1+ )
β(1+β)
𝐼𝐶
• 𝐼𝑂
= IC (1+ 2 )
𝐼𝑅𝐸𝐹 β(1+β)

𝐼𝑂 1
• = 2
𝐼𝑅𝐸𝐹 (1+ )
β β
(1+ )

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WILSON CURRENT SOURCE
• Founder George Wilson
(Tektronix) IC Design
engineer.
• Current mirror with
improved performance
• Two advantages
– Less dependence on beta
– Increasing the output
resistance

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WILSON CURRENT SOURCE

• Cascode connection=
cascade +cathode
• Advantages:
– Stable due to isolation
b/w input and output
– It has high bandwidth
but equal DC gain as
compare to common
emitter amplifier

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WILSON CURRENT SOURCE

I) 2) 26
WILSON CURRENT SOURCE

3) 4)
TASK: WILDAR CURRENT SOURCE
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MOS CURRENT MIRROR
• MOSFET Circuits

• The basic MOSFET current source

• MOS current-steering circuits
• The bias currents of the various stages track each other in
case of changes in power-supply voltage or in
temperature
• Circuit layout same as BJT
• In MOSFET gate current is zero becauseinput impedance is so high.
• VGS and aspect ratio of both transistor must be same.

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MOS CURRENT SOURCE

• Two types of basic gain cells exist:

• Common-source (CS)
• Common-emitter (CE)
• Both are loaded with constant-current source.
• This is done because of difficulties associated with fabrication of
exact resistances.
• It also facilitates increased gain.
• These circuits are referred to as current-source loaded / active loaded
• NMOS current source sinks current to ground
• PMOS current source sources current from positive supply
N-MOSFET CURRENT MIRROR

Two matching MOSFET transistors

connected back-to-back, such that both
have the same Gate-to-Source voltage

Io （W L) 2
=
I REF （W L)1
• Need: Using the transistors
geometries (W/L)1and (W/L)2as
design parameters create a DC current
Io, as long as transistor Q2 is in
Saturation Mode
NMOSFET CURRENT MIRROR - CONTD…

𝐼𝑂 𝐼𝐷2
• Current Transfer Ratio = =
𝐼𝑅𝐸𝐹 𝐼𝐷1
• Both transistor will be in saturation.
• Drain Current would be:

• we can change the geometry of transistor by W/L.

Current transfer ratio is equal to
ratio of aspect ratio of transistor if
it has same geometry then output
is the mirror of input and current
transfer ratio is 1 in other words
• relationship between I0 and IREF
is solely determined by the
geometries of transistor.
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PMOS CURRENT SOURCE/ MIRROR
EXAMPLE

• Design an NMOS current mirror with

the following parameters.
• VDD = 10 V
• VGS = 2 V
• VSS = 0 V
• K’n = 20 µA/V2
• L = 10 µm
• W = 100 µm
• Vt = 1 V

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EXAMPLE

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MOS CURRENT STEERING CIRCUIT
• In an IC with various amplifier stages constant current generated at one location and
is than replicated at various other locations for biasing amplifier stages.
• This approach has the advantage that generating an stable reference current need
not be repeated for every amplifierstage.

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MOS CURRENT STEERING CIRCUIT

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EXAMPLE

• Design current steering circuit of MOSFET

using following parameters.
– VDD = 15V; R= 10Kῼ; W1 =
– Vt = 2V; 200µm; Kn’= 40µA/V2;
– VGS = 5V L1 = 20µm;
• Calculate

1. I1 = IREF=? Find output current

2. Aspect ratio of Q2 is twice that Q1
3. Aspect ratio of Q3 is thrice that Q1
4. Find I5 when W4=30µm, L4 = 15µm
5. Aspect ratio of Q3 is twice of Q1
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EXAMPLE

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