Course: Electronic Engineering UEC001

Topic: Combinational Circuits

Combinational Circuits
A combinational logic circuit performs an operation assigned logically by a
Boolean expression or truth table.

Combinational Circuit is the type of circuit in which output is independent

of time and only relies on the input present at that particular instant.

Examples of common combinational logic circuits include: half adders, full

adders, multiplexers, demultiplexers, encoders and decoders.
Design Procedure
BCD to XS 3 code converter- Design (1)...
TRUTH TABLE FOR BCD TO XS3 CODE CONVERTER:

Input ( Std BCD code) Output ( XS3 Code)

Deci
A B C D mal w x y z
0 0 0 0 0 0 0 1 1
0 0 0 1 1 0 1 0 0
0 0 1 0 2 0 1 0 1
0 0 1 1 3 0 1 1 0
0 1 0 0 4 0 1 1 1
0 1 0 1 5 1 0 0 0
0 1 1 0 6 1 0 0 1
0 1 1 1 7 1 0 1 0
1 0 0 0 8 1 0 1 1
1 0 0 1 9 1 1 0 0
1 0 1 0 10 X X X X
1 0 1 1 11 X X X X
1 1 0 0 12 X X X X
1 1 0 1 13 X X X X
1 1 1 0 14 X X X X
1 1 1 1 15 X X X X
4
BCD to XS 3 code converter- Design (2)...
K-maps for simplification and simplified Boolean expressions

5
Half Adder
Full Adder
Full Adder
Conversion from Binary code to Gray Code

• Let Binary code be b3 b2 b1 b0. Then the

respective Gray Code can be obtained is as
follows

9
FOUR BIT BINARY TO GRAY CODE CONVERTER –DESIGN (1)…
MSB + + + + Binary code
0 1 1 0 1
TRUTH TABLE:
Gray code
0 1 0 1 1
INPUT ( BINARY) OUTPUTS (GRAY CODE)
B3 B2 B1 B0 G3 G2 G1 G0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0
0 1 0 1 0 1 1 1
0 1 1 0 0 1 0 1
0 1 1 1 0 1 0 0
1 0 0 0 1 1 0 0
1 0 0 1 1 1 0 1
1 0 1 0 1 1 1 1
1 0 1 1 1 1 1 0
1 1 0 0 1 0 1 0
1 1 0 1 1 0 1 1
1 1 1 0 1 0 0 1
1 1 1 1 1 0 0 0 10
FOUR BIT BINARY TO GRAY CODE CONVERTER –DESIGN (2)…
Simplification using K-maps:

11
FOUR BIT BINARY TO GRAY CODE CONVERTER –DESIGN (3)

Logic Diagram:

12
Gray to Binary
• Let Gray Code be g3 g2 g1 g0. Then the
respective Binary Code can be obtained as
follows:

13
FOUR BIT GRAY CODE TO BINARY CONVERTER –DESIGN (1)… MSB + + + + Gray code
1 0 1 0 0

• Truth Table:
Binary code
INPUT ( GRAY CODE) 1 1 )
OUTPUTS (BINARY 0 0 0

G3 G2 G1 G0 B3 B2 B1 B0

0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 1
0 1 0 1 0 1 1 0
0 1 1 0 0 1 0 0
0 1 1 1 0 1 0 1
1 0 0 0 1 1 1 1
1 0 0 1 1 1 1 0
1 0 1 0 1 1 0 0
1 0 1 1 1 1 0 1
1 1 0 0 1 0 0 0
1 1 0 1 1 0 0 1
1 1 1 0 1 0 1 1
1 1 1 1 1 0 1 0 14
FOUR BIT GRAY CODE TO BINARY CONVERTER –DESIGN (2)…
Simplification using K-Maps:

15
FOUR BIT GRAY CODE TO BINARY CONVERTER –DESIGN (3)…
Simplification using K-Maps:

16
FOUR BIT GRAY CODE TO BINARY CONVERTER –DESIGN (4)

Logic Diagram:

17
4x1 Multiplexer

Combinational Logic 18
A 1-line-to-4-line demultiplexer.

19
Decoders
W = A'.B'
Out0 W
B I0 Out1 X X = A.B'
A I1 Out2 Y Y = A'.B
Out3 Z
msb Z = A.B
Active-high outputs

A B W X Y Z
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

20
Decoders
W = (A'.B')'
Out0 W
B I0 Out1 X X = (A.B')'
A I1 Out2 Y Y = (A'.B)'
Out3 Z
msb Z = (A.B)'
Active-low outputs

A B W X Y Z
0 0 0 1 1 1
0 1 1 0 1 1
1 0 1 1 0 1
1 1 1 1 1 0

Fall 2010 ECE 331 - Digital System Design 21

Decoders
msb

22
Decoder with Enable

B I0 Out0 W
high-level Out1 X
enable A I1
Out2 Y
Out3 Z
Enable En

En A B W X Y Z
1 0 0 1 0 0 0
1 0 1 0 1 0 0
enabled
1 1 0 0 0 1 0
1 1 1 0 0 0 1
disabled 0 x x 0 0 0 0

23