AN12183

How to Enable Debugging for FLEXSPI NOR Flash

Rev. 1 — 10/2019 Application Note

Contents
1 Introduction 1 Introduction.......................................... 1
The i.MX RT series is industry’s first crossover processor provided by NXP. This 2 MIMXRT1050 EVK board settings.......1
document describes how to program a bootable image into the external storage
3 XIP boot flow........................................ 3
device. In order to program image to flash and boot from flash and debug, the
new Dap-link Firmware and SDK are provided. This application notedescribes 4 Updating OpenSDA firmware............. 7
how to program, debug and configure a new FLEXSPI NOR flash. For 5 Examples.............................................. 7
information about Flashloader, MfgTool, refer to How to Enable Boot from
HyperFlash and SD Card (document AN12107) and How to Enable Boot from 6 Revision history................................. 20
QSPI Flash (document AN12108).
The software used for examples in this application note are based on the MIMXRT1050 SDK (Release version: 2.3.1). The
development environment is IAR Embedded Workbench 8.22.1. The hardware development environment is IMXRT1050-EVKB
board.

2 MIMXRT1050 EVK board settings

There are two On-Board Flashes on the EVK board: Hyper Flash and QSPI NOR Flash. The Hyper Flash is the default Flash. In
order to enable the On-Board QSPI NOR Flash, EVK board configruations need to be modified.

2.1 EVK settings

1. Remove the On-Board Hyper Flash. Otherwise it will impact the QSPI NOR Flash read and write timing.
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MIMXRT1050 EVK board settings

Figure 1. Removing the Hyper Flash

2. Weld 0 Ω resistor to the pad from R153 to R158.

Figure 2. Welding 0 Ω resistor to the pad from R153 to R158

3. Replace the firmware of OpenSDA. The default firmware On-Board is used to Hyper Flash, so that the firmware should be
replaced to QSPI NOR Flash. Both Hyper Flash and QSPI NOR Flash’s firmware can be downloaded from https://
www.nxp.com.

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XIP boot flow

2.2 EVKB settings

For the EVKB board, the On-Board Hyper Flash doesn’t need to be removed.
Removed resistors: R356, R361 - R366.
Weld 0 Ω resistors: R153 - R158.
Follow Step 3 in EVK settings to update the OpenSDA firmware.
Now the On-Board QSPI NOR Flash is ready to use.

3 XIP boot flow

®
The boot process begins at the Power-On Reset (POR) where the hardware reset logic forces the Arm core to begin the execution
starting from the on-chip boot ROM. The boot ROM uses the state of the BOOT_MODE register and eFUSEs to determine the
boot device. For development purposes, the eFUSEs used to determine the boot device may be overridden using the GPIO pin
inputs. The boot ROM code also allows to download the programs to be run on the device. The example is a provisioning program
that can make further use of the serial connection to provide a boot device with a new image.
Typically, the internal boot is selected for normal boot, which is configured by external BOOT_CFG GPIOs. Table 1 shows the
typical boot mode and boot device settings.

Table 1. Typical Boot mode and Boot device settings

SW7-1 SW7-2 SW7-3 SW7-4 Boot device

OFF ON ON OFF Hyper Flash

OFF OFF ON OFF QSPI NOR Flash

ON OFF ON OFF SD Card

Figure 3 shows FlexSPI NOR Flash Boot flow. The ROM expects the 512-byte FlexSPI NOR configuration parameters to be
present at offset 0 in Serial NOR Flash. The ROM reads these configuration parameters using the read command specified by
BOOT_CFG2[2:0] with Serial clock operating at 30 MHz. The Flash configuration parameters include read command sequence,
FlexSPI frequency, quad mode enablement sequence (optional), and so on. For more details, refer to Section 9.6.3 in i.MX RT1050
Process Reference Manual (document IMXRT1050RM). Rom code will configure FlexSPI with these parameters.

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XIP boot flow

Figure 3. FlexSPI NOR Boot flow

Then Rom code will get some key information about App Image, Image Vector Table (IVT), Boot Data and Device Configuration
Data (DCD). IVT, Boot Data, DCD and user’s code make up an App image.
A boot image which can program to FlexSPI NOR Flash directly consists of:
• Flash Configuration Parameters: Read command sequence, FlexSPI frequency, quad mode enablement sequence
(optional), and so on. For more details, refer to Section 9.6.3 in i.MX RT1050 Process Reference Manual (document
IMXRT1050RM). Search for hyperflash_config on SDK, the setting can be found on SDK.

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XIP boot flow

• IVT: A list of pointers located at a fixed address that the ROM examines to determine where the other components of the
program image are located. Search for image_vector_table on SDK, the setting can be found on SDK. For more details,
refer to Section 9.7.1 in i.MX RT1050 Process Reference Manual (document IMXRT1050RM).
• Boot data: A table that indicates the program image location, program image size in bytes, and the plugin flag. Search for
boot_data on SDK, the setting can be found on SDK.

• DCD: IC configuration data (ex: SDRAM register config). For more details about DCD format, refer to Section 9.7.2 in i.MX
RT1050 Process Reference Manual (document IMXRT1050RM). Because DCD data is stored in binary, it is hard to
understand and modified. DCD Tool can help to convert the configuration text file to a binary file. Search for dcd_data[] on
SDK, the setting can be found on SDK.
• User code and data

Figure 4. Bootable image layout

Open the link file, MIMXRT1052xxxxx_flexspi_nor.icf, the address layout of Flash configuration parameters, IVT, Boot Data
and DCD Data can be found.

Figure 5. Bootable image address layout

Open a generated image, such as hello_world.bin. The Flash configuration parameters are at the front. The tag of Flash
configuration parameters is 0x42464346, ascii is FCFB, as shown in Figure 6. For more details, refer to Section 9.6.3.1 in i.MX
RT1050 Process Reference Manual (document IMXRT1050RM).

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XIP boot flow

Figure 6. Flash configuration parameters address layout

The tag of IVT is 0xD1 and it can be found on 0x1000. The boot start address offset is 0x1020 and the data is 0x6000000, which
matches with Flash start address. The DCD start address offset is 0x1030 and the data is 0xD2 which matches with the Tag of
DCD.

Figure 7. Flash configuration parameters address layout

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Updating OpenSDA firmware

4 Updating OpenSDA firmware

Almost all demos on SDK 2.3.1 support XIP demo. It means when using the default XIP target demos, the raw image will be
added to the Flash configuration parameters, IVT, Boot data and DCD. OpenSDA firmware is not required to add these information
to the raw image. Either using the On-Board Hyper Flash or QSPI NOR Flash, the firmware needs to update to use the XIP demos.
If the number is bigger than TR18132215, the firmware of OpenSDA will not add the configure information to the raw image. If
not, please update the firmware from https://www.nxp.com.

Figure 8. Serial number

5 Examples

5.1 Adding or removing boot header for XIP targets

Now SDK for i.MX RT1050 provides flexspi_nor_debug and flexspi_nor_release targets for each example/demo which
supports eXecute In Place (XIP). These two targets will add XIP_BOOT_HEADER to the image by default. Then ROM can boot and
run this image directly on external Flash.

NOTE
When using DapLink to debug flexspi_nor_debug and flexspi_nor_release targets, please set the
breakpoint type to hardware breakpoint.

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Examples

Figure 9. Setting the hardware breakpoint

5.1.1 Macros for the boot header

Table 2 describes three macros that are added in flexspi_nor targets to support XIP.

Table 2. Macros for the boot header

XIP_EXTERNAL_FLASH 1: To exclude the code which will change the clock of flexspi.
0: To make no changes.

XIP_BOOT_HEADER_ENABLE 1: To add flexspi configuration block, IVT, boot data, and DCD (optional)
to the image by default.
0: To add nothing to the image by default.

XIP_BOOT_HEADER_DCD_ENABLE 1: To add DCD to the image.

0: Do NOT add DCD to the image.

Table 3 describes the different effect on the built image with different combination of these macros.

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Examples

Table 3. Different effect on the built image with difference macros

XIP_BOOT_HEADER_DCD_ENABLE=1 XIP_BOOT_HEADER_DCD_ENABLE=0

XIP_E XIP_BOOT_HEA This imaage can be programed to hyperflash This image can be programed to hyperflash
XTERN DER_ENABLE=1 by IDE and can run after POR reset if by IDE and can run after POR reset if
AL_FL hyperflash is the boot source. hyperflash is the boot source.
ASH=1
SDRAM will be initialized. SDRAM will NOT be initialized.

XIP_BOOT_HEA This image can NOT run after POR reset if it is programed by IDE even if hyperflash is the
DER_ENABLE=0 boot source.

XIP_EXTERNAL_FLASH=0 This image can NOT do XIP because when this macro is set to 1. It will exclude the code
which will change the clock of flexspi.

5.1.2 Changing the macros in SDK

Take hello_world as an example.

Figure 10. Changing the SDK macros based on IAR

5.2 Programming the image to On-Board Hyper Flash

1. Configure the board to Hyper Flash Boot mode by pulling up SW7-2 and SW7-3 and pulling down others. Then power on
the EVK board.

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Examples

2. Open the hello_world demo in the SDK and select the project configuration as flexspi_nor_debug. Then build the project
and program the image to the Flash.

Figure 11. Building and programming the project

3. Open and configure the Terminal window:

• Baud rate: 115200
• Data bits: 8
• Stop bit: 1
• Parity: None
• Flow control: None
4. Press SW3 to reset the EVK board and hello world will be printed to the terminal.

Figure 12. Hello World

5.3 Programming the image to On-Board QSPI NOR Flash

1. Configure the board to QSPI NOR Flash Boot Mode by pulling up SW7-3 and pull-down others. Change the firmware of
OpenSDA to QSPI NOR Flash. Then power on the EVK board.
2. Open the hello_world demo in the SDK and select the project configuration as flexspi_nor_debug. Find
evkbimxrt1050_hyper_config.c as shown in Figure 13.

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Examples

Figure 13. evkbimxrt1050_hyper_config.c

3. Comment const flexspi_nor_config_t hyperflash_config and replace it as const flexspi_nor_config_t

qspiflash_config (can replace the evkbimxrt1050_hyper_config.c file in the attachment. The new file has been
configured for QSPI NOR Flash).

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Examples

Figure 14. flexspi_nor_config_t qspiflash_config

4. Then build the project and program the image to the Flash. Then, Hello World can be printed on the terminal.

5.4 Programming the image to a new QSPI NOR Flash

5.4.1 Programming the image to GD25LQ64C

This section will outline how to use a new QSPI NOR Flash. Take GD25LQ64C for example.
1. Replace the const flexspi_nor_config_t hyperflash_config as const flexspi_nor_config_t
qspiflash_config.

2. Open the IAR project, FlashIMXRT1050_EVK_FlexSPI_Example in the attachment. Build the project and find
FlashIMXRT1050_EVK_FlexSPI.out. Then copy it to IAR install path.

Figure 15. Updating IAR flashloader

3. Build the project and download. Then, Hello World can be printed on the terminal.

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Examples

5.4.1.1 Differences between the two Flash configuration parameters

Differences between Hyper Flash and QSPI NOR Flash configruation parameters include:
• Look Up Table (LUT)
LUT is an internal memory to preserve a number of preprogrammed sequences. Each sequence consists of up to eight
instructions which are executed sequentially. When a flash access is triggered by an IP command or an AHB command,
FlexSPI controller will fetch the sequence from LUT according to sequence index/number and execute it to generate a valid
flash transaction on SPI interface.
• Read Sample Clock Source
Hyper Flash uses external input from DQS Pad but QSPI NOR Flash uses Loopback from DQS Pad.
• Serial Flash Type
Hyper Flash is Octal and QSPI NOR Flash is Quad.
A comparison tool can help to find other differences.

5.4.1.2 Differences between the two flashloaders

Differences between Hyper Flash and QSPI NOR Flash flashloaders include:
• QE bit position between of GD and ISSI
shows the main difference between two flash loaders. The left one is the original function and the other one is the modified
function.

Figure 16. Difference between the two flashloaders

Other difference can be found by comparison tool.

NOTE
The default flashloader can be found in your IAR install path: IAR Systems\Embedded Workbench
8.0_2\arm\src\flashloader\NXP\FlashIMXRT1050_EVK_FlexSPI.

The modified flashloader can be found in the attached file.

5.4.2 Programming the image to GD25Q64C

This section introduces how to use a new QSPI NOR Flash. Take GD25Q64C for example. Besides the value of power supply,
there are some differences between GD25LQ64C and GD25Q64C.

NOTE
The power supply of GD25Q64C is 3.3 V, but the default power supply is 1.8 V. DO modify the power supply voltage.

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Examples

Figure 17. Difference between GD25LQ64C (Left) and GD25Q64C (Right)

The difference is the value of Write Status Register and the command format, so that the value related with these registers need
to modify.
1. Open the FlashIMXRT1050_EVK_FlexSPI_Example with IAR. Find the LUT and modify the value, as shown in Figure 18.

Figure 18. Modify the value form ISSI_CMD_WRSR from 0x01H to 0x31H

2. Write register format needs to be changed to 8-bit, as shown in Figure 19.

Figure 19. Modifying the write register format

3. Build this project and copy the .out file as described in Programming the image to On-Board QSPI NOR Flash.

5.5 Programming the image to a new QSPI NOR Flash with MCUXpresso IDE
Select MIMXRT10XX_SFDP_QSPI.cfx for LinkServer flash driver. Almost all standard SPI NOR Flash support SFDP.

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Examples

Figure 20. Selecting MIMXRT10XX_SFDP_QSPI.cfx

5.6 Modifying boot header for NOR flash XIP booting

Refer to the flash datasheet to modify the parameters of flexspi_nor_config_t in the evkmimxrt10xx_flexspi_nor_config.c
file.

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Examples

Figure 21. Modifying flexspi_nor_config_t

The following gives examples for how to modify the parameters of FLEXSPI_LUT_SEQ() for NOR flash XIP booting.

5.6.1 ISSI IS25WP064A in Quad SPI mode

Refer to the ISSI IS25WP064A datasheet to get instruction code and dummy cycles info for Fast Read Quad I/O.

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Examples

Figure 22. Parameter updating for Fast Read Quad I/O

5.6.2 Winbond W25Q32 in Quad SPI mode

Refer to the Winbond W25Q32 datasheet to get instruction code and dummy cycles info for Fast Read Quad I/O.

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Examples

Figure 23. Parameter updating for Fast Read Quad I/O

5.6.3 Winbond W25Q32 in dual SPI mode

Refer to the Winbond W25Q32 datasheet to get instruction code and dummy cycles info for Fast Read Dual I/O.
• Modify the structure member .sflashPadType to kSerialFlash_2Pads.
• Modify the parameter of FLEXSPI_LUT_SEQ() to FLEXSPI_2PAD.

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Examples

Figure 24. Parameter updating for Fast Read Quad I/O

5.6.4 Winbond W25Q32 in standard SPI mode

Refer to the Winbond W25Q32 datasheet to get instruction code and dummy cycles info for Fast Read.
• Modify the structure member .sflashPadType to kSerialFlash_1Pads.
• Modify the parameter of FLEXSPI_LUT_SEQ() to FLEXSPI_1PAD.

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Revision history

Figure 25. Parameter updating for Fast Read Quad I/O

6 Revision history
Table 4. Revision history

Revision number Date Substantive changes

0 05/2018 Initial release

1 10/2019 Added Programming the image to a new QSPI

NOR Flash with MCUXpresso IDE and
Modifying boot header for NOR flash XIP
booting.

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Date of release: 10/2019
Document identifier: AN12183