EMT 182

ANALOG ELECTRONIC I
Basic Field Effect Transistors
Amplifiers
MOSFET AMPLIFIER
Graphical Analysis, Load Lines
Small-signal Parameters
Graphical Analysis, Load Lines
Common-source transistor characteristic

Load line
equation?
Q-point?

IDQ
VDSQ

Shows DC load line, Q-point, VDS, as a result of sinusiodal source vi.

A larger value of of vGS means a larger ID and smaller VDS.
For negative vi, vGS decrease bias point moves down the load line.
Time varying signal source vi, generates time varying components of gate-to-source, vGS, so,
vGS = vi.
For the FET to operate as a linear amplifier, transistor is biased in sat. region. iD and vDS must
be in saturation.
If VGS less than VTN, ID=0 (cut-off).
If VGS > VTN, transistor turns-on and biased in sat.
region.
If VGS increases, Q-point moves up the load line.
Transition points-boundary between sat. and
non-sat. region, defined as VDS = VDS (sat) = VGS
VTN.
As VGS increases above transition point, transistor
biased in non-sat. region.
MOSFET Parameters
Instantaneous vGS:
DC or quiescent drain current, IDQ:
Time-varying drain current (linearly related to vGS):
Signal voltage proportional square:

Small signals implies linearity, means, total currents is total of dc and ac

component of drain-current.

Then, small-signal ID related to small-signal vGS by Transconductance, gm

gm = id / vGS

g m 2 K VGS VTN
Transconductance, gm is slope
VGS of VTN curve. If vgs small, gm is
gm0 is the gm value g m g m0 1 constant.
when VGS = 0 VTN
where
g m 0 2 KVTN
Small-signal: linearize the ac equivalent circuit.
Linear amplifier: the use of superposition so
that the dc an ac analysis/signal of the circuits
can be performed separately. Total response is
the summation.
Small-signal Equivalent Circuit
VDD

iD RD vo
vO id
+
vDS RD
+v -
vgs
GS
- vi
vi

VGSQ

NMOS common source circuit AC equivalent circuit

with time-varying signal source
in series with gate DC source
Small-signal Equivalent Circuit
vO = vDS = VDD iDRD
id
vo
= VDD (IDQ + id)RD
vgs
RD = (VDD IDRD) - idRD
vi
Small-signal parts:

vo = vds = -idRD
id = gmvgs
AC equivalent circuit
vi = vgs
Small-signal Equivalent Circuit
D ids
G + +
ids
+ vds vgs gmvgs ro
vgs
- - -
S

Common source NMOS Simplified small signal

with small signal equivalent circuit for
parameters NMOS

I DQ
VA 1
Small-signal ro
1
where
output resistance I DQ VA
, Channel-length modulation
parameter.
DC Analysis
Saturation Region
VDD
VDD

RD
R1 ID RD
iD R1
vO
CC 0 +
vG
VG VDS
+ -
VGS
vi R2 -
R2

Voltage-divider circuit for MOSFET DC equivalent circuit

DC Analysis
Saturation Region
VDD

R1 ID RD R2
VG VGS VDD
0 + R1 R2
VG VDS
I D K VGS VTN
-
2
+
VGS
-
R2
VDS VDD I D RD

VDS (sat) VGS VTN

DC equivalent circuit
Example
VDD 5 V

VTN = 1 V 30 k 20 k
RD
K = 0.1 mA/V2 R1
iD
vO
CC
vG

vi
R2 20 k
DC equivalent circuit
VDD

R1 ID RD R2 20
VG VGS VDD 5 2V
+ R1 R2 20 30
0
VG VDS
+ I D K VGS VTN 0.12 1 0.1 mA
2 2
-
VGS
R2 -

VDS VDD I D RD 5 0.120 3V

The transistor is biased in the saturation region because

VDS > VDS(sat) = VGS VTN = 2 1 = 1 V
MOSFET AMPLIFIER
Common-Source Amplifier
Equivalent circuit
With source resistor
With source bypass capacitor
Common-Drain Amplifier
Common-Gate Amplifier
COMMON-SOURCE AMPLIFIER
- Basic Configuration

Common-source
Signal is coupled into gate through circuit with
coupling capacitor, Cc. voltage divider
Cc will provide dc isolation between biasing & coupling
amplifier and signal source. capacitor
DC biasing established by R1, R2.
Small-signal equivalent circuit

Vo g mVgs ro RD

input output
resistance Ri R1 R2 Vo = - gm Vgs (ro || RD)
voltage

input Ri
voltage Vgs Vi Ro = RD || ro output
Ri RSi resistance

ro = VA / IDQ
small-signal
g m ro RD .( Ri /( Ri RSi)
Vo - We assume that
voltage gain Av
Vi capacitor essentially a
short circuit to signals.
DC Load Line
iD VDD RK 86
iD (max)
RD

VDS (sat) VGS VTN

DC load line &
Transition point transition point

Q-point
IDQ 1
DC load line, slope -
RD

vDS
VDSQ VDD
Transition point: separate sat. and non-sat. region.
Q-point must be near mid of sat. region to provide max symmetrical output
voltage and keep the transistor biased in sat. region.
COMMON-SOURCE AMPLIFIER
- with Source Resistor
+VDD
CALCULATION EXAMPLE 12V

RD 3 k
Given: C2
R1 300 k vo
VTN = 2V,
RSi C1
K=1 mA/V2, RL
2 k 3 k
=0
R2 200 k
vi
RS 2 k
Determine:
i- Q-point values (ID , VDS)
ii- small-signal voltage gain
Stabilize the Q-point against variation of transistor
parameters.
When kn varies, the Q-point will not vary much if Rs included.
Q-point values
VDD=12V

RD=3 k
R1=300 k

dc equivalent circuit VG

R2=200 k
VG VGS RS=2 k
ID K VGS VTN
2

RS

R2 200k

VG
V 12 4.8V
R1 R2 300k 200k
DD
Q-point values (Cont)

4.8 VGS 1m 2k VGS 2

2

2VGS 7VGS 3.2 0

2

7 7
2
423.2
VGS 0.54, 2.96
22

I D K VGS VTN 1m 2.96 2 0.92mA

2 2

So, the Q point value:

VDS VDD I D RS RD 12 0.92m5k 7.4V

RSi
Small-signal analysis
Vo
+

Vi R1||R2 Vgs
gmVgs
RD||RL
g m 2 K VGS VTN
_
21m 2.96 2 1.92mS
ro I DQ
RS
1

Vgs
R1 R2
Vi
Vi Vgs g mVgs RS R R2
R1 R2 RSi Vgs (1 g m RS ) Vgs 1
Vi 0.984Vi
R1 R2 RSi
Vo g mVgs RD RL
Vo g m RD RL
Av
g m RD RL Vi 1 g m RS
AV
1 g m RS 0.48
COMMON-SOURCE AMPLIFIER
- with Bypass Capacitor
+VDD

RD
C2
R1
RSi C1
RL vo

R2
vi
RS C3

Required to provide small

impedance at all frequencies
Lower signal frequency, less
Minimize the lost in small-signal voltage gain
effective bypass capacitor. while maintaining the Q-point stability
Small signal equivalent circuit

RSi

Vo g mVgs ro RD RL
Vo
+
Vi R1||R2 Vgs ro RD||RL
_ gmVgs

Ri R1 R2
Ri
Ri
Av
Vo

g m ro RD RL
Vi Ri RSi

Ri
Vgs Vi
Ri RSi
RK 05

COMMON-DRAIN AMPLIFIER
+V DD

R1
RSi C1

C2
vi R2

RS RL vo

Output signal, vo taken off the source.

Drain connected directly to VDD.
VDD become signal ground in ac equivalent circuit.
Small signal equivalent circuit
RSi Vin _
+
Vgs Vo
Vi R1||R2 gmVgs ro
Vin Vgs Vo RS||RL

1
input Ri R1 R2 Ro RS ro RL Output
impedance gm impedance

input
voltage
Ri
Vin Vi
Ri RSi
Vo g mVgs RS RL ro output
voltage

small-signal Av
Vo

g m RS RL ro Ri

voltage gain Vi 1 g m RS RL ro Ri RSi Assume Cc acts as a short circuit.
Drain at signal ground.
Small signal resistance, ro
parallel with current source.
COMMON-GATE AMPLIFIER
V +

RD

RSi C1 C2

vi IQ
RL
RG vo
C3
V-

Input signal is applied to the source terminal.

Gate is at signal ground.
RG prevents the build up of static charge on gate terminal.
CG ensure the gate at signal ground.
CC1 couples signal to source.
CC2 couples output voltage to RL.
Small-signal
R
equivalent circuit
i
gmVgs
RSi
Vo
_
Ii Vgs
Vi RD RL ro assume infinite.
+
Source at the input.

Vgs Vgs 1
input Ri
impedance Ii g mVgs gm
Vi I i RSi Vgs
input Vo g mVgs RD RL output
voltage Vi voltage
Vgs
Vo g m RD RL
1 g m RSi
Av small-signal
I i g mVgs
input
current Vi 1 g m RSi voltage gain
JFET AMPLIFIER
Common-Source Amplifier
Common-Drain Amplifier
JFET Parameters

Transconductance, gm Small-signal output

resistor, ro
2 I DSS VGS 1
gm 1 ro
VP VP I DQ
where
id
gm
v gs
DC Analysis

VGS VG VS
R2
VDD I D RS
R1 R2
2
VGS
I D I DSS 1
VP
COMMON-SOURCE CIRCUIT
VDD

R1 RD C2
vo
C1
RL
vi R2
RS
CS
Small-signal equivalent circuit

Vo
+

Vi R1||R2 Vgs ro RD||RL

gmVgs
-

input
voltage
Vi Vgs
Vo g mVgs ro RD RL output
voltage

small-signal
voltage gain
Av
Vo
Vi

g m ro RD RL
COMMON-DRAIN CIRCUIT

V+

C1
C2
vo
vi RG
RS RL

V-
Small-signal equivalent circuit
gmVgs

ro
Vgs Vo
+ -
Vi RG RS RL

input
voltage
Vi Vgs Vo

Vo g mVgs ro RS RL g m Vi Vo ro RS RL output
voltage

small-signal
Av
Vo


g m ro RS RL
voltage gain

Vi 1 g m ro RS RL