IP Evaluation, FPGA Solutions and Processor Simulation

The ARM University Program provides resources and links to various IP solutions from ARM and ARM's partner companies including FPGA prototyping platforms, core evaluation IP, and processor simulation environments.

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Cortex-M0 IP and DesignStart

Actel FPGA Solutions

Keil MPS

Cortex-M1 Evaluation IP

Physical IP

ARM has announced the availability of the ARM® Cortex™-M0 DesignStart Processor via the ARM DesignStart™ online IP portal as a download after a simple click-through EULA. The processor is configured as a synthesizable, obfuscated verilog netlist designed for academics, start-ups and ad-hoc technology teams looking to teach or prototype with a real ARM processor. Implemention is possible in almost any FPGA to enable SoC design courses and projects around a real, instruction set compatible ARM core. It can also be manufactured according to the EULA. From there, anything from embedded systems courses or microprocessor applications can be taught using the same platform. Through this online access model, ARM will accelerate the proliferation of ARM technology in university curriculums and research projects.

The Official ARM Cortex™-M0 DesignStart Example Design Kit (EDK) is Now Freely Downloadable!
The ARM Cortex-M0 DesignStart Example Design Kit (EDK) helps to start designing complete systems (hardware + software) with the Cortex-M0 DesignStart Processor on an FPGA board. It includes a selection of simple AHB-Lite peripherals, AHB-Lite bus infrastructure components, example systems usable as design templates, software examples based on the popular Keil MDK-ARM software development tools, and associated quickstart guides and documentation. It's everything you need to get an example system based on the M0_DS running out-of-box in an FPGA!

About the ARM Cortex-M0 Processor
The ARM Cortex-M0 processor is the smallest and lowest power 32-bit ARM processor available. The exceptional low power, small gate count and code footprint of the processor makes it ideal for ultra low power MCU and mixed signal applications, providing 32-bit performance and efficiency in an 8/16-bit footprint. ARM Cortex-M0 also offers a broad ecosystem, software development tools support and a future proof solution through upwards compatibility with the Cortex-M family. As the entry-level ARM processor, it is ideal for designers, students and researchers who need low cost access to industry standard processor IP.

About ARM DesignStart Online Portal
The ARM DesignStart portal provides easy and comprehensive online access to a broad range of physical and processor IP from ARM. The portal contains design kits and evaluations of several of ARM processors including ARM Cortex-M0, and an extensive selection of ARM Artisan logic, memory and interface IP. The DesignStart IP provides a silicon proven path to accelerate ARM processor-based SoC designs.

Additionally, universities can gain access to processor simulation environments for ARM technology and can incorporate industry models into academic research efforts. These are simulation environments are based on real foundry processes available in the current marketplace. At the moment, one core simulation model is available in the University DesignStart program - the ARM926EJ-S.

The University DesignStart Kit comprises of the following deliverables: documentation including User Guide and Integration Manual; Design Simulation Model allowing RTL level simulation; foundry process specific timing view (.lib and .CLF format); and foundry process specific abstract layout view (.LEF and .FRAM format).

The DesignStart deliverables are subject to approval. To apply for the materials, please click the link below.

Students cannot request the DesignStart materials other than the Cortex-M0 DesignStart Processor. Only a faculty member, full-time researcher, or other qualified full-time staff member of a university or research institution can do this.

University DesignStart Program

Actel SmartFusion Cortex-M3 Kits

Actel's SmartFusion™ Evaluation Kit offers a simple, low-cost way to try the world's only FPGA with hard ARM Cortex™-M3 and programmable analog. The device contains on-chip flash and on-chip SRAM memory, as well as additional SPI flash memory. The board can communicate via Ethernet and HyperTerminal. The board also contains LEDs, switches, OLED and various voltage, current, and temperature monitoring functions for analog experimentation on the board.

Actel's SmartFusion™ Development Kit offers a full-featured development board so you can try the world's only FPGA with hard ARM® Cortex™-M3 and programmable analog. The device contains on-chip flash and SRAM memory, as well as additional off-chip memory on the board. The board can communicate via Ethernet and HyperTerminal. The board also contains LEDs, switches, OLED, and extensive analog experimentation, including voltage rail monitoring, current POT, temperature diodes and voltage sweeping using active bipolar prescalers (ABPS). Networking interfaces include Ethernet PHY, EtherCAT, CAN, UART, and RS485. See board details below for more information.

SmartFusion Cortex-M3 Evaluation Board

Actel Cortex-M1 and CoreMP7 IP

Developed by ARM in collaboration with Actel and Altera, the 32-bit ARM Cortex-M1 processor is the first ARM processor designed for FPGA implementation. With a balance between size and speed, the Cortex-M1 processor operates at up to 72 MHz implemented in as few as 4,300 tiles. Actel's CoreMP7 is a soft IP version of the popular ARM7TDMI-S. Please consult Actel and Altera for pricing and availability.

The Keil MPS is the first system offering total flexibility to prototype your custom Cortex-M3 and Cortex-M0 processor-based design. No other platform allows unrestricted access to the latest Cortex-M processors in FPGA. The MPS design works for hardware and software development of ASIC/SoC devices based on Cortex-M processors.

Keil Microcontroller Prototyping System

ARM has now made it possible to evaluate the Cortex-M1 IP. The Low Power Reference Platform (LPRP) is a low-cost means of implementing the ARM Cortex-M1 inside the Altera Cyclone III FPGA.

The ARM Cortex-M1 Development Kit offers a targeted solution for the development of ARM embedded systems on Altera Cyclone III FPGAs. A free evaluation download specifically for use in an Altera Cyclone III FPGA is available from Arrow's website.

The Cortex-M1 is also available for evaluation using Synopsys Synplicity tools through the Synopsys ReadyIP program. The Synopsys ReadyIP flow for ARM Cortex-M1 processor allows you to integrate the evaluation core within your design and target your choice of FPGA vendor devices from Actel, Altera and Xilinx. Access to an evaluation version of the core is available using click-through licensing and online registration.

Front-end views of standard cell libraries, memory compilers, and I/O are part of our PIPD offerings to universities. ARM has created partnerships with several regional centers that may be able to work with you to access our Physical IP library directly. These entities are regional centers of design excellence in selected government funded or college funded institutions. For example, the Chip Implementation Center in Taiwan, MOSIS in the USA, and CMC in Canada are established organizations that offer MPW project services for university researchers. These institutions offer an established channel of researchers to get wafer capacities at leading foundries as well as technical support for your design.

Below is a list of ARM authorized MPW design centers.

Please contact one of these organizations to request direct front-end access to the ARM Physical IP products.