Share this 
Actel SmartFusion Cortex-M3 KitsActel's SmartFusion™ Evaluation Kit offers a simple, low-cost way to try the world's only FPGA with hard ARM Cortex™-M3 and programmable analog. The device contains on-chip flash and on-chip SRAM memory, as well as additional SPI flash memory. The board can communicate via Ethernet and HyperTerminal. The board also contains LEDs, switches, OLED and various voltage, current, and temperature monitoring functions for analog experimentation on the board.
Actel's SmartFusion™ Development Kit offers a full-featured development board so you can try the world's only FPGA with hard ARM® Cortex™-M3 and programmable analog. The device contains on-chip flash and SRAM memory, as well as additional off-chip memory on the board. The board can communicate via Ethernet and HyperTerminal. The board also contains LEDs, switches, OLED, and extensive analog experimentation, including voltage rail monitoring, current POT, temperature diodes and voltage sweeping using active bipolar prescalers (ABPS). Networking interfaces include Ethernet PHY, EtherCAT, CAN, UART, and RS485. See board details below for more information.
Developed by ARM in collaboration with Actel and Altera, the 32-bit ARM Cortex-M1 processor is the first ARM processor designed for FPGA implementation. With a balance between size and speed, the Cortex-M1 processor operates at up to 72 MHz and can be implemented in as few as 4,300 tiles. Actel's CoreMP7 is a soft IP version of the popular ARM7TDMI-S. Please consult Actel and Altera for pricing and availability.
The Keil MPS is the first system offering total flexibility to prototype your custom Cortex-M3 and Cortex-M0 processor-based design. No other platform allows unrestricted access to the latest Cortex-M processors in FPGA. The MPS is designed for hardware and software development of ASIC/SoC devices based on Cortex-M processors.
The ARM Cortex-M1 Development Kit offers a targeted solution for the development of ARM embedded systems on Altera Cyclone III FPGAs. A free evaluation download specifically for use in an Altera Cyclone III FPGA is available from Arrow's website.
The Cortex-M1 is also available for evaluation using Synopsys Synplicity tools through the Synopsys ReadyIP program. The Synopsys ReadyIP flow for ARM Cortex-M1 processor allows you to integrate the evaluation core within your design and target your choice of FPGA vendor devices from Actel, Altera and Xilinx. Access to an evaluation version of the core is quick and is provided using click-through licensing and online registration.
Universities can gain access to processor simulation environments for ARM technology and can incorporate industry models into academic research efforts. These simulation environments are based on real foundry processes available in the current marketplace. At the moment, one core simulation model is available in the University DesignStart program - the ARM926EJ-S.
The University DesignStart Kit comprises of the following deliverables: documentation including User Guide and Integration Manual; Design Simulation Model allowing RTL level simulation; foundry process specific timing view (.lib and .CLF format); and foundry process specific abstract layout view (.LEF and .FRAM format).
The DesignStart deliverables are subject to approval. To apply for the materials, please click the link below.
Students cannot request the DesignStart materials - this can only be done by a faculty member, full-time researcher, or other qualified full-time staff member of a university or research institution.
Below is a list of ARM authorized MPW design centers.
Please contact one of these organizations to request direct front-end access to the ARM Physical IP products.
